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iio: adc: stm32-adc: enable timestamping for non-DMA usage
For non-DMA usage, we have an easy way to associate a timestamp with a sample: iio_pollfunc_store_time stores a timestamp in the primary trigger IRQ handler and stm32_adc_trigger_handler runs in the IRQ thread to push out the buffer along with the timestamp. For this to work, the driver needs to register an IIO_TIMESTAMP channel. Do this. For DMA, it's not as easy, because we don't push the buffers out of stm32_adc_trigger, but out of stm32_adc_dma_buffer_done, which runs in a tasklet scheduled after a DMA completion. Preferably, the DMA controller would copy us the timestamp into that buffer as well. Until this is implemented, restrict timestamping support to only PIO. For low-frequency sampling, PIO is probably good enough. Cc: Holger Assmann <has@pengutronix.de> Acked-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.kernel.org/r/20210125194824.30549-1-a.fatoum@pengutronix.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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parent
6c3b615379
commit
8a09054f3e
1 changed files with 31 additions and 8 deletions
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@ -177,7 +177,7 @@ struct stm32_adc_cfg {
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* @offset: ADC instance register offset in ADC block
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* @cfg: compatible configuration data
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* @completion: end of single conversion completion
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* @buffer: data buffer
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* @buffer: data buffer + 8 bytes for timestamp if enabled
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* @clk: clock for this adc instance
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* @irq: interrupt for this adc instance
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* @lock: spinlock
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@ -200,7 +200,7 @@ struct stm32_adc {
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u32 offset;
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const struct stm32_adc_cfg *cfg;
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struct completion completion;
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u16 buffer[STM32_ADC_MAX_SQ];
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u16 buffer[STM32_ADC_MAX_SQ + 4] __aligned(8);
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struct clk *clk;
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int irq;
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spinlock_t lock; /* interrupt lock */
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@ -1714,7 +1714,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
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}
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}
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static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
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static int stm32_adc_chan_of_init(struct iio_dev *indio_dev, bool timestamping)
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{
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struct device_node *node = indio_dev->dev.of_node;
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struct stm32_adc *adc = iio_priv(indio_dev);
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@ -1762,6 +1762,9 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
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return -EINVAL;
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}
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if (timestamping)
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num_channels++;
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channels = devm_kcalloc(&indio_dev->dev, num_channels,
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sizeof(struct iio_chan_spec), GFP_KERNEL);
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if (!channels)
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@ -1812,6 +1815,19 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
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stm32_adc_smpr_init(adc, channels[i].channel, smp);
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}
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if (timestamping) {
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struct iio_chan_spec *timestamp = &channels[scan_index];
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timestamp->type = IIO_TIMESTAMP;
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timestamp->channel = -1;
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timestamp->scan_index = scan_index;
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timestamp->scan_type.sign = 's';
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timestamp->scan_type.realbits = 64;
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timestamp->scan_type.storagebits = 64;
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scan_index++;
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}
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indio_dev->num_channels = scan_index;
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indio_dev->channels = channels;
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@ -1871,6 +1887,7 @@ static int stm32_adc_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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irqreturn_t (*handler)(int irq, void *p) = NULL;
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struct stm32_adc *adc;
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bool timestamping = false;
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int ret;
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if (!pdev->dev.of_node)
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@ -1927,16 +1944,22 @@ static int stm32_adc_probe(struct platform_device *pdev)
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if (ret < 0)
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return ret;
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ret = stm32_adc_chan_of_init(indio_dev);
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if (ret < 0)
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return ret;
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ret = stm32_adc_dma_request(dev, indio_dev);
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if (ret < 0)
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return ret;
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if (!adc->dma_chan)
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if (!adc->dma_chan) {
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/* For PIO mode only, iio_pollfunc_store_time stores a timestamp
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* in the primary trigger IRQ handler and stm32_adc_trigger_handler
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* runs in the IRQ thread to push out buffer along with timestamp.
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*/
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handler = &stm32_adc_trigger_handler;
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timestamping = true;
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}
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ret = stm32_adc_chan_of_init(indio_dev, timestamping);
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if (ret < 0)
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goto err_dma_disable;
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ret = iio_triggered_buffer_setup(indio_dev,
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&iio_pollfunc_store_time, handler,
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