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nvme-pci: Pass the queue to SQ_SIZE/CQ_SIZE macros
This will make it easier to handle variable queue entry sizes later. No functional change. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com> Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
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parent
35fe0d12c8
commit
8a1d09a668
1 changed files with 15 additions and 15 deletions
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@ -28,8 +28,8 @@
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#include "trace.h"
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#include "nvme.h"
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#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
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#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
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#define SQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_command))
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#define CQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_completion))
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#define SGES_PER_PAGE (PAGE_SIZE / sizeof(struct nvme_sgl_desc))
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@ -1344,16 +1344,16 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
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static void nvme_free_queue(struct nvme_queue *nvmeq)
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{
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dma_free_coherent(nvmeq->dev->dev, CQ_SIZE(nvmeq->q_depth),
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dma_free_coherent(nvmeq->dev->dev, CQ_SIZE(nvmeq),
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(void *)nvmeq->cqes, nvmeq->cq_dma_addr);
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if (!nvmeq->sq_cmds)
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return;
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if (test_and_clear_bit(NVMEQ_SQ_CMB, &nvmeq->flags)) {
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pci_free_p2pmem(to_pci_dev(nvmeq->dev->dev),
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nvmeq->sq_cmds, SQ_SIZE(nvmeq->q_depth));
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nvmeq->sq_cmds, SQ_SIZE(nvmeq));
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} else {
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dma_free_coherent(nvmeq->dev->dev, SQ_SIZE(nvmeq->q_depth),
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dma_free_coherent(nvmeq->dev->dev, SQ_SIZE(nvmeq),
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nvmeq->sq_cmds, nvmeq->sq_dma_addr);
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}
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}
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@ -1433,12 +1433,12 @@ static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
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}
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static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
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int qid, int depth)
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int qid)
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{
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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if (qid && dev->cmb_use_sqes && (dev->cmbsz & NVME_CMBSZ_SQS)) {
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nvmeq->sq_cmds = pci_alloc_p2pmem(pdev, SQ_SIZE(depth));
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nvmeq->sq_cmds = pci_alloc_p2pmem(pdev, SQ_SIZE(nvmeq));
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if (nvmeq->sq_cmds) {
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nvmeq->sq_dma_addr = pci_p2pmem_virt_to_bus(pdev,
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nvmeq->sq_cmds);
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@ -1447,11 +1447,11 @@ static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
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return 0;
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}
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pci_free_p2pmem(pdev, nvmeq->sq_cmds, SQ_SIZE(depth));
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pci_free_p2pmem(pdev, nvmeq->sq_cmds, SQ_SIZE(nvmeq));
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}
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}
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nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
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nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(nvmeq),
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&nvmeq->sq_dma_addr, GFP_KERNEL);
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if (!nvmeq->sq_cmds)
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return -ENOMEM;
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@ -1465,12 +1465,13 @@ static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth)
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if (dev->ctrl.queue_count > qid)
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return 0;
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nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(depth),
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nvmeq->q_depth = depth;
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nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(nvmeq),
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&nvmeq->cq_dma_addr, GFP_KERNEL);
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if (!nvmeq->cqes)
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goto free_nvmeq;
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if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
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if (nvme_alloc_sq_cmds(dev, nvmeq, qid))
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goto free_cqdma;
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nvmeq->dev = dev;
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@ -1479,15 +1480,14 @@ static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth)
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nvmeq->cq_head = 0;
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nvmeq->cq_phase = 1;
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nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
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nvmeq->q_depth = depth;
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nvmeq->qid = qid;
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dev->ctrl.queue_count++;
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return 0;
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free_cqdma:
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dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
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nvmeq->cq_dma_addr);
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dma_free_coherent(dev->dev, CQ_SIZE(nvmeq), (void *)nvmeq->cqes,
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nvmeq->cq_dma_addr);
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free_nvmeq:
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return -ENOMEM;
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}
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@ -1515,7 +1515,7 @@ static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
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nvmeq->cq_head = 0;
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nvmeq->cq_phase = 1;
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nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
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memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
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memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq));
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nvme_dbbuf_init(dev, nvmeq, qid);
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dev->online_queues++;
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wmb(); /* ensure the first interrupt sees the initialization */
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