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drm/xe/guc: Move GuC power control init to "post-hwconfig" 

SLPC is not used at "hwconfig" stage. Move the initialization of data
structures used for SLPC to a later point in probe.
Also - move the xe_guc_pc_init_early to happen just prior to initial
"hwconfig" load.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240219130530.1406044-3-michal.winiarski@intel.com
This commit is contained in:
Michał Winiarski 2024-02-19 14:05:29 +01:00 committed by Rodrigo Vivi
parent 7606f7d0f0
commit 8a4587ef9f
4 changed files with 22 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/xe/xe_gt.c
View File

@ -368,9 +368,6 @@ static int gt_fw_domain_init(struct xe_gt *gt)
if (err)
goto err_force_wake;
/* Raise GT freq to speed up HuC/GuC load */
xe_guc_pc_init_early(&gt->uc.guc.pc);
err = xe_uc_init_hwconfig(&gt->uc);
if (err)
goto err_force_wake;

12
drivers/gpu/drm/xe/xe_guc.c
View File

@ -251,7 +251,6 @@ static void guc_fini(struct drm_device *drm, void *arg)
struct xe_guc *guc = arg;
xe_force_wake_get(gt_to_fw(guc_to_gt(guc)), XE_FORCEWAKE_ALL);
xe_guc_pc_fini(&guc->pc);
xe_uc_fini_hw(&guc_to_gt(guc)->uc);
xe_force_wake_put(gt_to_fw(guc_to_gt(guc)), XE_FORCEWAKE_ALL);
}
@ -330,10 +329,6 @@ int xe_guc_init(struct xe_guc *guc)
if (ret)
goto out;
ret = xe_guc_pc_init(&guc->pc);
if (ret)
goto out;
ret = drmm_add_action_or_reset(&gt_to_xe(gt)->drm, guc_fini, guc);
if (ret)
goto out;
@ -367,6 +362,10 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
guc_init_params_post_hwconfig(guc);
ret = xe_guc_pc_init(&guc->pc);
if (ret)
return ret;
return xe_guc_ads_init_post_hwconfig(&guc->ads);
}
@ -574,6 +573,9 @@ int xe_guc_min_load_for_hwconfig(struct xe_guc *guc)
xe_guc_ads_populate_minimal(&guc->ads);
/* Raise GT freq to speed up HuC/GuC load */
xe_guc_pc_init_early(&guc->pc);
ret = __xe_guc_upload(guc);
if (ret)
return ret;

19
drivers/gpu/drm/xe/xe_guc_pc.c
View File

@ -956,10 +956,12 @@ out:
/**
* xe_guc_pc_fini - Finalize GuC's Power Conservation component
* @pc: Xe_GuC_PC instance
* @drm: DRM device
* @arg: opaque pointer that should point to Xe_GuC_PC instance
*/
void xe_guc_pc_fini(struct xe_guc_pc *pc)
static void xe_guc_pc_fini(struct drm_device *drm, void *arg)
{
struct xe_guc_pc *pc = arg;
struct xe_device *xe = pc_to_xe(pc);
if (xe->info.skip_guc_pc) {
@ -969,9 +971,10 @@ void xe_guc_pc_fini(struct xe_guc_pc *pc)
return;
}
xe_force_wake_get(gt_to_fw(pc_to_gt(pc)), XE_FORCEWAKE_ALL);
XE_WARN_ON(xe_guc_pc_gucrc_disable(pc));
XE_WARN_ON(xe_guc_pc_stop(pc));
mutex_destroy(&pc->freq_lock);
xe_force_wake_put(gt_to_fw(pc_to_gt(pc)), XE_FORCEWAKE_ALL);
}
/**
@ -985,11 +988,14 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
struct xe_device *xe = gt_to_xe(gt);
struct xe_bo *bo;
u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
int err;
if (xe->info.skip_guc_pc)
return 0;
mutex_init(&pc->freq_lock);
err = drmm_mutex_init(&xe->drm, &pc->freq_lock);
if (err)
return err;
bo = xe_managed_bo_create_pin_map(xe, tile, size,
XE_BO_CREATE_VRAM_IF_DGFX(tile) |
@ -998,5 +1004,10 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
return PTR_ERR(bo);
pc->bo = bo;
err = drmm_add_action_or_reset(&xe->drm, xe_guc_pc_fini, pc);
if (err)
return err;
return 0;
}

1
drivers/gpu/drm/xe/xe_guc_pc.h
View File

@ -9,7 +9,6 @@
#include "xe_guc_pc_types.h"
int xe_guc_pc_init(struct xe_guc_pc *pc);
void xe_guc_pc_fini(struct xe_guc_pc *pc);
int xe_guc_pc_start(struct xe_guc_pc *pc);
int xe_guc_pc_stop(struct xe_guc_pc *pc);
int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);