mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-06 16:49:22 +00:00
spi: microchip-core-qspi: fix setting spi bus clock rate
commitef13561d2b
upstream. Before ORing the new clock rate with the control register value read from the hardware, the existing clock rate needs to be masked off as otherwise the existing value will interfere with the new one. CC: stable@vger.kernel.org Fixes:8596124c4c
("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240508-fox-unpiloted-b97e1535627b@spud Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
e9f867739b
commit
8a5e88cbde
1 changed files with 1 additions and 0 deletions
|
@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
|
|||
}
|
||||
|
||||
control = readl_relaxed(qspi->regs + REG_CONTROL);
|
||||
control &= ~CONTROL_CLKRATE_MASK;
|
||||
control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
|
||||
writel_relaxed(control, qspi->regs + REG_CONTROL);
|
||||
control = readl_relaxed(qspi->regs + REG_CONTROL);
|
||||
|
|
Loading…
Reference in a new issue