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RISC-V: use REG_S/REG_L for mcount 

In preparation for rv32i ftrace support, convert mcount routines to use
native sized loads/stores.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Link: https://lore.kernel.org/r/20221115200832.706370-2-jamie@jamieiles.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Jamie Iles 2022-11-15 20:08:29 +00:00 committed by Palmer Dabbelt
parent 9abf2313ad
commit 8a6841c439
No known key found for this signature in database
GPG Key ID: 2E1319F35FBB1889
1 changed files with 15 additions and 15 deletions
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30
arch/riscv/kernel/mcount.S
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@ -15,8 +15,8 @@
.macro SAVE_ABI_STATE
addi sp, sp, -16
sd s0, 0(sp)
sd ra, 8(sp)
REG_S s0, 0(sp)
REG_S ra, 8(sp)
addi s0, sp, 16
.endm
@ -26,22 +26,22 @@
*/
.macro SAVE_RET_ABI_STATE
addi sp, sp, -32
sd s0, 16(sp)
sd ra, 24(sp)
sd a0, 8(sp)
REG_S s0, 16(sp)
REG_S ra, 24(sp)
REG_S a0, 8(sp)
addi s0, sp, 32
.endm
.macro RESTORE_ABI_STATE
ld ra, 8(sp)
ld s0, 0(sp)
REG_L ra, 8(sp)
REG_L s0, 0(sp)
addi sp, sp, 16
.endm
.macro RESTORE_RET_ABI_STATE
ld ra, 24(sp)
ld s0, 16(sp)
ld a0, 8(sp)
REG_L ra, 24(sp)
REG_L s0, 16(sp)
REG_L a0, 8(sp)
addi sp, sp, 32
.endm
@ -82,16 +82,16 @@ ENTRY(MCOUNT_NAME)
la t4, ftrace_stub
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
la t0, ftrace_graph_return
ld t1, 0(t0)
REG_L t1, 0(t0)
bne t1, t4, do_ftrace_graph_caller
la t3, ftrace_graph_entry
ld t2, 0(t3)
REG_L t2, 0(t3)
la t6, ftrace_graph_entry_stub
bne t2, t6, do_ftrace_graph_caller
#endif
la t3, ftrace_trace_function
ld t5, 0(t3)
REG_L t5, 0(t3)
bne t5, t4, do_trace
ret
@ -104,7 +104,7 @@ do_ftrace_graph_caller:
addi a0, s0, -8
mv a1, ra
#ifdef HAVE_FUNCTION_GRAPH_FP_TEST
ld a2, -16(s0)
REG_L a2, -16(s0)
#endif
SAVE_ABI_STATE
call prepare_ftrace_return
@ -117,7 +117,7 @@ do_ftrace_graph_caller:
* (*ftrace_trace_function)(ra_to_caller, ra_to_caller_of_caller)
*/
do_trace:
ld a1, -8(s0)
REG_L a1, -8(s0)
mv a0, ra
SAVE_ABI_STATE