- add initial support for mt6582 and Prestigio PMT5008 3G tablet

- add basic support for Airoha EN7523
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Merge tag 'v5.17-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

- add initial support for mt6582 and Prestigio PMT5008 3G tablet
- add basic support for Airoha EN7523

* tag 'v5.17-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  ARM: dts: add GPIO support for Airoha EN7523
  ARM: Add basic support for Airoha EN7523 SoC
  dt-bindings: arm: airoha: Add binding for EN7523 SoC and EVB
  dt-bindings: Add vendor prefix for Airoha
  dt-bindings: mediatek: Adds a DT binding documentation for the MT6582 SoC
  ARM: dts: Add initial support for Prestigio PMT5008 3G tablet
  ARM: dts: Add initial support for Mediatek mt6582

Link: https://lore.kernel.org/r/3974dc7e-4185-4d88-ab5b-031a7d24214d@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-03-01 15:09:43 +01:00
commit 8a6ea4edcf
14 changed files with 413 additions and 0 deletions

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@ -0,0 +1,28 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/airoha.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Airoha SoC based Platforms Device Tree Bindings
maintainers:
- Felix Fietkau <nbd@nbd.name>
- John Crispin <john@phrozen.org>
description:
Boards with an Airoha SoC shall have the following properties.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- items:
- enum:
- airoha,en7523-evb
- const: airoha,en7523
additionalProperties: true
...

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@ -30,6 +30,10 @@ properties:
- enum:
- mediatek,mt6580-evbp1
- const: mediatek,mt6580
- items:
- enum:
- prestigio,pmt5008-3g
- const: mediatek,mt6582
- items:
- enum:
- fairphone,fp1

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@ -12,6 +12,7 @@ Required properties:
For those SoCs that use GPT
* "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
* "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
* "mediatek,mt6582-timer" for MT6582 compatible timers (GPT)
* "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
* "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
* "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)

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@ -63,6 +63,8 @@ patternProperties:
description: Aeroflex Gaisler AB
"^aesop,.*":
description: AESOP Embedded Forum
"^airoha,.*":
description: Airoha
"^al,.*":
description: Annapurna Labs
"^alcatel,.*":

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@ -8,6 +8,7 @@ Required properties:
- compatible should contain:
"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
"mediatek,mt2712-wdt": for MT2712
"mediatek,mt6582-wdt", "mediatek,mt6589-wdt": for MT6582
"mediatek,mt6589-wdt": for MT6589
"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622

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@ -573,6 +573,18 @@ config ARCH_VIRT
select HAVE_ARM_ARCH_TIMER
select ARCH_SUPPORTS_BIG_ENDIAN
config ARCH_AIROHA
bool "Airoha SoC Support"
depends on ARCH_MULTI_V7
select ARM_AMBA
select ARM_GIC
select ARM_GIC_V3
select ARM_PSCI
select HAVE_ARM_ARCH_TIMER
select COMMON_CLK
help
Support for Airoha EN7523 SoCs
#
# This is sorted alphabetically by mach-* pathname. However, plat-*
# Kconfigs may be included either alphabetically (according to the

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@ -160,6 +160,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_ACTIONS) += actions
machine-$(CONFIG_ARCH_AIROHA) += airoha
machine-$(CONFIG_ARCH_ALPINE) += alpine
machine-$(CONFIG_ARCH_ARTPEC) += artpec
machine-$(CONFIG_ARCH_ASPEED) += aspeed

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@ -187,6 +187,8 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-lego-ev3.dtb
dtb-$(CONFIG_ARCH_DIGICOLOR) += \
cx92755_equinox.dtb
dtb-$(CONFIG_ARCH_AIROHA) += \
en7523-evb.dtb
dtb-$(CONFIG_ARCH_EXYNOS3) += \
exynos3250-artik5-eval.dtb \
exynos3250-monk.dtb \

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@ -0,0 +1,35 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
/* Bootloader installs ATF here */
/memreserve/ 0x80000000 0x200000;
#include "en7523.dtsi"
/ {
model = "Airoha EN7523 Evaluation Board";
compatible = "airoha,en7523-evb", "airoha,en7523";
aliases {
serial0 = &uart1;
};
chosen {
bootargs = "console=ttyS0,115200 earlycon";
stdout-path = "serial0:115200n8";
linux,usable-memory-range = <0x80200000 0x1fe00000>;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};

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@ -0,0 +1,138 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
npu_binary@84000000 {
no-map;
reg = <0x84000000 0xA00000>;
};
npu_flag@84B0000 {
no-map;
reg = <0x84B00000 0x100000>;
};
npu_pkt@85000000 {
no-map;
reg = <0x85000000 0x1A00000>;
};
npu_phyaddr@86B00000 {
no-map;
reg = <0x86B00000 0x100000>;
};
npu_rxdesc@86D00000 {
no-map;
reg = <0x86D00000 0x100000>;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
enable-method = "psci";
clock-frequency = <80000000>;
next-level-cache = <&L2_0>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
enable-method = "psci";
clock-frequency = <80000000>;
next-level-cache = <&L2_0>;
};
L2_0: l2-cache0 {
compatible = "cache";
};
};
gic: interrupt-controller@9000000 {
compatible = "arm,gic-v3";
interrupt-controller;
#interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x09000000 0x20000>,
<0x09080000 0x80000>,
<0x09400000 0x2000>,
<0x09500000 0x2000>,
<0x09600000 0x20000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
uart1: serial@1fbf0000 {
compatible = "ns16550";
reg = <0x1fbf0000 0x30>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <1843200>;
status = "okay";
};
gpio0: gpio@1fbf0200 {
compatible = "airoha,en7523-gpio";
reg = <0x1fbf0204 0x4>,
<0x1fbf0200 0x4>,
<0x1fbf0220 0x4>,
<0x1fbf0214 0x4>;
gpio-controller;
#gpio-cells = <2>;
};
gpio1: gpio@1fbf0270 {
compatible = "airoha,en7523-gpio";
reg = <0x1fbf0270 0x4>,
<0x1fbf0260 0x4>,
<0x1fbf0264 0x4>,
<0x1fbf0278 0x4>;
gpio-controller;
#gpio-cells = <2>;
};
};

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@ -0,0 +1,43 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru>
*/
/dts-v1/;
#include "mt6582.dtsi"
/ {
model = "Prestigio PMT5008 3G";
compatible = "prestigio,pmt5008-3g", "mediatek,mt6582";
aliases {
bootargs = "console=ttyS0,921600n8 earlyprintk";
serial0 = &uart0;
serial3 = &uart3;
};
chosen {
stdout-path = "serial0:921600n8";
};
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};

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@ -0,0 +1,128 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru>
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mediatek,mt6582";
interrupt-parent = <&sysirq>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x3>;
};
};
system_clk: dummy13m {
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
};
rtc_clk: dummy32k {
compatible = "fixed-clock";
clock-frequency = <32000>;
#clock-cells = <0>;
};
uart_clk: dummy26m {
compatible = "fixed-clock";
clock-frequency = <26000000>;
#clock-cells = <0>;
};
timer: timer@11008000 {
compatible = "mediatek,mt6577-timer";
reg = <0x10008000 0x80>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
clocks = <&system_clk>, <&rtc_clk>;
clock-names = "system-clk", "rtc-clk";
};
sysirq: interrupt-controller@10200100 {
compatible = "mediatek,mt6582-sysirq",
"mediatek,mt6577-sysirq";
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0x10200100 0x1c>;
};
gic: interrupt-controller@10211000 {
compatible = "arm,cortex-a7-gic";
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0x10211000 0x1000>,
<0x10212000 0x2000>,
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
uart0: serial@11002000 {
compatible = "mediatek,mt6582-uart",
"mediatek,mt6577-uart";
reg = <0x11002000 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
status = "disabled";
};
uart1: serial@11003000 {
compatible = "mediatek,mt6582-uart",
"mediatek,mt6577-uart";
reg = <0x11003000 0x400>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@11004000 {
compatible = "mediatek,mt6582-uart",
"mediatek,mt6577-uart";
reg = <0x11004000 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
status = "disabled";
};
uart3: serial@11005000 {
compatible = "mediatek,mt6582-uart",
"mediatek,mt6577-uart";
reg = <0x11005000 0x400>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
status = "disabled";
};
watchdog: watchdog@10007000 {
compatible = "mediatek,mt6582-wdt",
"mediatek,mt6589-wdt";
reg = <0x10007000 0x100>;
};
};

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@ -0,0 +1,2 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y += airoha.o

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@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Device Tree support for Airoha SoCs
*
* Copyright (c) 2022 Felix Fietkau <nbd@nbd.name>
*/
#include <asm/mach/arch.h>
static const char * const airoha_board_dt_compat[] = {
"airoha,en7523",
NULL,
};
DT_MACHINE_START(MEDIATEK_DT, "Airoha Cortex-A53 (Device Tree)")
.dt_compat = airoha_board_dt_compat,
MACHINE_END