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Merge branch 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux into fixes

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* 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux:
  ARM: make BSYM macro assembly only
  ARM: highbank: remove incorrect BSYM usage
  ARM: imx: remove incorrect BSYM usage
  ARM: exynos: remove incorrect BSYM usage
  ARM: ux500: add missing ENDPROC to headsmp.S
  ARM: msm: Add missing ENDPROC to headsmp.S
  ARM: versatile: Add missing ENDPROC to headsmp.S
This commit is contained in:
Olof Johansson 2012-01-16 22:46:06 -08:00
commit 8b0f6d12de
10 changed files with 14 additions and 14 deletions
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4
arch/arm/include/asm/unified.h
View file

@ -37,8 +37,8 @@
#define THUMB(x...) x #define THUMB(x...) x
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
#define W(instr) instr.w #define W(instr) instr.w
#endif
#define BSYM(sym) sym + 1 #define BSYM(sym) sym + 1
#endif
#else /* !CONFIG_THUMB2_KERNEL */ #else /* !CONFIG_THUMB2_KERNEL */
@ -49,8 +49,8 @@
#define THUMB(x...) #define THUMB(x...)
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
#define W(instr) instr #define W(instr) instr
#endif
#define BSYM(sym) sym #define BSYM(sym) sym
#endif
#endif /* CONFIG_THUMB2_KERNEL */ #endif /* CONFIG_THUMB2_KERNEL */

2
arch/arm/mach-exynos/headsmp.S
View file

@ -36,6 +36,8 @@ pen: ldr r7, [r6]
* should now contain the SVC stack for this core * should now contain the SVC stack for this core
*/ */
b secondary_startup b secondary_startup
ENDPROC(exynos4_secondary_startup)
.align 2
1: .long . 1: .long .
.long pen_release .long pen_release

5
arch/arm/mach-exynos/platsmp.c
View file

@ -24,7 +24,6 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <asm/unified.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/regs-clock.h> #include <mach/regs-clock.h>
@ -137,7 +136,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
smp_rmb(); smp_rmb();
__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), __raw_writel(virt_to_phys(exynos4_secondary_startup),
CPU1_BOOT_REG); CPU1_BOOT_REG);
gic_raise_softirq(cpumask_of(cpu), 1); gic_raise_softirq(cpumask_of(cpu), 1);
@ -192,6 +191,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the * until it receives a soft interrupt, and then the
* secondary CPU branches to this address. * secondary CPU branches to this address.
*/ */
__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), __raw_writel(virt_to_phys(exynos4_secondary_startup),
CPU1_BOOT_REG); CPU1_BOOT_REG);
} }

3
arch/arm/mach-highbank/highbank.c
View file

@ -25,7 +25,6 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/unified.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <asm/hardware/arm_timer.h> #include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h> #include <asm/hardware/timer-sp.h>
@ -76,7 +75,7 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
cpu = cpu_logical_map(cpu); cpu = cpu_logical_map(cpu);
#endif #endif
writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
HB_JUMP_TABLE_PHYS(cpu) + 15); HB_JUMP_TABLE_PHYS(cpu) + 15);

3
arch/arm/mach-imx/src.c
View file

@ -15,7 +15,6 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/smp.h> #include <linux/smp.h>
#include <asm/unified.h>
#define SRC_SCR 0x000 #define SRC_SCR 0x000
#define SRC_GPR1 0x020 #define SRC_GPR1 0x020
@ -43,7 +42,7 @@ void imx_enable_cpu(int cpu, bool enable)
void imx_set_cpu_jump(int cpu, void *jump_addr) void imx_set_cpu_jump(int cpu, void *jump_addr)
{ {
cpu = cpu_logical_map(cpu); cpu = cpu_logical_map(cpu);
writel_relaxed(BSYM(virt_to_phys(jump_addr)), writel_relaxed(virt_to_phys(jump_addr),
src_base + SRC_GPR1 + cpu * 8); src_base + SRC_GPR1 + cpu * 8);
} }

1
arch/arm/mach-msm/headsmp.S
View file

@ -34,6 +34,7 @@ pen: ldr r7, [r6]
* should now contain the SVC stack for this core * should now contain the SVC stack for this core
*/ */
b secondary_startup b secondary_startup
ENDPROC(msm_secondary_startup)
.align .align
1: .long . 1: .long .

3
arch/arm/mach-realview/platsmp.c
View file

@ -17,7 +17,6 @@
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <asm/unified.h>
#include <mach/board-eb.h> #include <mach/board-eb.h>
#include <mach/board-pb11mp.h> #include <mach/board-pb11mp.h>
@ -75,6 +74,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the * until it receives a soft interrupt, and then the
* secondary CPU branches to this address. * secondary CPU branches to this address.
*/ */
__raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)), __raw_writel(virt_to_phys(versatile_secondary_startup),
__io_address(REALVIEW_SYS_FLAGSSET)); __io_address(REALVIEW_SYS_FLAGSSET));
} }

2
arch/arm/mach-ux500/headsmp.S
View file

@ -32,6 +32,8 @@ pen: ldr r7, [r6]
* should now contain the SVC stack for this core * should now contain the SVC stack for this core
*/ */
b secondary_startup b secondary_startup
ENDPROC(u8500_secondary_startup)
.align 2
1: .long . 1: .long .
.long pen_release .long pen_release

4
arch/arm/mach-vexpress/platsmp.c
View file

@ -13,8 +13,6 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/io.h> #include <linux/io.h>
#include <asm/unified.h>
#include <mach/motherboard.h> #include <mach/motherboard.h>
#define V2M_PA_CS7 0x10000000 #define V2M_PA_CS7 0x10000000
@ -46,6 +44,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* secondary CPU branches to this address. * secondary CPU branches to this address.
*/ */
writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR)); writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
writel(BSYM(virt_to_phys(versatile_secondary_startup)), writel(virt_to_phys(versatile_secondary_startup),
MMIO_P2V(V2M_SYS_FLAGSSET)); MMIO_P2V(V2M_SYS_FLAGSSET));
} }

1
arch/arm/plat-versatile/headsmp.S
View file

@ -38,3 +38,4 @@ pen: ldr r7, [r6]
.align .align
1: .long . 1: .long .
.long pen_release .long pen_release
ENDPROC(versatile_secondary_startup)