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ath9k: add TPC capability to TX descriptor path
Add TPC capability to TX descriptor path. Cap per-packet TX power according to TX power per-rate tables. Currently TPC is supported just by AR9003 based chips Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
23f53dd306
commit
8b537686a1
6 changed files with 49 additions and 12 deletions
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@ -281,7 +281,7 @@ ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
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ACCESS_ONCE(ads->ds_ctl0) = (i->pkt_len & AR_FrameLen)
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| (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
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| SM(i->txpower, AR_XmitPower0)
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| SM(i->txpower[0], AR_XmitPower0)
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| (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
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| (i->flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
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| (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
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@ -307,9 +307,9 @@ ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
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| set11nRateFlags(i->rates, 3)
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| SM(i->rtscts_rate, AR_RTSCTSRate);
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ACCESS_ONCE(ads->ds_ctl9) = SM(i->txpower, AR_XmitPower1);
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ACCESS_ONCE(ads->ds_ctl10) = SM(i->txpower, AR_XmitPower2);
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ACCESS_ONCE(ads->ds_ctl11) = SM(i->txpower, AR_XmitPower3);
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ACCESS_ONCE(ads->ds_ctl9) = SM(i->txpower[1], AR_XmitPower1);
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ACCESS_ONCE(ads->ds_ctl10) = SM(i->txpower[2], AR_XmitPower2);
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ACCESS_ONCE(ads->ds_ctl11) = SM(i->txpower[3], AR_XmitPower3);
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}
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static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
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@ -101,7 +101,7 @@ ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
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ACCESS_ONCE(ads->ctl11) = (i->pkt_len & AR_FrameLen)
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| (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
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| SM(i->txpower, AR_XmitPower0)
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| SM(i->txpower[0], AR_XmitPower0)
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| (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
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| (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
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| (i->flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0)
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@ -152,9 +152,9 @@ ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
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ACCESS_ONCE(ads->ctl19) = AR_Not_Sounding;
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ACCESS_ONCE(ads->ctl20) = SM(i->txpower, AR_XmitPower1);
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ACCESS_ONCE(ads->ctl21) = SM(i->txpower, AR_XmitPower2);
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ACCESS_ONCE(ads->ctl22) = SM(i->txpower, AR_XmitPower3);
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ACCESS_ONCE(ads->ctl20) = SM(i->txpower[1], AR_XmitPower1);
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ACCESS_ONCE(ads->ctl21) = SM(i->txpower[2], AR_XmitPower2);
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ACCESS_ONCE(ads->ctl22) = SM(i->txpower[3], AR_XmitPower3);
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}
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static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads)
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@ -189,6 +189,7 @@ struct ath_frame_info {
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u8 rtscts_rate;
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u8 retries : 7;
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u8 baw_tracked : 1;
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u8 tx_power;
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};
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struct ath_rxbuf {
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@ -78,7 +78,7 @@ static void ath9k_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
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struct ath_tx_info info;
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struct ieee80211_supported_band *sband;
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u8 chainmask = ah->txchainmask;
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u8 rate = 0;
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u8 i, rate = 0;
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sband = &common->sbands[sc->cur_chandef.chan->band];
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rate = sband->bitrates[rateidx].hw_value;
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@ -88,7 +88,8 @@ static void ath9k_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
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memset(&info, 0, sizeof(info));
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info.pkt_len = skb->len + FCS_LEN;
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info.type = ATH9K_PKT_TYPE_BEACON;
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info.txpower = MAX_RATE_POWER;
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for (i = 0; i < 4; i++)
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info.txpower[i] = MAX_RATE_POWER;
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info.keyix = ATH9K_TXKEYIX_INVALID;
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info.keytype = ATH9K_KEY_TYPE_CLEAR;
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info.flags = ATH9K_TXDESC_NOACK | ATH9K_TXDESC_CLRDMASK;
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@ -704,7 +704,7 @@ struct ath_tx_info {
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enum ath9k_pkt_type type;
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enum ath9k_key_type keytype;
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u8 keyix;
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u8 txpower;
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u8 txpower[4];
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};
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struct ath_hw;
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@ -1096,6 +1096,37 @@ void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
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}
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}
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static u8 ath_get_rate_txpower(struct ath_softc *sc, struct ath_buf *bf,
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u8 rateidx)
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{
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u8 max_power;
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struct ath_hw *ah = sc->sc_ah;
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if (sc->tx99_state)
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return MAX_RATE_POWER;
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if (!AR_SREV_9300_20_OR_LATER(ah)) {
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/* ar9002 is not sipported for the moment */
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return MAX_RATE_POWER;
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}
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if (!bf->bf_state.bfs_paprd) {
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struct sk_buff *skb = bf->bf_mpdu;
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct ath_frame_info *fi = get_frame_info(skb);
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if (rateidx < 8 && (info->flags & IEEE80211_TX_CTL_STBC))
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max_power = min(ah->tx_power_stbc[rateidx],
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fi->tx_power);
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else
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max_power = min(ah->tx_power[rateidx], fi->tx_power);
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} else {
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max_power = ah->paprd_training_power;
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}
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return max_power;
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}
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static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
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struct ath_tx_info *info, int len, bool rts)
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{
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@ -1166,6 +1197,8 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
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is_40, is_sgi, is_sp);
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if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
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info->rates[i].RateFlags |= ATH9K_RATESERIES_STBC;
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info->txpower[i] = ath_get_rate_txpower(sc, bf, rix);
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continue;
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}
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@ -1193,6 +1226,8 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
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info->rates[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
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phy, rate->bitrate * 100, len, rix, is_sp);
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info->txpower[i] = ath_get_rate_txpower(sc, bf, rix);
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}
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/* For AR5416 - RTS cannot be followed by a frame larger than 8K */
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@ -1239,7 +1274,6 @@ static void ath_tx_fill_desc(struct ath_softc *sc, struct ath_buf *bf,
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memset(&info, 0, sizeof(info));
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info.is_first = true;
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info.is_last = true;
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info.txpower = MAX_RATE_POWER;
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info.qcu = txq->axq_qnum;
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while (bf) {
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@ -2063,6 +2097,7 @@ static void setup_frame_info(struct ieee80211_hw *hw,
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fi->keyix = ATH9K_TXKEYIX_INVALID;
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fi->keytype = keytype;
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fi->framelen = framelen;
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fi->tx_power = MAX_RATE_POWER;
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if (!rate)
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return;
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