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iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown

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When a present pasid entry is disassembled, all kinds of pasid related
caches need to be flushed. But when a pasid entry is not being used
(PRESENT bit not set), we don't need to do this. Check the PRESENT bit
in intel_pasid_tear_down_entry() and avoid flushing caches if it's not
set.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20210320025415.641201-6-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Lu Baolu 2021-03-20 10:54:15 +08:00 committed by Joerg Roedel
parent c0474a606e
commit 8b74b6ab25
1 changed files with 3 additions and 0 deletions
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3
drivers/iommu/intel/pasid.c
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@ -517,6 +517,9 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
if (WARN_ON(!pte))
return;
if (!(pte->val[0] & PASID_PTE_PRESENT))
return;
did = pasid_get_domain_id(pte);
intel_pasid_clear_entry(dev, pasid, fault_ignore);