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ARM: dts: uniphier: Add USB2 PHY nodes

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Add nodes of USB2 physical layer for UniPhier SoC. This supports Pro4.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Kunihiko Hayashi 2018-10-02 20:12:00 +09:00 committed by Masahiro Yamada
parent 45be1573ad
commit 8bb2f53203
1 changed files with 34 additions and 1 deletions
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35
arch/arm/boot/dts/uniphier-pro4.dtsi
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@ -328,6 +328,8 @@ usb2: usb@5a800100 {
<&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
phy-names = "usb";
phys = <&usb_phy0>;
has-transaction-translator;
};
@ -342,6 +344,8 @@ usb3: usb@5a810100 {
<&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
phy-names = "usb";
phys = <&usb_phy1>;
has-transaction-translator;
};
@ -353,6 +357,34 @@ soc_glue: soc-glue@5f800000 {
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro4-pinctrl";
};
usb-phy {
compatible = "socionext,uniphier-pro4-usb2-phy";
#address-cells = <1>;
#size-cells = <0>;
usb_phy0: phy@0 {
reg = <0>;
#phy-cells = <0>;
};
usb_phy1: phy@1 {
reg = <1>;
#phy-cells = <0>;
};
usb_phy2: phy@2 {
reg = <2>;
#phy-cells = <0>;
vbus-supply = <&usb0_vbus>;
};
usb_phy3: phy@3 {
reg = <3>;
#phy-cells = <0>;
vbus-supply = <&usb1_vbus>;
};
};
};
soc-glue@5f900000 {
@ -456,7 +488,7 @@ usb0: usb@65a00000 {
clock-names = "ref", "bus_early", "suspend";
clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
resets = <&usb0_rst 4>;
phys = <&usb0_ssphy>;
phys = <&usb_phy2>, <&usb0_ssphy>;
dr_mode = "host";
};
@ -509,6 +541,7 @@ usb1: usb@65c00000 {
clock-names = "ref", "bus_early", "suspend";
clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
resets = <&usb1_rst 4>;
phys = <&usb_phy3>;
dr_mode = "host";
};