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Blackfin arch: Initialize the exception vectors early in the boot process

Browse source 
Initialize the exception vectors early in the boot process, so that CPLB faults
can be handled when memory protection is enabled.

Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Bernd Schmidt 2007-07-25 14:44:49 +08:00 committed by Bryan Wu
parent d6e274ddb5
commit 8be80ed3f7
4 changed files with 48 additions and 37 deletions
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1
arch/blackfin/kernel/setup.c
View file

@ -425,6 +425,7 @@ void __init setup_arch(char **cmdline_p)
BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
!= ATOMIC_XOR32 - FIXED_CODE_START);
init_exception_vectors();
bf53x_cache_init();
}

41
arch/blackfin/mach-common/ints-priority-dc.c
View file

@ -358,6 +358,29 @@ static void bf561_demux_gpio_irq(unsigned int inta_irq,
#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */
void __init init_exception_vectors(void)
{
SSYNC();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
bfin_write_EVT2(evt_evt2);
bfin_write_EVT3(trap);
bfin_write_EVT5(evt_ivhw);
bfin_write_EVT6(evt_timer);
bfin_write_EVT7(evt_evt7);
bfin_write_EVT8(evt_evt8);
bfin_write_EVT9(evt_evt9);
bfin_write_EVT10(evt_evt10);
bfin_write_EVT11(evt_evt11);
bfin_write_EVT12(evt_evt12);
bfin_write_EVT13(evt_evt13);
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
}
/*
* This function should be called during kernel startup to initialize
* the BFin IRQ handling routines.
@ -378,24 +401,6 @@ int __init init_arch_irq(void)
init_exception_buff();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
bfin_write_EVT2(evt_evt2);
bfin_write_EVT3(trap);
bfin_write_EVT5(evt_ivhw);
bfin_write_EVT6(evt_timer);
bfin_write_EVT7(evt_evt7);
bfin_write_EVT8(evt_evt8);
bfin_write_EVT9(evt_evt9);
bfin_write_EVT10(evt_evt10);
bfin_write_EVT11(evt_evt11);
bfin_write_EVT12(evt_evt12);
bfin_write_EVT13(evt_evt13);
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR)
set_irq_chip(irq, &bf561_core_irqchip);

42
arch/blackfin/mach-common/ints-priority-sc.c
View file

@ -713,6 +713,29 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
}
#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */
void __init init_exception_vectors(void)
{
SSYNC();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
bfin_write_EVT2(evt_evt2);
bfin_write_EVT3(trap);
bfin_write_EVT5(evt_ivhw);
bfin_write_EVT6(evt_timer);
bfin_write_EVT7(evt_evt7);
bfin_write_EVT8(evt_evt8);
bfin_write_EVT9(evt_evt9);
bfin_write_EVT10(evt_evt10);
bfin_write_EVT11(evt_evt11);
bfin_write_EVT12(evt_evt12);
bfin_write_EVT13(evt_evt13);
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
}
/*
* This function should be called during kernel startup to initialize
* the BFin IRQ handling routines.
@ -733,29 +756,10 @@ int __init init_arch_irq(void)
bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
bfin_write_SIC_IWR(IWR_ENABLE_ALL);
#endif
SSYNC();
local_irq_disable();
#ifndef CONFIG_KGDB
bfin_write_EVT0(evt_emulation);
#endif
bfin_write_EVT2(evt_evt2);
bfin_write_EVT3(trap);
bfin_write_EVT5(evt_ivhw);
bfin_write_EVT6(evt_timer);
bfin_write_EVT7(evt_evt7);
bfin_write_EVT8(evt_evt8);
bfin_write_EVT9(evt_evt9);
bfin_write_EVT10(evt_evt10);
bfin_write_EVT11(evt_evt11);
bfin_write_EVT12(evt_evt12);
bfin_write_EVT13(evt_evt13);
bfin_write_EVT14(evt14_softirq);
bfin_write_EVT15(evt_system_call);
CSYNC();
#if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && defined(CONFIG_BF54x)
#ifdef CONFIG_PINTx_REASSIGN
pint[0]->assign = CONFIG_PINT0_ASSIGN;

1
include/asm-blackfin/bfin-global.h
View file

@ -61,6 +61,7 @@ extern void bfin_dcache_init(void);
extern int read_iloc(void);
extern int bfin_console_init(void);
extern asmlinkage void lower_to_irq14(void);
extern void init_exception_vectors(void);
extern void init_dma(void);
extern void program_IAR(void);
extern void evt14_softirq(void);