mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-25 02:09:42 +00:00
Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: omap: Fix wrong condition check in while loop for mailbox and iommu2 omap: rng: Use resource_size instead of manual calculation omap: Fix MMC gpio_wp for BeagleBoard C2 and above omap: Fix matrix_keymap_data usage omap: Fix a OMAP_MPUIO_VBASE typo for 850 omap: Fix wrong jtag_id for 850 omap: iovmm: Fix compiler warning omap: mailbox: Flush posted write when acking mailbox irq omap: mailbox: Execute softreset at startup omap: Add missing mux pin for EHCI phy reset line omap: Fix 44xx compile omap: Fix mcspi compile for 2420 omap: Fix compile for arch/arm/mach-omap2
This commit is contained in:
commit
8c11499a49
20 changed files with 147 additions and 71 deletions
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@ -38,7 +38,7 @@ static struct omap_id omap_ids[] __initdata = {
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{ .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
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{ .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
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{ .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
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{ .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
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{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
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{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
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{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320500, .type = 0x08500000},
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{ .jtag_id = 0xb62c, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x08500000},
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{ .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
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{ .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
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{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
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{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
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{ .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
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{ .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
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@ -54,7 +54,7 @@
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#define TWL4030_MSECURE_GPIO 22
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#define TWL4030_MSECURE_GPIO 22
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static int sdp3430_keymap[] = {
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static int board_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(0, 0, KEY_LEFT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 2, KEY_A),
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KEY(0, 2, KEY_A),
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@ -88,11 +88,15 @@ static int sdp3430_keymap[] = {
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0
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0
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};
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data sdp3430_kp_data = {
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static struct twl4030_keypad_data sdp3430_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 5,
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.rows = 5,
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.cols = 6,
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.cols = 6,
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.keymap = sdp3430_keymap,
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.keymapsize = ARRAY_SIZE(sdp3430_keymap),
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.rep = 1,
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.rep = 1,
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};
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};
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@ -80,7 +80,7 @@ static struct platform_device ldp_smsc911x_device = {
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},
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},
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};
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};
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static int ldp_twl4030_keymap[] = {
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static int board_keymap[] = {
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KEY(0, 0, KEY_1),
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KEY(0, 0, KEY_1),
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KEY(1, 0, KEY_2),
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KEY(1, 0, KEY_2),
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KEY(2, 0, KEY_3),
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KEY(2, 0, KEY_3),
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@ -101,11 +101,15 @@ static int ldp_twl4030_keymap[] = {
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0
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0
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};
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data ldp_kp_twl4030_data = {
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static struct twl4030_keypad_data ldp_kp_twl4030_data = {
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.keymap_data = &board_map_data,
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.rows = 6,
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.rows = 6,
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.cols = 6,
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.cols = 6,
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.keymap = ldp_twl4030_keymap,
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.keymapsize = ARRAY_SIZE(ldp_twl4030_keymap),
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.rep = 1,
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.rep = 1,
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};
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};
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@ -139,8 +139,13 @@ static struct gpio_led gpio_leds[];
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static int beagle_twl_gpio_setup(struct device *dev,
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static int beagle_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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unsigned gpio, unsigned ngpio)
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{
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{
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if (system_rev >= 0x20 && system_rev <= 0x34301000) {
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omap_cfg_reg(AG9_34XX_GPIO23);
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mmc[0].gpio_wp = 23;
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} else {
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omap_cfg_reg(AH8_34XX_GPIO29);
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}
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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omap_cfg_reg(AH8_34XX_GPIO29);
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mmc[0].gpio_cd = gpio + 0;
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mmc[0].gpio_cd = gpio + 0;
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twl4030_mmc_init(mmc);
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twl4030_mmc_init(mmc);
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@ -159,7 +159,7 @@ static struct twl4030_usb_data omap3evm_usb_data = {
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.usb_mode = T2_USB_MODE_ULPI,
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.usb_mode = T2_USB_MODE_ULPI,
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};
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};
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static int omap3evm_keymap[] = {
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static int board_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(0, 0, KEY_LEFT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 2, KEY_A),
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KEY(0, 2, KEY_A),
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@ -178,11 +178,15 @@ static int omap3evm_keymap[] = {
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KEY(3, 3, KEY_P)
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KEY(3, 3, KEY_P)
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};
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data omap3evm_kp_data = {
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static struct twl4030_keypad_data omap3evm_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 4,
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.rows = 4,
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.cols = 4,
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.cols = 4,
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.keymap = omap3evm_keymap,
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.keymapsize = ARRAY_SIZE(omap3evm_keymap),
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.rep = 1,
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.rep = 1,
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};
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};
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@ -133,7 +133,7 @@ static void __init pandora_keys_gpio_init(void)
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omap_set_gpio_debounce_time(32 * 5, GPIO_DEBOUNCE_TIME);
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omap_set_gpio_debounce_time(32 * 5, GPIO_DEBOUNCE_TIME);
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}
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}
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static int pandora_keypad_map[] = {
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static int board_keymap[] = {
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/* col, row, code */
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/* col, row, code */
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KEY(0, 0, KEY_9),
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KEY(0, 0, KEY_9),
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KEY(0, 1, KEY_0),
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KEY(0, 1, KEY_0),
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@ -180,11 +180,15 @@ static int pandora_keypad_map[] = {
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KEY(5, 2, KEY_FN),
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KEY(5, 2, KEY_FN),
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};
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data pandora_kp_data = {
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static struct twl4030_keypad_data pandora_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 8,
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.rows = 8,
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.cols = 6,
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.cols = 6,
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.keymap = pandora_keypad_map,
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.keymapsize = ARRAY_SIZE(pandora_keypad_map),
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.rep = 1,
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.rep = 1,
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};
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};
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@ -36,7 +36,7 @@
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#define SYSTEM_REV_B_USES_VAUX3 0x1699
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#define SYSTEM_REV_B_USES_VAUX3 0x1699
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#define SYSTEM_REV_S_USES_VAUX3 0x8
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#define SYSTEM_REV_S_USES_VAUX3 0x8
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static int rx51_keymap[] = {
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static int board_keymap[] = {
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KEY(0, 0, KEY_Q),
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KEY(0, 0, KEY_Q),
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KEY(0, 1, KEY_W),
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KEY(0, 1, KEY_W),
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KEY(0, 2, KEY_E),
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KEY(0, 2, KEY_E),
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@ -83,11 +83,15 @@ static int rx51_keymap[] = {
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KEY(0xff, 5, KEY_F10),
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KEY(0xff, 5, KEY_F10),
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};
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data rx51_kp_data = {
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static struct twl4030_keypad_data rx51_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 8,
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.rows = 8,
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.cols = 8,
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.cols = 8,
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.keymap = rx51_keymap,
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.keymapsize = ARRAY_SIZE(rx51_keymap),
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.rep = 1,
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.rep = 1,
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};
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};
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@ -27,7 +27,7 @@
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#include "mmc-twl4030.h"
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#include "mmc-twl4030.h"
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/* Zoom2 has Qwerty keyboard*/
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/* Zoom2 has Qwerty keyboard*/
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static int zoom2_twl4030_keymap[] = {
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static int board_keymap[] = {
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KEY(0, 0, KEY_E),
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KEY(0, 0, KEY_E),
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KEY(1, 0, KEY_R),
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KEY(1, 0, KEY_R),
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KEY(2, 0, KEY_T),
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KEY(2, 0, KEY_T),
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@ -82,11 +82,15 @@ static int zoom2_twl4030_keymap[] = {
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0
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0
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};
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};
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|
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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|
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static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
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static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
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.keymap_data = &board_map_data,
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.rows = 8,
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.rows = 8,
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.cols = 8,
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.cols = 8,
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.keymap = zoom2_twl4030_keymap,
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.keymapsize = ARRAY_SIZE(zoom2_twl4030_keymap),
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.rep = 1,
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.rep = 1,
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};
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};
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@ -22,7 +22,6 @@
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#include <asm/atomic.h>
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#include <asm/atomic.h>
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|
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#include "cm.h"
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#include "cm.h"
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#include "cm-regbits-4xxx.h"
|
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|
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/* XXX move this to cm.h */
|
/* XXX move this to cm.h */
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/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
|
/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
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|
@ -50,19 +49,7 @@
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*/
|
*/
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int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs)
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int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs)
|
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{
|
{
|
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int i = 0;
|
/* FIXME: Add clock manager related code */
|
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u8 cm_id;
|
return 0;
|
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u16 prcm_mod_offs;
|
|
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u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK;
|
|
||||||
|
|
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cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT;
|
|
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prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK;
|
|
||||||
|
|
||||||
while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs,
|
|
||||||
OMAP4_CM_CLKCTRL_DREG) & mask) != 0) &&
|
|
||||||
(i++ < MAX_MODULE_READY_TIME))
|
|
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udelay(1);
|
|
||||||
|
|
||||||
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
|
|
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}
|
}
|
||||||
|
|
||||||
|
|
|
@ -355,29 +355,60 @@ static struct platform_device omap2_mcspi4 = {
|
||||||
};
|
};
|
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#endif
|
#endif
|
||||||
|
|
||||||
static void omap_init_mcspi(void)
|
#ifdef CONFIG_ARCH_OMAP4
|
||||||
|
static inline void omap4_mcspi_fixup(void)
|
||||||
{
|
{
|
||||||
if (cpu_is_omap44xx()) {
|
omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
|
||||||
omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
|
omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff;
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omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff;
|
omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
|
||||||
omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
|
omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff;
|
||||||
omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff;
|
omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
|
||||||
omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
|
omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff;
|
||||||
omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff;
|
omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
|
||||||
omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
|
omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff;
|
||||||
omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff;
|
}
|
||||||
}
|
#else
|
||||||
platform_device_register(&omap2_mcspi1);
|
static inline void omap4_mcspi_fixup(void)
|
||||||
platform_device_register(&omap2_mcspi2);
|
{
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||||
defined(CONFIG_ARCH_OMAP4)
|
defined(CONFIG_ARCH_OMAP4)
|
||||||
if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
|
static inline void omap2_mcspi3_init(void)
|
||||||
platform_device_register(&omap2_mcspi3);
|
{
|
||||||
|
platform_device_register(&omap2_mcspi3);
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
static inline void omap2_mcspi3_init(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
|
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
|
||||||
if (cpu_is_omap343x() || cpu_is_omap44xx())
|
static inline void omap2_mcspi4_init(void)
|
||||||
platform_device_register(&omap2_mcspi4);
|
{
|
||||||
|
platform_device_register(&omap2_mcspi4);
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
static inline void omap2_mcspi4_init(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static void omap_init_mcspi(void)
|
||||||
|
{
|
||||||
|
if (cpu_is_omap44xx())
|
||||||
|
omap4_mcspi_fixup();
|
||||||
|
|
||||||
|
platform_device_register(&omap2_mcspi1);
|
||||||
|
platform_device_register(&omap2_mcspi2);
|
||||||
|
|
||||||
|
if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
|
||||||
|
omap2_mcspi3_init();
|
||||||
|
|
||||||
|
if (cpu_is_omap343x() || cpu_is_omap44xx())
|
||||||
|
omap2_mcspi4_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -294,10 +294,10 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
|
||||||
else if (cpu_is_omap34xx())
|
else if (cpu_is_omap34xx())
|
||||||
hwmods = omap34xx_hwmods;
|
hwmods = omap34xx_hwmods;
|
||||||
|
|
||||||
omap_hwmod_init(hwmods);
|
|
||||||
omap2_mux_init();
|
|
||||||
#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
|
#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
|
||||||
/* The OPP tables have to be registered before a clk init */
|
/* The OPP tables have to be registered before a clk init */
|
||||||
|
omap_hwmod_init(hwmods);
|
||||||
|
omap2_mux_init();
|
||||||
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
|
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
|
||||||
pwrdm_init(powerdomains_omap);
|
pwrdm_init(powerdomains_omap);
|
||||||
clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
|
clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
|
||||||
|
|
|
@ -79,7 +79,7 @@ static int omap2_iommu_enable(struct iommu *obj)
|
||||||
l = iommu_read_reg(obj, MMU_SYSSTATUS);
|
l = iommu_read_reg(obj, MMU_SYSSTATUS);
|
||||||
if (l & MMU_SYS_RESETDONE)
|
if (l & MMU_SYS_RESETDONE)
|
||||||
break;
|
break;
|
||||||
} while (time_after(jiffies, timeout));
|
} while (!time_after(jiffies, timeout));
|
||||||
|
|
||||||
if (!(l & MMU_SYS_RESETDONE)) {
|
if (!(l & MMU_SYS_RESETDONE)) {
|
||||||
dev_err(obj->dev, "can't take mmu out of reset\n");
|
dev_err(obj->dev, "can't take mmu out of reset\n");
|
||||||
|
|
|
@ -30,6 +30,14 @@
|
||||||
#define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
|
#define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
|
||||||
#define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
|
#define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
|
||||||
|
|
||||||
|
/* SYSCONFIG: register bit definition */
|
||||||
|
#define AUTOIDLE (1 << 0)
|
||||||
|
#define SOFTRESET (1 << 1)
|
||||||
|
#define SMARTIDLE (2 << 3)
|
||||||
|
|
||||||
|
/* SYSSTATUS: register bit definition */
|
||||||
|
#define RESETDONE (1 << 0)
|
||||||
|
|
||||||
#define MBOX_REG_SIZE 0x120
|
#define MBOX_REG_SIZE 0x120
|
||||||
#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
|
#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
|
||||||
|
|
||||||
|
@ -69,21 +77,33 @@ static inline void mbox_write_reg(u32 val, size_t ofs)
|
||||||
/* Mailbox H/W preparations */
|
/* Mailbox H/W preparations */
|
||||||
static int omap2_mbox_startup(struct omap_mbox *mbox)
|
static int omap2_mbox_startup(struct omap_mbox *mbox)
|
||||||
{
|
{
|
||||||
unsigned int l;
|
u32 l;
|
||||||
|
unsigned long timeout;
|
||||||
|
|
||||||
mbox_ick_handle = clk_get(NULL, "mailboxes_ick");
|
mbox_ick_handle = clk_get(NULL, "mailboxes_ick");
|
||||||
if (IS_ERR(mbox_ick_handle)) {
|
if (IS_ERR(mbox_ick_handle)) {
|
||||||
printk("Could not get mailboxes_ick\n");
|
pr_err("Can't get mailboxes_ick\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
clk_enable(mbox_ick_handle);
|
clk_enable(mbox_ick_handle);
|
||||||
|
|
||||||
|
mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG);
|
||||||
|
timeout = jiffies + msecs_to_jiffies(20);
|
||||||
|
do {
|
||||||
|
l = mbox_read_reg(MAILBOX_SYSSTATUS);
|
||||||
|
if (l & RESETDONE)
|
||||||
|
break;
|
||||||
|
} while (!time_after(jiffies, timeout));
|
||||||
|
|
||||||
|
if (!(l & RESETDONE)) {
|
||||||
|
pr_err("Can't take mmu out of reset\n");
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
l = mbox_read_reg(MAILBOX_REVISION);
|
l = mbox_read_reg(MAILBOX_REVISION);
|
||||||
pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
|
pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
|
||||||
|
|
||||||
/* set smart-idle & autoidle */
|
l = SMARTIDLE | AUTOIDLE;
|
||||||
l = mbox_read_reg(MAILBOX_SYSCONFIG);
|
|
||||||
l |= 0x00000011;
|
|
||||||
mbox_write_reg(l, MAILBOX_SYSCONFIG);
|
mbox_write_reg(l, MAILBOX_SYSCONFIG);
|
||||||
|
|
||||||
omap2_mbox_enable_irq(mbox, IRQ_RX);
|
omap2_mbox_enable_irq(mbox, IRQ_RX);
|
||||||
|
@ -156,6 +176,9 @@ static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
|
||||||
u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
|
u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
|
||||||
|
|
||||||
mbox_write_reg(bit, p->irqstatus);
|
mbox_write_reg(bit, p->irqstatus);
|
||||||
|
|
||||||
|
/* Flush posted write for irq status to avoid spurious interrupts */
|
||||||
|
mbox_read_reg(p->irqstatus);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int omap2_mbox_is_irq(struct omap_mbox *mbox,
|
static int omap2_mbox_is_irq(struct omap_mbox *mbox,
|
||||||
|
|
|
@ -460,6 +460,8 @@ MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
|
||||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
||||||
MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
|
MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
|
||||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
||||||
|
MUX_CFG_34XX("AG9_34XX_GPIO23", 0x5ee,
|
||||||
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
||||||
MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
|
MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
|
||||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
||||||
MUX_CFG_34XX("U8_34XX_GPIO54_OUT", 0x0b4,
|
MUX_CFG_34XX("U8_34XX_GPIO54_OUT", 0x0b4,
|
||||||
|
@ -472,6 +474,8 @@ MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc,
|
||||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
||||||
MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
|
MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
|
||||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
||||||
|
MUX_CFG_34XX("AF4_34XX_GPIO135_OUT", 0x162,
|
||||||
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
||||||
MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
|
MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
|
||||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
||||||
MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
|
MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
|
||||||
|
|
|
@ -110,7 +110,7 @@ static struct plat_serial8250_port serial_platform_data2[] = {
|
||||||
.uartclk = OMAP24XX_BASE_BAUD * 16,
|
.uartclk = OMAP24XX_BASE_BAUD * 16,
|
||||||
}, {
|
}, {
|
||||||
#ifdef CONFIG_ARCH_OMAP4
|
#ifdef CONFIG_ARCH_OMAP4
|
||||||
.membase = IO_ADDRESS(OMAP_UART4_BASE),
|
.membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
|
||||||
.mapbase = OMAP_UART4_BASE,
|
.mapbase = OMAP_UART4_BASE,
|
||||||
.irq = 70,
|
.irq = 70,
|
||||||
.flags = UPF_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
|
@ -126,7 +126,7 @@ static struct plat_serial8250_port serial_platform_data2[] = {
|
||||||
#ifdef CONFIG_ARCH_OMAP4
|
#ifdef CONFIG_ARCH_OMAP4
|
||||||
static struct plat_serial8250_port serial_platform_data3[] = {
|
static struct plat_serial8250_port serial_platform_data3[] = {
|
||||||
{
|
{
|
||||||
.membase = IO_ADDRESS(OMAP_UART4_BASE),
|
.membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
|
||||||
.mapbase = OMAP_UART4_BASE,
|
.mapbase = OMAP_UART4_BASE,
|
||||||
.irq = 70,
|
.irq = 70,
|
||||||
.flags = UPF_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
|
@ -579,7 +579,7 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = {
|
||||||
{
|
{
|
||||||
.pdev = {
|
.pdev = {
|
||||||
.name = "serial8250",
|
.name = "serial8250",
|
||||||
.id = 3
|
.id = 3,
|
||||||
.dev = {
|
.dev = {
|
||||||
.platform_data = serial_platform_data3,
|
.platform_data = serial_platform_data3,
|
||||||
},
|
},
|
||||||
|
|
|
@ -250,7 +250,7 @@ static struct gpio_bank gpio_bank_730[7] = {
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_OMAP850
|
#ifdef CONFIG_ARCH_OMAP850
|
||||||
static struct gpio_bank gpio_bank_850[7] = {
|
static struct gpio_bank gpio_bank_850[7] = {
|
||||||
{ OMAP1_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
|
{ OMAP1_MPUIO_VBASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
|
||||||
{ OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
|
{ OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
|
||||||
{ OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
|
{ OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
|
||||||
{ OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
|
{ OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
|
||||||
|
|
|
@ -10,6 +10,8 @@
|
||||||
#ifndef ASMARM_ARCH_KEYPAD_H
|
#ifndef ASMARM_ARCH_KEYPAD_H
|
||||||
#define ASMARM_ARCH_KEYPAD_H
|
#define ASMARM_ARCH_KEYPAD_H
|
||||||
|
|
||||||
|
#include <linux/input/matrix_keypad.h>
|
||||||
|
|
||||||
struct omap_kp_platform_data {
|
struct omap_kp_platform_data {
|
||||||
int rows;
|
int rows;
|
||||||
int cols;
|
int cols;
|
||||||
|
@ -35,9 +37,6 @@ struct omap_kp_platform_data {
|
||||||
|
|
||||||
#define KEY_PERSISTENT 0x00800000
|
#define KEY_PERSISTENT 0x00800000
|
||||||
#define KEYNUM_MASK 0x00EFFFFF
|
#define KEYNUM_MASK 0x00EFFFFF
|
||||||
#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val))
|
|
||||||
#define PERSISTENT_KEY(col, row) (((col) << 28) | ((row) << 24) | \
|
|
||||||
KEY_PERSISTENT)
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -840,12 +840,14 @@ enum omap34xx_index {
|
||||||
*/
|
*/
|
||||||
AF26_34XX_GPIO0,
|
AF26_34XX_GPIO0,
|
||||||
AF22_34XX_GPIO9,
|
AF22_34XX_GPIO9,
|
||||||
|
AG9_34XX_GPIO23,
|
||||||
AH8_34XX_GPIO29,
|
AH8_34XX_GPIO29,
|
||||||
U8_34XX_GPIO54_OUT,
|
U8_34XX_GPIO54_OUT,
|
||||||
U8_34XX_GPIO54_DOWN,
|
U8_34XX_GPIO54_DOWN,
|
||||||
L8_34XX_GPIO63,
|
L8_34XX_GPIO63,
|
||||||
G25_34XX_GPIO86_OUT,
|
G25_34XX_GPIO86_OUT,
|
||||||
AG4_34XX_GPIO134_OUT,
|
AG4_34XX_GPIO134_OUT,
|
||||||
|
AF4_34XX_GPIO135_OUT,
|
||||||
AE4_34XX_GPIO136_OUT,
|
AE4_34XX_GPIO136_OUT,
|
||||||
AF6_34XX_GPIO140_UP,
|
AF6_34XX_GPIO140_UP,
|
||||||
AE6_34XX_GPIO141,
|
AE6_34XX_GPIO141,
|
||||||
|
|
|
@ -199,7 +199,8 @@ static void *vmap_sg(const struct sg_table *sgt)
|
||||||
va += bytes;
|
va += bytes;
|
||||||
}
|
}
|
||||||
|
|
||||||
flush_cache_vmap(new->addr, new->addr + total);
|
flush_cache_vmap((unsigned long)new->addr,
|
||||||
|
(unsigned long)(new->addr + total));
|
||||||
return new->addr;
|
return new->addr;
|
||||||
|
|
||||||
err_out:
|
err_out:
|
||||||
|
@ -390,7 +391,7 @@ static void sgtable_fill_vmalloc(struct sg_table *sgt, void *_va)
|
||||||
}
|
}
|
||||||
|
|
||||||
va_end = _va + PAGE_SIZE * i;
|
va_end = _va + PAGE_SIZE * i;
|
||||||
flush_cache_vmap(_va, va_end);
|
flush_cache_vmap((unsigned long)_va, (unsigned long)va_end);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
|
static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
|
||||||
|
|
|
@ -116,7 +116,7 @@ static int __devinit omap_rng_probe(struct platform_device *pdev)
|
||||||
if (!res)
|
if (!res)
|
||||||
return -ENOENT;
|
return -ENOENT;
|
||||||
|
|
||||||
mem = request_mem_region(res->start, res->end - res->start + 1,
|
mem = request_mem_region(res->start, resource_size(res),
|
||||||
pdev->name);
|
pdev->name);
|
||||||
if (mem == NULL) {
|
if (mem == NULL) {
|
||||||
ret = -EBUSY;
|
ret = -EBUSY;
|
||||||
|
@ -124,7 +124,7 @@ static int __devinit omap_rng_probe(struct platform_device *pdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_set_drvdata(&pdev->dev, mem);
|
dev_set_drvdata(&pdev->dev, mem);
|
||||||
rng_base = ioremap(res->start, res->end - res->start + 1);
|
rng_base = ioremap(res->start, resource_size(res));
|
||||||
if (!rng_base) {
|
if (!rng_base) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto err_ioremap;
|
goto err_ioremap;
|
||||||
|
|
Loading…
Reference in a new issue