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staging: sm750fb: add space before open brace
Fixes checkpatch.pl error: ERROR: space required before the open brace '{' Signed-off-by: Juston Li <juston.h.li@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
b68a17a2ed
commit
8c11f5a280
5 changed files with 23 additions and 23 deletions
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@ -132,7 +132,7 @@ static void setDisplayControl(int ctrl, int dispState)
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static void waitNextVerticalSync(int ctrl, int delay)
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{
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unsigned int status;
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if (!ctrl){
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if (!ctrl) {
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/* primary controller */
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/* Do not wait when the Primary PLL is off or display control is already off.
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@ -166,7 +166,7 @@ static void waitNextVerticalSync(int ctrl, int delay)
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while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE);
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}
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}else{
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}else {
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/* Do not wait when the Primary PLL is off or display control is already off.
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This will prevent the software to wait forever. */
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@ -233,14 +233,14 @@ static void swPanelPowerSequence(int disp, int delay)
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void ddk750_setLogicalDispOut(disp_output_t output)
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{
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unsigned int reg;
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if (output & PNL_2_USAGE){
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if (output & PNL_2_USAGE) {
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/* set panel path controller select */
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reg = PEEK32(PANEL_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET);
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POKE32(PANEL_DISPLAY_CTRL, reg);
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}
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if (output & CRT_2_USAGE){
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if (output & CRT_2_USAGE) {
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/* set crt path controller select */
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reg = PEEK32(CRT_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET);
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@ -250,17 +250,17 @@ void ddk750_setLogicalDispOut(disp_output_t output)
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}
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if (output & PRI_TP_USAGE){
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if (output & PRI_TP_USAGE) {
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/* set primary timing and plane en_bit */
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setDisplayControl(0, (output&PRI_TP_MASK)>>PRI_TP_OFFSET);
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}
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if (output & SEC_TP_USAGE){
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if (output & SEC_TP_USAGE) {
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/* set secondary timing and plane en_bit*/
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setDisplayControl(1, (output&SEC_TP_MASK)>>SEC_TP_OFFSET);
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}
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if (output & PNL_SEQ_USAGE){
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if (output & PNL_SEQ_USAGE) {
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/* set panel sequence */
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swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET, 4);
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}
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@ -107,9 +107,9 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
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FIELD_SET(0, CRT_DISPLAY_CTRL, PLANE, ENABLE);
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if (getChipType() == SM750LE){
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if (getChipType() == SM750LE) {
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displayControlAdjust_SM750LE(pModeParam, ulTmpValue);
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}else{
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}else {
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ulReg = PEEK32(CRT_DISPLAY_CTRL)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL, VSYNC_PHASE)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL, HSYNC_PHASE)
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@ -179,7 +179,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
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}
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#endif
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}
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else{
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else {
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ret = -1;
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}
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return ret;
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@ -193,7 +193,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
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pll.clockType = clock;
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uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
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if (getChipType() == SM750LE){
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if (getChipType() == SM750LE) {
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/* set graphic mode via IO method */
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outb_p(0x88, 0x3d4);
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outb_p(0x06, 0x3d5);
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@ -5,10 +5,10 @@
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void ddk750_setDPMS(DPMS_t state)
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{
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unsigned int value;
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if (getChipType() == SM750LE){
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if (getChipType() == SM750LE) {
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value = PEEK32(CRT_DISPLAY_CTRL);
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL, DPMS, state));
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}else{
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}else {
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value = PEEK32(SYSTEM_CTRL);
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value= FIELD_VALUE(value, SYSTEM_CTRL, DPMS, state);
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POKE32(SYSTEM_CTRL, value);
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@ -248,7 +248,7 @@ unsigned int rop2) /* ROP value */
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Note that input pitch is BYTE value, but the 2D Pitch register uses
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pixel values. Need Byte to pixel conversion.
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*/
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if (Bpp == 3){
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if (Bpp == 3) {
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sx *= 3;
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dx *= 3;
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width *= 3;
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@ -271,7 +271,7 @@ unsigned int rop2) /* ROP value */
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FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) |
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FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp))); /* dpr3c */
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if (accel->de_wait() != 0){
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if (accel->de_wait() != 0) {
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return -1;
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}
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@ -363,7 +363,7 @@ int hw_imageblit(struct lynx_accel *accel,
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Note that input pitch is BYTE value, but the 2D Pitch register uses
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pixel values. Need Byte to pixel conversion.
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*/
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if (bytePerPixel == 3){
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if (bytePerPixel == 3) {
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dx *= 3;
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width *= 3;
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startBit *= 3;
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@ -143,14 +143,14 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
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if (opr & (0x80 >> j))
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{ /* use fg color,id = 2 */
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data |= 2 << (j*2);
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}else{
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}else {
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/* use bg color,id = 1 */
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data |= 1 << (j*2);
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}
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}
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#else
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for (j=0;j<8;j++){
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if (mask & (0x80>>j)){
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for (j=0;j<8;j++) {
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if (mask & (0x80>>j)) {
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if (rop == ROP_XOR)
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opr = mask ^ color;
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else
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@ -173,7 +173,7 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
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/* need a return */
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pstart += offset;
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pbuffer = pstart;
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}else{
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}else {
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pbuffer += sizeof(u16);
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}
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@ -223,13 +223,13 @@ void hw_cursor_setData2(struct lynx_cursor *cursor,
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if (opr & (0x80 >> j))
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{ /* use fg color,id = 2 */
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data |= 2 << (j*2);
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}else{
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}else {
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/* use bg color,id = 1 */
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data |= 1 << (j*2);
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}
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}
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#else
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for (j=0;j<8;j++){
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for (j=0;j<8;j++) {
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if (mask & (1<<j))
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data |= ((color & (1<<j))?1:2)<<(j*2);
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}
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@ -242,7 +242,7 @@ void hw_cursor_setData2(struct lynx_cursor *cursor,
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/* need a return */
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pstart += offset;
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pbuffer = pstart;
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}else{
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}else {
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pbuffer += sizeof(u16);
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}
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