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riscv: kprobes: allow writing to x0

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Instructions can write to x0, so we should simulate these instructions
normally.

Currently, the kernel hangs if an instruction who writes to x0 is
simulated.

Fixes: c22b0bcb1d ("riscv: Add kprobes supported")
Cc: stable@vger.kernel.org
Signed-off-by: Nam Cao <namcaov@gmail.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Acked-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20230829182500.61875-1-namcaov@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Nam Cao 2023-08-29 20:25:00 +02:00 committed by Palmer Dabbelt
parent b701f9e726
commit 8cb22bec14
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1 changed files with 1 additions and 1 deletions
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2
arch/riscv/kernel/probes/simulate-insn.c
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@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index,
unsigned long val) unsigned long val)
{ {
if (index == 0) if (index == 0)
return false; return true;
else if (index <= 31) else if (index <= 31)
*((unsigned long *)regs + index) = val; *((unsigned long *)regs + index) = val;
else else