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IB/qib: Default some module parameters optimally
Minimize the need for users to have to set module parameters to get good performance. The following two parameters are changed: - rcvhdrcnt to twice the rcvegrcnt - pcie_caps=0x51 The rcvhdrcnt at twice the egrcount allows the preemptive NAK code during reception to function in 100% of the cases rather than a sender jiffies-based timeout. The pcie_caps default of 0x51 will set the proposed MaxPayload and MaxReceiveReqest to 256 and 4096 respectively. The capabilities on the root complex will be used to limit those values. Reviewed-by: Ram Vepa <ram.vepa@qlogic.com> Signed-off-by: Mike Marciniszyn <mike.marciniszyn@qlogic.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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2 changed files with 3 additions and 3 deletions
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@ -3603,7 +3603,7 @@ static void qib_7322_config_ctxts(struct qib_devdata *dd)
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if (qib_rcvhdrcnt)
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dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, qib_rcvhdrcnt);
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else
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dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt,
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dd->rcvhdrcnt = 2 * max(dd->cspec->rcvegrcnt,
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dd->num_pports > 1 ? 1024U : 2048U);
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}
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@ -560,9 +560,9 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd)
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* BIOS may not set PCIe bus-utilization parameters for best performance.
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* Check and optionally adjust them to maximize our throughput.
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*/
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static int qib_pcie_caps;
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static int qib_pcie_caps = 0x51;
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module_param_named(pcie_caps, qib_pcie_caps, int, S_IRUGO);
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MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (4lsb), ReadReq (D4..7)");
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MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (0..3), ReadReq (4..7)");
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static int qib_tune_pcie_caps(struct qib_devdata *dd)
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{
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