mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
Blackfin: drop unused MMR defines that only cause bad code to be written
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
parent
61f09b5a09
commit
8d71e07596
9 changed files with 12 additions and 228 deletions
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@ -68,11 +68,6 @@
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#endif
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#endif
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/* UART_IIR Register */
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#define STATUS(x) ((x << 1) & 0x06)
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#define STATUS_P1 0x02
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#define STATUS_P0 0x01
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#define BFIN_UART_NR_PORTS 2
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#define OFFSET_THR 0x00 /* Transmit Holding register */
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@ -88,11 +83,6 @@
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#define OFFSET_SCR 0x1C /* SCR Scratch Register */
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#define OFFSET_GCTL 0x24 /* Global Control Register */
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/* DPMC*/
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#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
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#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
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#define STOPCK_OFF STOPCK
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/* PLL_DIV Masks */
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#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
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#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
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@ -56,11 +56,6 @@
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#endif
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#endif
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/* UART_IIR Register */
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#define STATUS(x) ((x << 1) & 0x06)
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#define STATUS_P1 0x02
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#define STATUS_P0 0x01
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#define BFIN_UART_NR_PORTS 2
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#define OFFSET_THR 0x00 /* Transmit Holding register */
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@ -76,11 +71,6 @@
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#define OFFSET_SCR 0x1C /* SCR Scratch Register */
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#define OFFSET_GCTL 0x24 /* Global Control Register */
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/* DPMC*/
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#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
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#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
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#define STOPCK_OFF STOPCK
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/* PLL_DIV Masks */
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#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
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#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
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@ -76,12 +76,12 @@ int channel2irq(unsigned int channel)
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ret_irq = IRQ_SPI;
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break;
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case CH_UART_RX:
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ret_irq = IRQ_UART_RX;
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case CH_UART0_RX:
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ret_irq = IRQ_UART0_RX;
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break;
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case CH_UART_TX:
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ret_irq = IRQ_UART_TX;
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case CH_UART0_TX:
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ret_irq = IRQ_UART0_TX;
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break;
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case CH_MEM_STREAM0_SRC:
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@ -131,11 +131,11 @@ struct bfin_serial_res {
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struct bfin_serial_res bfin_serial_resource[] = {
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{
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0xFFC00400,
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IRQ_UART_RX,
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IRQ_UART_ERROR,
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IRQ_UART0_RX,
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IRQ_UART0_ERROR,
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#ifdef CONFIG_SERIAL_BFIN_DMA
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CH_UART_TX,
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CH_UART_RX,
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CH_UART0_TX,
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CH_UART0_RX,
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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@ -43,13 +43,6 @@
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#define BFIN_UART_NR_PORTS 1
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#define CH_UART_RX CH_UART0_RX
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#define CH_UART_TX CH_UART0_TX
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#define IRQ_UART_ERROR IRQ_UART0_ERROR
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#define IRQ_UART_RX IRQ_UART0_RX
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#define IRQ_UART_TX IRQ_UART0_TX
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#define OFFSET_THR 0x00 /* Transmit Holding register */
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#define OFFSET_RBR 0x00 /* Receive Buffer register */
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#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
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@ -96,12 +96,12 @@ int channel2irq(unsigned int channel)
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ret_irq = IRQ_SPI;
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break;
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case CH_UART_RX:
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ret_irq = IRQ_UART_RX;
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case CH_UART0_RX:
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ret_irq = IRQ_UART0_RX;
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break;
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case CH_UART_TX:
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ret_irq = IRQ_UART_TX;
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case CH_UART0_TX:
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ret_irq = IRQ_UART0_TX;
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break;
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case CH_MEM_STREAM0_SRC:
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@ -45,96 +45,11 @@
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#if !defined(__ASSEMBLY__)
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#include "cdefBF534.h"
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/* UART 0*/
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#define bfin_read_UART_THR() bfin_read_UART0_THR()
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#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
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#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
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#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
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#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
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#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
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#define bfin_read_UART_IER() bfin_read_UART0_IER()
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#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
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#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
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#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
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#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
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#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
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#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
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#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
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#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
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#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
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#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
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#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
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#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
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#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
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#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
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#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
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#if defined(CONFIG_BF537) || defined(CONFIG_BF536)
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#include "cdefBF537.h"
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#endif
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#endif
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/* MAP used DEFINES from BF533 to BF537 - so we don't need to change them in the driver, kernel, etc. */
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/* UART_IIR Register */
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#define STATUS(x) ((x << 1) & 0x06)
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#define STATUS_P1 0x02
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#define STATUS_P0 0x01
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/* DMA Channel */
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#define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX()
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#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val)
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#define CH_UART_RX CH_UART0_RX
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#define bfin_read_CH_UART_TX() bfin_read_CH_UART0_TX()
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#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART0_TX(val)
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#define CH_UART_TX CH_UART0_TX
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/* System Interrupt Controller */
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#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART0_RX()
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#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART0_RX(val)
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#define IRQ_UART_RX IRQ_UART0_RX
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#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART0_TX()
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#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART0_TX(val)
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#define IRQ_UART_TX IRQ_UART0_TX
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#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART0_ERROR()
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#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART0_ERROR(val)
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#define IRQ_UART_ERROR IRQ_UART0_ERROR
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/* MMR Registers*/
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#define bfin_read_UART_THR() bfin_read_UART0_THR()
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#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
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#define BFIN_UART_THR UART0_THR
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#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
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#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
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#define BFIN_UART_RBR UART0_RBR
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#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
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#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
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#define BFIN_UART_DLL UART0_DLL
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#define bfin_read_UART_IER() bfin_read_UART0_IER()
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#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
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#define BFIN_UART_IER UART0_IER
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#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
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#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
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#define BFIN_UART_DLH UART0_DLH
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#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
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#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
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#define BFIN_UART_IIR UART0_IIR
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#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
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#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
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#define BFIN_UART_LCR UART0_LCR
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#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
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#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
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#define BFIN_UART_MCR UART0_MCR
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#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
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#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
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#define BFIN_UART_LSR UART0_LSR
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#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
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#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
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#define BFIN_UART_SCR UART0_SCR
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#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
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#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
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#define BFIN_UART_GCTL UART0_GCTL
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#define BFIN_UART_NR_PORTS 2
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#define OFFSET_THR 0x00 /* Transmit Holding register */
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#define OFFSET_SCR 0x1C /* SCR Scratch Register */
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#define OFFSET_GCTL 0x24 /* Global Control Register */
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/* DPMC*/
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#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
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#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
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#define STOPCK_OFF STOPCK
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/* PLL_DIV Masks */
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#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
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#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
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#endif
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#endif
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/* UART_IIR Register */
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#define STATUS(x) ((x << 1) & 0x06)
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#define STATUS_P1 0x02
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#define STATUS_P0 0x01
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#define BFIN_UART_NR_PORTS 3
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#define OFFSET_THR 0x00 /* Transmit Holding register */
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#define OFFSET_SCR 0x1C /* SCR Scratch Register */
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#define OFFSET_GCTL 0x24 /* Global Control Register */
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/* DPMC*/
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#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
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#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
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#define STOPCK_OFF STOPCK
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/* PLL_DIV Masks */
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#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
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#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
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#include "cdefBF549.h"
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#endif
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/* UART 1*/
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#define bfin_read_UART_THR() bfin_read_UART1_THR()
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#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val)
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#define bfin_read_UART_RBR() bfin_read_UART1_RBR()
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#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val)
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#define bfin_read_UART_DLL() bfin_read_UART1_DLL()
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#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val)
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#define bfin_read_UART_IER() bfin_read_UART1_IER()
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#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val)
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#define bfin_read_UART_DLH() bfin_read_UART1_DLH()
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#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val)
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#define bfin_read_UART_IIR() bfin_read_UART1_IIR()
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#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val)
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#define bfin_read_UART_LCR() bfin_read_UART1_LCR()
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#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val)
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#define bfin_read_UART_MCR() bfin_read_UART1_MCR()
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#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val)
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#define bfin_read_UART_LSR() bfin_read_UART1_LSR()
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#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val)
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#define bfin_read_UART_SCR() bfin_read_UART1_SCR()
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#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val)
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#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL()
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#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val)
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#endif
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/* MAP used DEFINES from BF533 to BF54x - so we don't need to change
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* them in the driver, kernel, etc. */
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/* UART_IIR Register */
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#define STATUS(x) ((x << 1) & 0x06)
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#define STATUS_P1 0x02
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#define STATUS_P0 0x01
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/* UART 0*/
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/* DMA Channel */
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#define bfin_read_CH_UART_RX() bfin_read_CH_UART1_RX()
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#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART1_RX(val)
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#define bfin_read_CH_UART_TX() bfin_read_CH_UART1_TX()
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#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART1_TX(val)
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#define CH_UART_RX CH_UART1_RX
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#define CH_UART_TX CH_UART1_TX
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/* System Interrupt Controller */
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#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART1_RX()
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#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART1_RX(val)
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#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART1_TX()
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#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART1_TX(val)
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#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART1_ERROR()
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#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART1_ERROR(val)
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#define IRQ_UART_RX IRQ_UART1_RX
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#define IRQ_UART_TX IRQ_UART1_TX
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#define IRQ_UART_ERROR IRQ_UART1_ERROR
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/* MMR Registers*/
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#define bfin_read_UART_THR() bfin_read_UART1_THR()
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#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val)
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#define bfin_read_UART_RBR() bfin_read_UART1_RBR()
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#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val)
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#define bfin_read_UART_DLL() bfin_read_UART1_DLL()
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#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val)
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#define bfin_read_UART_IER() bfin_read_UART1_IER()
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#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val)
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#define bfin_read_UART_DLH() bfin_read_UART1_DLH()
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#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val)
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#define bfin_read_UART_IIR() bfin_read_UART1_IIR()
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#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val)
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#define bfin_read_UART_LCR() bfin_read_UART1_LCR()
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#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val)
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#define bfin_read_UART_MCR() bfin_read_UART1_MCR()
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#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val)
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#define bfin_read_UART_LSR() bfin_read_UART1_LSR()
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#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val)
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#define bfin_read_UART_SCR() bfin_read_UART1_SCR()
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#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val)
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#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL()
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#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val)
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#define BFIN_UART_THR UART1_THR
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#define BFIN_UART_RBR UART1_RBR
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#define BFIN_UART_DLL UART1_DLL
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#define BFIN_UART_IER UART1_IER
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#define BFIN_UART_DLH UART1_DLH
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#define BFIN_UART_IIR UART1_IIR
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#define BFIN_UART_LCR UART1_LCR
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#define BFIN_UART_MCR UART1_MCR
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#define BFIN_UART_LSR UART1_LSR
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#define BFIN_UART_SCR UART1_SCR
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#define BFIN_UART_GCTL UART1_GCTL
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#define BFIN_UART_NR_PORTS 4
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#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
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