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MIPS,bpf: Fix using smp_processor_id() in preemptible splat.
If the kernel is configured with preemption enabled we were getting warning stack traces for use of current_cpu_type(). Fix by moving the test between preempt_disable()/preempt_enable() and caching the results of the CPU type tests for use during code generation. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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da6817ebc3
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8d8d18c328
1 changed files with 14 additions and 14 deletions
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@ -113,6 +113,7 @@ struct jit_ctx {
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u64 *reg_val_types;
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unsigned int long_b_conversion:1;
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unsigned int gen_b_offsets:1;
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unsigned int use_bbit_insns:1;
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};
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static void set_reg_val_type(u64 *rvt, int reg, enum reg_val_type type)
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@ -655,19 +656,6 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx, int this_idx)
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return build_int_epilogue(ctx, MIPS_R_T9);
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}
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static bool use_bbit_insns(void)
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{
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switch (current_cpu_type()) {
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case CPU_CAVIUM_OCTEON:
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case CPU_CAVIUM_OCTEON_PLUS:
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case CPU_CAVIUM_OCTEON2:
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case CPU_CAVIUM_OCTEON3:
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return true;
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default:
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return false;
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}
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}
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static bool is_bad_offset(int b_off)
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{
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return b_off > 0x1ffff || b_off < -0x20000;
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@ -1198,7 +1186,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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if (dst < 0)
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return dst;
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if (use_bbit_insns() && hweight32((u32)insn->imm) == 1) {
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if (ctx->use_bbit_insns && hweight32((u32)insn->imm) == 1) {
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if ((insn + 1)->code == (BPF_JMP | BPF_EXIT) && insn->off == 1) {
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b_off = b_imm(exit_idx, ctx);
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if (is_bad_offset(b_off))
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@ -1853,6 +1841,18 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
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memset(&ctx, 0, sizeof(ctx));
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preempt_disable();
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switch (current_cpu_type()) {
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case CPU_CAVIUM_OCTEON:
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case CPU_CAVIUM_OCTEON_PLUS:
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case CPU_CAVIUM_OCTEON2:
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case CPU_CAVIUM_OCTEON3:
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ctx.use_bbit_insns = 1;
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default:
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ctx.use_bbit_insns = 0;
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}
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preempt_enable();
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ctx.offsets = kcalloc(prog->len + 1, sizeof(*ctx.offsets), GFP_KERNEL);
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if (ctx.offsets == NULL)
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goto out_err;
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