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drm/i915: Move M/N setup to a more logical place on ddi platforms
Let's do the cpu transcoder M/N setup next to where we program most other cpu transcoder timings/etc. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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a68819cc55
commit
8de5df3b07
3 changed files with 11 additions and 17 deletions
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@ -2498,8 +2498,6 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
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const struct drm_connector_state *conn_state)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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if (DISPLAY_VER(dev_priv) >= 12)
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tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
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@ -2509,14 +2507,8 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
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/* MST will call a setting of MSA after an allocating of Virtual Channel
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* from MST encoder pre_enable callback.
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*/
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if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
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if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
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intel_ddi_set_dp_msa(crtc_state, conn_state);
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intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
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&crtc_state->dp_m_n);
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intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
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&crtc_state->dp_m2_n2);
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}
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}
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static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state,
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@ -2003,16 +2003,22 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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if (crtc_state->has_pch_encoder) {
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intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
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&crtc_state->fdi_m_n);
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} else if (intel_crtc_has_dp_encoder(crtc_state)) {
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intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
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&crtc_state->dp_m_n);
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intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
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&crtc_state->dp_m2_n2);
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}
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intel_set_transcoder_timings(crtc_state);
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if (cpu_transcoder != TRANSCODER_EDP)
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intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
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crtc_state->pixel_multiplier - 1);
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if (crtc_state->has_pch_encoder)
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intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
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&crtc_state->fdi_m_n);
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hsw_set_frame_start_delay(crtc_state);
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hsw_set_transconf(crtc_state);
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@ -473,7 +473,6 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
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struct intel_digital_port *dig_port = intel_mst->primary;
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struct intel_dp *intel_dp = &dig_port->dp;
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
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struct intel_connector *connector =
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to_intel_connector(conn_state->connector);
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int ret;
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@ -523,9 +522,6 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
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intel_ddi_enable_pipe_clock(encoder, pipe_config);
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intel_ddi_set_dp_msa(pipe_config, conn_state);
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intel_cpu_transcoder_set_m1_n1(crtc, pipe_config->cpu_transcoder,
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&pipe_config->dp_m_n);
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}
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static void intel_mst_enable_dp(struct intel_atomic_state *state,
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