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gpu: host1x: Support 40-bit addressing on Tegra186

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The host1x and clients instantiated on Tegra186 support addressing 40
bits of memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2019-02-01 14:28:28 +01:00
parent 38fabcc953
commit 8de896eb20
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/host1x/dev.c
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@ -136,7 +136,7 @@ static const struct host1x_info host1x06_info = {
.nb_bases = 16, .nb_bases = 16,
.init = host1x06_init, .init = host1x06_init,
.sync_offset = 0x0, .sync_offset = 0x0,
.dma_mask = DMA_BIT_MASK(34), .dma_mask = DMA_BIT_MASK(40),
.has_hypervisor = true, .has_hypervisor = true,
.num_sid_entries = ARRAY_SIZE(tegra186_sid_table), .num_sid_entries = ARRAY_SIZE(tegra186_sid_table),
.sid_table = tegra186_sid_table, .sid_table = tegra186_sid_table,