mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
This is a huge device tree and ATAG removal series for ux500:
- Move all the clock definitions over to the device tree - Remove all now-redundant AUXDATA and make the ux500 device tree only -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSRA9cAAoJEEEQszewGV1zpiQP/iwq3mMXJm5NRnG7NdlfaZkO TUtobAxdTQDbz70nhgLG5z+FD+qxqYed7MnF/NTRIwe6ZsV74lvY4WloAkNizfDL TeZYxFiSrv5oTHLfJzuynveIflnG0Wfm3MAMFYp3aeR+h9fGrpDkxOlMIleI+BP0 C9wjysYAO2vhAQIUT3ONwybMgPfgsEmQMpMsPzOpfdLmgtqQrELaHmucN8Hghagy rTwxq6f3gOxYeFAlEAw1RxapH4GI+VBxoLCXGpkTJqhLK4DAo67NphoUPgNAXp7I IGZwWTYbNVa6GlvLVXFdCmV6UVF+qkTn9/Tedn+a6LF/5XtA44DLGAvhPRZBGdrY k5nWCyc/90gpDF8pSi7cJkoZLUW3wEwDpYi9XmZA3dsLnbWW3ct8kX3iJNFQ/jAe lx+kJP9erMQEtiuVfEXXYbK8ILHi8yoEWfiq7FY3UIbHkKIjEdJOCxk5to6BeynA PKPJNO7dgYdhiM4Rqz4AcF1xCEe5NAQVltNfeqPVg/7o4nlQnIaUQVUpbDnYXaCN iB0tVbjSiFA4C/C5oz0k2VhKH8YMsgd+CZ9ALS2jhGNiIfFOp8JuuJ8KL86m7iZQ aC0rPXT8xkEF0a9lVU1UCCiSf6zIpZ0G1iJ6mZ+hA/FJ2pzeLEGEa4iYpsMhcnfQ 0d9fVtYBKBKCMXaeJP0z =FQfo -----END PGP SIGNATURE----- Merge tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt From Linus Walleij: This is a huge device tree and ATAG removal series for ux500: - Move all the clock definitions over to the device tree - Remove all now-redundant AUXDATA and make the ux500 device tree only * tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (92 commits) ARM: ux500: delete devices-common remnants clk: ux500: Provide a look-up for the ARMSS clock ARM: ux500: Enable CPUFreq on Snowball ARM: ux500: Provide a Device Tree node for CPUFreq in the DBx500 ARM: ux500: Provide a clock lookup for the Hash driver ARM: ux500: Provide a clock lookup for the Crypto driver ARM: ux500: Fix trivial white-space error in the DBX500 DTSI file ARM: ux500: Remove ATAG booting support for Snowball ARM: ux500: Remove ATAG booting support for HREF ARM: ux500: Remove ATAG booting support for U8520 ARM: ux500: Remove ATAG booting support for MOP500 ARM: ux500: Purge UIB framework when booting with ATAGs ARM: ux500: Take out STUIB support when not booting with Device Tree ARM: ux500: Remove BU21013 ROHM TS support when booting with only ATAGs ARM: ux500: Don't register the STMPE/SKE when booting with ATAG support ARM: ux500: Delete U8500 UIB support when booting with ATAGs ARM: ux500: Don't register Synaptics RMI4 TS when booting with ATAGs ARM: ux500: Purge DB8500 PRCMU registration when not booting with DT ARM: ux500: Stop requesting the SoC device to play 'parent' role ARM: ux500: Remove UART support when booting without Device Tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
8e17a7f32a
32 changed files with 811 additions and 2161 deletions
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@ -15,7 +15,7 @@ Optional properties:
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|||
Example:
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usb_per5@a03e0000 {
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compatible = "stericsson,db8500-musb", "mentor,musb";
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compatible = "stericsson,db8500-musb";
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reg = <0xa03e0000 0x10000>;
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interrupts = <0 23 0x4>;
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interrupt-names = "mc";
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@ -10,6 +10,7 @@
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/mfd/dbx500-prcmu.h>
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#include "skeleton.dtsi"
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/ {
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@ -42,16 +43,56 @@ pmu {
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interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
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};
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clocks {
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compatible = "stericsson,u8500-clks";
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prcmu_clk: prcmu-clock {
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#clock-cells = <1>;
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};
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prcc_pclk: prcc-periph-clock {
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#clock-cells = <2>;
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};
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prcc_kclk: prcc-kernel-clock {
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#clock-cells = <2>;
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};
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rtc_clk: rtc32k-clock {
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#clock-cells = <0>;
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};
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smp_twd_clk: smp-twd-clock {
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#clock-cells = <0>;
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};
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};
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mtu@a03c6000 {
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/* Nomadik System Timer */
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compatible = "st,nomadik-mtu";
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reg = <0xa03c6000 0x1000>;
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interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
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clock-names = "timclk", "apb_pclk";
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};
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timer@a0410600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xa0410600 0x20>;
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interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
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clocks = <&smp_twd_clk>;
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};
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rtc@80154000 {
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compatible = "arm,rtc-pl031", "arm,primecell";
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reg = <0x80154000 0x1000>;
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interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rtc_clk>;
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clock-names = "apb_pclk";
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};
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gpio0: gpio@8012e000 {
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@ -65,6 +106,8 @@ gpio0: gpio@8012e000 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <0>;
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clocks = <&prcc_pclk 1 9>;
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};
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gpio1: gpio@8012e080 {
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@ -78,6 +121,8 @@ gpio1: gpio@8012e080 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <1>;
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clocks = <&prcc_pclk 1 9>;
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};
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gpio2: gpio@8000e000 {
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@ -91,6 +136,8 @@ gpio2: gpio@8000e000 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <2>;
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clocks = <&prcc_pclk 3 8>;
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};
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gpio3: gpio@8000e080 {
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@ -104,6 +151,8 @@ gpio3: gpio@8000e080 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <3>;
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clocks = <&prcc_pclk 3 8>;
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};
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gpio4: gpio@8000e100 {
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@ -117,6 +166,8 @@ gpio4: gpio@8000e100 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <4>;
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clocks = <&prcc_pclk 3 8>;
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};
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gpio5: gpio@8000e180 {
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@ -130,6 +181,8 @@ gpio5: gpio@8000e180 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <5>;
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clocks = <&prcc_pclk 3 8>;
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};
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gpio6: gpio@8011e000 {
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@ -143,6 +196,8 @@ gpio6: gpio@8011e000 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <6>;
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clocks = <&prcc_pclk 2 1>;
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};
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gpio7: gpio@8011e080 {
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@ -156,6 +211,8 @@ gpio7: gpio@8011e080 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <7>;
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clocks = <&prcc_pclk 2 1>;
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};
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gpio8: gpio@a03fe000 {
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@ -169,6 +226,8 @@ gpio8: gpio@a03fe000 {
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gpio-controller;
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#gpio-cells = <2>;
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gpio-bank = <8>;
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clocks = <&prcc_pclk 6 1>;
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};
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pinctrl {
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@ -177,8 +236,7 @@ pinctrl {
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};
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usb_per5@a03e0000 {
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compatible = "stericsson,db8500-musb",
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"mentor,musb";
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compatible = "stericsson,db8500-musb";
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reg = <0xa03e0000 0x10000>;
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interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mc";
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@ -210,6 +268,8 @@ usb_per5@a03e0000 {
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"iep_6_14", "oep_6_14",
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"iep_7_15", "oep_7_15",
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"iep_8", "oep_8";
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clocks = <&prcc_pclk 5 0>;
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};
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dma: dma-controller@801C0000 {
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@ -220,6 +280,8 @@ dma: dma-controller@801C0000 {
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#dma-cells = <3>;
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memcpy-channels = <56 57 58 59 60>;
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clocks = <&prcmu_clk PRCMU_DMACLK>;
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};
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prcmu: prcmu@80157000 {
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@ -238,6 +300,13 @@ prcmu-timer-4@80157450 {
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reg = <0x80157450 0xC>;
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};
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cpufreq {
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compatible = "stericsson,cpufreq-ux500";
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clocks = <&prcmu_clk PRCMU_ARMSS>;
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clock-names = "armss";
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status = "disabled";
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};
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thermal@801573c0 {
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compatible = "stericsson,db8500-thermal";
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reg = <0x801573c0 0x40>;
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@ -559,65 +628,74 @@ i2c@80004000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80004000 0x1000>;
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interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
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arm,primecell-periphid = <0x180024>;
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#address-cells = <1>;
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#size-cells = <0>;
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v-i2c-supply = <&db8500_vape_reg>;
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clock-frequency = <400000>;
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clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
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clock-names = "i2cclk", "apb_pclk";
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};
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i2c@80122000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80122000 0x1000>;
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interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
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arm,primecell-periphid = <0x180024>;
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#address-cells = <1>;
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#size-cells = <0>;
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v-i2c-supply = <&db8500_vape_reg>;
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clock-frequency = <400000>;
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clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
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clock-names = "i2cclk", "apb_pclk";
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};
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i2c@80128000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80128000 0x1000>;
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interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
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arm,primecell-periphid = <0x180024>;
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#address-cells = <1>;
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#size-cells = <0>;
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v-i2c-supply = <&db8500_vape_reg>;
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clock-frequency = <400000>;
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clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
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clock-names = "i2cclk", "apb_pclk";
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};
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i2c@80110000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x80110000 0x1000>;
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interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
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arm,primecell-periphid = <0x180024>;
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#address-cells = <1>;
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#size-cells = <0>;
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v-i2c-supply = <&db8500_vape_reg>;
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clock-frequency = <400000>;
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clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
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clock-names = "i2cclk", "apb_pclk";
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};
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i2c@8012a000 {
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compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
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reg = <0x8012a000 0x1000>;
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interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
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arm,primecell-periphid = <0x180024>;
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#address-cells = <1>;
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#size-cells = <0>;
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v-i2c-supply = <&db8500_vape_reg>;
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clock-frequency = <400000>;
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clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
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clock-names = "i2cclk", "apb_pclk";
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};
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ssp@80002000 {
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@ -638,6 +716,9 @@ uart@80120000 {
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<&dma 13 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "tx";
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clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
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clock-names = "uart", "apb_pclk";
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status = "disabled";
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};
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@ -650,6 +731,9 @@ uart@80121000 {
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<&dma 12 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "tx";
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clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
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clock-names = "uart", "apb_pclk";
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status = "disabled";
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};
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@ -662,6 +746,9 @@ uart@80007000 {
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<&dma 11 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "tx";
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clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
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clock-names = "uart", "apb_pclk";
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status = "disabled";
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};
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@ -674,6 +761,9 @@ sdi0_per1@80126000 {
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<&dma 29 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "tx";
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clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
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clock-names = "sdi", "apb_pclk";
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status = "disabled";
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};
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|
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@ -686,6 +776,9 @@ sdi1_per2@80118000 {
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<&dma 32 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "tx";
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clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
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clock-names = "sdi", "apb_pclk";
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|
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status = "disabled";
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||||
};
|
||||
|
||||
|
|
@ -698,6 +791,9 @@ sdi2_per3@80005000 {
|
|||
<&dma 28 0 0x0>; /* Logical - MemToDev */
|
||||
dma-names = "rx", "tx";
|
||||
|
||||
clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
|
||||
clock-names = "sdi", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -705,6 +801,10 @@ sdi3_per2@80119000 {
|
|||
compatible = "arm,pl18x", "arm,primecell";
|
||||
reg = <0x80119000 0x1000>;
|
||||
interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
|
||||
clock-names = "sdi", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -717,6 +817,9 @@ sdi4_per2@80114000 {
|
|||
<&dma 42 0 0x0>; /* Logical - MemToDev */
|
||||
dma-names = "rx", "tx";
|
||||
|
||||
clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
|
||||
clock-names = "sdi", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -724,6 +827,10 @@ sdi5_per3@80008000 {
|
|||
compatible = "arm,pl18x", "arm,primecell";
|
||||
reg = <0x80008000 0x1000>;
|
||||
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
|
||||
clock-names = "sdi", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -732,6 +839,10 @@ msp0: msp@80123000 {
|
|||
reg = <0x80123000 0x1000>;
|
||||
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
v-ape-supply = <&db8500_vape_reg>;
|
||||
|
||||
clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
|
||||
clock-names = "msp", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -740,6 +851,10 @@ msp1: msp@80124000 {
|
|||
reg = <0x80124000 0x1000>;
|
||||
interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
v-ape-supply = <&db8500_vape_reg>;
|
||||
|
||||
clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
|
||||
clock-names = "msp", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -749,6 +864,10 @@ msp2: msp@80117000 {
|
|||
reg = <0x80117000 0x1000>;
|
||||
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
v-ape-supply = <&db8500_vape_reg>;
|
||||
|
||||
clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
|
||||
clock-names = "msp", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -757,6 +876,10 @@ msp3: msp@80125000 {
|
|||
reg = <0x80125000 0x1000>;
|
||||
interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
v-ape-supply = <&db8500_vape_reg>;
|
||||
|
||||
clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
|
||||
clock-names = "msp", "apb_pclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -772,7 +895,7 @@ external-bus@50000000 {
|
|||
cpufreq-cooling {
|
||||
compatible = "stericsson,db8500-cpufreq-cooling";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
vmmci: regulator-gpio {
|
||||
compatible = "regulator-gpio";
|
||||
|
|
@ -797,6 +920,7 @@ cryp@a03cb000 {
|
|||
interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
v-ape-supply = <&db8500_vape_reg>;
|
||||
clocks = <&prcc_pclk 6 1>;
|
||||
};
|
||||
|
||||
hash@a03c2000 {
|
||||
|
|
@ -804,6 +928,7 @@ hash@a03c2000 {
|
|||
reg = <0xa03c2000 0x1000>;
|
||||
|
||||
v-ape-supply = <&db8500_vape_reg>;
|
||||
clocks = <&prcc_pclk 6 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -167,88 +167,6 @@ msp3: msp@80125000 {
|
|||
};
|
||||
|
||||
prcmu@80157000 {
|
||||
db8500-prcmu-regulators {
|
||||
db8500_vape_reg: db8500_vape {
|
||||
regulator-name = "db8500-vape";
|
||||
};
|
||||
|
||||
db8500_varm_reg: db8500_varm {
|
||||
regulator-name = "db8500-varm";
|
||||
};
|
||||
|
||||
db8500_vmodem_reg: db8500_vmodem {
|
||||
regulator-name = "db8500-vmodem";
|
||||
};
|
||||
|
||||
db8500_vpll_reg: db8500_vpll {
|
||||
regulator-name = "db8500-vpll";
|
||||
};
|
||||
|
||||
db8500_vsmps1_reg: db8500_vsmps1 {
|
||||
regulator-name = "db8500-vsmps1";
|
||||
};
|
||||
|
||||
db8500_vsmps2_reg: db8500_vsmps2 {
|
||||
regulator-name = "db8500-vsmps2";
|
||||
};
|
||||
|
||||
db8500_vsmps3_reg: db8500_vsmps3 {
|
||||
regulator-name = "db8500-vsmps3";
|
||||
};
|
||||
|
||||
db8500_vrf1_reg: db8500_vrf1 {
|
||||
regulator-name = "db8500-vrf1";
|
||||
};
|
||||
|
||||
db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
|
||||
regulator-name = "db8500-sva-mmdsp";
|
||||
};
|
||||
|
||||
db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
|
||||
regulator-name = "db8500-sva-mmdsp-ret";
|
||||
};
|
||||
|
||||
db8500_sva_pipe_reg: db8500_sva_pipe {
|
||||
regulator-name = "db8500_sva_pipe";
|
||||
};
|
||||
|
||||
db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
|
||||
regulator-name = "db8500_sia_mmdsp";
|
||||
};
|
||||
|
||||
db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
|
||||
regulator-name = "db8500-sia-mmdsp-ret";
|
||||
};
|
||||
|
||||
db8500_sia_pipe_reg: db8500_sia_pipe {
|
||||
regulator-name = "db8500-sia-pipe";
|
||||
};
|
||||
|
||||
db8500_sga_reg: db8500_sga {
|
||||
regulator-name = "db8500-sga";
|
||||
};
|
||||
|
||||
db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
|
||||
regulator-name = "db8500-b2r2-mcde";
|
||||
};
|
||||
|
||||
db8500_esram12_reg: db8500_esram12 {
|
||||
regulator-name = "db8500-esram12";
|
||||
};
|
||||
|
||||
db8500_esram12_ret_reg: db8500_esram12_ret {
|
||||
regulator-name = "db8500-esram12-ret";
|
||||
};
|
||||
|
||||
db8500_esram34_reg: db8500_esram34 {
|
||||
regulator-name = "db8500-esram34";
|
||||
};
|
||||
|
||||
db8500_esram34_ret_reg: db8500_esram34_ret {
|
||||
regulator-name = "db8500-esram34-ret";
|
||||
};
|
||||
};
|
||||
|
||||
ab8500 {
|
||||
ab8500-regulators {
|
||||
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
|
||||
|
|
|
|||
|
|
@ -74,137 +74,5 @@ sdi4_per2@80114000 {
|
|||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
prcmu@80157000 {
|
||||
db8500-prcmu-regulators {
|
||||
db8500_vape_reg: db8500_vape {
|
||||
regulator-name = "db8500-vape";
|
||||
};
|
||||
|
||||
db8500_varm_reg: db8500_varm {
|
||||
regulator-name = "db8500-varm";
|
||||
};
|
||||
|
||||
db8500_vmodem_reg: db8500_vmodem {
|
||||
regulator-name = "db8500-vmodem";
|
||||
};
|
||||
|
||||
db8500_vpll_reg: db8500_vpll {
|
||||
regulator-name = "db8500-vpll";
|
||||
};
|
||||
|
||||
db8500_vsmps1_reg: db8500_vsmps1 {
|
||||
regulator-name = "db8500-vsmps1";
|
||||
};
|
||||
|
||||
db8500_vsmps2_reg: db8500_vsmps2 {
|
||||
regulator-name = "db8500-vsmps2";
|
||||
};
|
||||
|
||||
db8500_vsmps3_reg: db8500_vsmps3 {
|
||||
regulator-name = "db8500-vsmps3";
|
||||
};
|
||||
|
||||
db8500_vrf1_reg: db8500_vrf1 {
|
||||
regulator-name = "db8500-vrf1";
|
||||
};
|
||||
|
||||
db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
|
||||
regulator-name = "db8500-sva-mmdsp";
|
||||
};
|
||||
|
||||
db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
|
||||
regulator-name = "db8500-sva-mmdsp-ret";
|
||||
};
|
||||
|
||||
db8500_sva_pipe_reg: db8500_sva_pipe {
|
||||
regulator-name = "db8500_sva_pipe";
|
||||
};
|
||||
|
||||
db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
|
||||
regulator-name = "db8500_sia_mmdsp";
|
||||
};
|
||||
|
||||
db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
|
||||
regulator-name = "db8500-sia-mmdsp-ret";
|
||||
};
|
||||
|
||||
db8500_sia_pipe_reg: db8500_sia_pipe {
|
||||
regulator-name = "db8500-sia-pipe";
|
||||
};
|
||||
|
||||
db8500_sga_reg: db8500_sga {
|
||||
regulator-name = "db8500-sga";
|
||||
};
|
||||
|
||||
db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
|
||||
regulator-name = "db8500-b2r2-mcde";
|
||||
};
|
||||
|
||||
db8500_esram12_reg: db8500_esram12 {
|
||||
regulator-name = "db8500-esram12";
|
||||
};
|
||||
|
||||
db8500_esram12_ret_reg: db8500_esram12_ret {
|
||||
regulator-name = "db8500-esram12-ret";
|
||||
};
|
||||
|
||||
db8500_esram34_reg: db8500_esram34 {
|
||||
regulator-name = "db8500-esram34";
|
||||
};
|
||||
|
||||
db8500_esram34_ret_reg: db8500_esram34_ret {
|
||||
regulator-name = "db8500-esram34-ret";
|
||||
};
|
||||
};
|
||||
|
||||
ab8500 {
|
||||
ab8500-regulators {
|
||||
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
|
||||
regulator-name = "V-DISPLAY";
|
||||
};
|
||||
|
||||
ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
|
||||
regulator-name = "V-eMMC1";
|
||||
};
|
||||
|
||||
ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
|
||||
regulator-name = "V-MMC-SD";
|
||||
};
|
||||
|
||||
ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
|
||||
regulator-name = "V-INTCORE";
|
||||
};
|
||||
|
||||
ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
|
||||
regulator-name = "V-TVOUT";
|
||||
};
|
||||
|
||||
ab8500_ldo_usb_reg: ab8500_ldo_usb {
|
||||
regulator-name = "dummy";
|
||||
};
|
||||
|
||||
ab8500_ldo_audio_reg: ab8500_ldo_audio {
|
||||
regulator-name = "V-AUD";
|
||||
};
|
||||
|
||||
ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
|
||||
regulator-name = "V-AMIC1";
|
||||
};
|
||||
|
||||
ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
|
||||
regulator-name = "V-AMIC2";
|
||||
};
|
||||
|
||||
ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
|
||||
regulator-name = "V-DMIC";
|
||||
};
|
||||
|
||||
ab8500_ldo_ana_reg: ab8500_ldo_ana {
|
||||
regulator-name = "V-CSI/DSI";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -111,12 +111,13 @@ ethernet@0 {
|
|||
vdd33a-supply = <&en_3v3_reg>;
|
||||
vddvario-supply = <&db8500_vape_reg>;
|
||||
|
||||
|
||||
reg-shift = <1>;
|
||||
reg-io-width = <2>;
|
||||
smsc,force-internal-phy;
|
||||
smsc,irq-active-high;
|
||||
smsc,irq-push-pull;
|
||||
|
||||
clocks = <&prcc_pclk 3 0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -170,86 +171,8 @@ cpufreq-cooling {
|
|||
};
|
||||
|
||||
prcmu@80157000 {
|
||||
db8500-prcmu-regulators {
|
||||
db8500_vape_reg: db8500_vape {
|
||||
regulator-name = "db8500-vape";
|
||||
};
|
||||
|
||||
db8500_varm_reg: db8500_varm {
|
||||
regulator-name = "db8500-varm";
|
||||
};
|
||||
|
||||
db8500_vmodem_reg: db8500_vmodem {
|
||||
regulator-name = "db8500-vmodem";
|
||||
};
|
||||
|
||||
db8500_vpll_reg: db8500_vpll {
|
||||
regulator-name = "db8500-vpll";
|
||||
};
|
||||
|
||||
db8500_vsmps1_reg: db8500_vsmps1 {
|
||||
regulator-name = "db8500-vsmps1";
|
||||
};
|
||||
|
||||
db8500_vsmps2_reg: db8500_vsmps2 {
|
||||
regulator-name = "db8500-vsmps2";
|
||||
};
|
||||
|
||||
db8500_vsmps3_reg: db8500_vsmps3 {
|
||||
regulator-name = "db8500-vsmps3";
|
||||
};
|
||||
|
||||
db8500_vrf1_reg: db8500_vrf1 {
|
||||
regulator-name = "db8500-vrf1";
|
||||
};
|
||||
|
||||
db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
|
||||
regulator-name = "db8500-sva-mmdsp";
|
||||
};
|
||||
|
||||
db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
|
||||
regulator-name = "db8500-sva-mmdsp-ret";
|
||||
};
|
||||
|
||||
db8500_sva_pipe_reg: db8500_sva_pipe {
|
||||
regulator-name = "db8500_sva_pipe";
|
||||
};
|
||||
|
||||
db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
|
||||
regulator-name = "db8500_sia_mmdsp";
|
||||
};
|
||||
|
||||
db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
|
||||
regulator-name = "db8500-sia-mmdsp-ret";
|
||||
};
|
||||
|
||||
db8500_sia_pipe_reg: db8500_sia_pipe {
|
||||
regulator-name = "db8500-sia-pipe";
|
||||
};
|
||||
|
||||
db8500_sga_reg: db8500_sga {
|
||||
regulator-name = "db8500-sga";
|
||||
};
|
||||
|
||||
db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
|
||||
regulator-name = "db8500-b2r2-mcde";
|
||||
};
|
||||
|
||||
db8500_esram12_reg: db8500_esram12 {
|
||||
regulator-name = "db8500-esram12";
|
||||
};
|
||||
|
||||
db8500_esram12_ret_reg: db8500_esram12_ret {
|
||||
regulator-name = "db8500-esram12-ret";
|
||||
};
|
||||
|
||||
db8500_esram34_reg: db8500_esram34 {
|
||||
regulator-name = "db8500-esram34";
|
||||
};
|
||||
|
||||
db8500_esram34_ret_reg: db8500_esram34_ret {
|
||||
regulator-name = "db8500-esram34-ret";
|
||||
};
|
||||
cpufreq {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
thermal@801573c0 {
|
||||
|
|
|
|||
|
|
@ -2,14 +2,11 @@
|
|||
# Makefile for the linux kernel, U8500 machine.
|
||||
#
|
||||
|
||||
obj-y := cpu.o devices.o devices-common.o \
|
||||
id.o usb.o timer.o pm.o
|
||||
obj-y := cpu.o devices.o id.o timer.o pm.o
|
||||
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
|
||||
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
|
||||
obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \
|
||||
board-mop500-regulators.o \
|
||||
board-mop500-uib.o board-mop500-stuib.o \
|
||||
board-mop500-u8500uib.o \
|
||||
board-mop500-pins.o \
|
||||
board-mop500-audio.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
|
||||
|
|
|
|||
|
|
@ -68,40 +68,6 @@ static struct stedma40_chan_cfg msp2_dma_tx = {
|
|||
.phy_channel = 1,
|
||||
};
|
||||
|
||||
static struct platform_device *db8500_add_msp_i2s(struct device *parent,
|
||||
int id,
|
||||
resource_size_t base, int irq,
|
||||
struct msp_i2s_platform_data *pdata)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
struct resource res[] = {
|
||||
DEFINE_RES_MEM(base, SZ_4K),
|
||||
DEFINE_RES_IRQ(irq),
|
||||
};
|
||||
|
||||
pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",
|
||||
id, irq);
|
||||
pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata));
|
||||
if (!pdev) {
|
||||
pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",
|
||||
id);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return pdev;
|
||||
}
|
||||
|
||||
/* Platform device for ASoC MOP500 machine */
|
||||
static struct platform_device snd_soc_mop500 = {
|
||||
.name = "snd-soc-mop500",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = NULL,
|
||||
},
|
||||
};
|
||||
|
||||
struct msp_i2s_platform_data msp2_platform_data = {
|
||||
.id = MSP_I2S_2,
|
||||
.msp_i2s_dma_rx = &msp2_dma_rx,
|
||||
|
|
@ -113,19 +79,3 @@ struct msp_i2s_platform_data msp3_platform_data = {
|
|||
.msp_i2s_dma_rx = &msp1_dma_rx,
|
||||
.msp_i2s_dma_tx = NULL,
|
||||
};
|
||||
|
||||
void mop500_audio_init(struct device *parent)
|
||||
{
|
||||
pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
|
||||
platform_device_register(&snd_soc_mop500);
|
||||
|
||||
pr_info("Initialize MSP I2S-devices.\n");
|
||||
db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
|
||||
&msp0_platform_data);
|
||||
db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
|
||||
&msp1_platform_data);
|
||||
db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
|
||||
&msp2_platform_data);
|
||||
db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
|
||||
&msp3_platform_data);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -65,18 +65,6 @@ struct mmci_platform_data mop500_sdi0_data = {
|
|||
#endif
|
||||
};
|
||||
|
||||
static void sdi0_configure(struct device *parent)
|
||||
{
|
||||
/* Add the device, force v2 to subrevision 1 */
|
||||
db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
|
||||
}
|
||||
|
||||
void mop500_sdi_tc35892_init(struct device *parent)
|
||||
{
|
||||
mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
|
||||
sdi0_configure(parent);
|
||||
}
|
||||
|
||||
/*
|
||||
* SDI1 (SDIO WLAN)
|
||||
*/
|
||||
|
|
@ -178,42 +166,3 @@ struct mmci_platform_data mop500_sdi4_data = {
|
|||
.dma_tx_param = &mop500_sdi4_dma_cfg_tx,
|
||||
#endif
|
||||
};
|
||||
|
||||
void __init mop500_sdi_init(struct device *parent)
|
||||
{
|
||||
/* PoP:ed eMMC */
|
||||
db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
|
||||
/* On-board eMMC */
|
||||
db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
|
||||
|
||||
/*
|
||||
* On boards with the TC35892 GPIO expander, sdi0 will finally
|
||||
* be added when the TC35892 initializes and calls
|
||||
* mop500_sdi_tc35892_init() above.
|
||||
*/
|
||||
}
|
||||
|
||||
void __init snowball_sdi_init(struct device *parent)
|
||||
{
|
||||
/* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
|
||||
mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
|
||||
/* On-board eMMC */
|
||||
db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
|
||||
/* External Micro SD slot */
|
||||
mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
|
||||
mop500_sdi0_data.cd_invert = true;
|
||||
sdi0_configure(parent);
|
||||
}
|
||||
|
||||
void __init hrefv60_sdi_init(struct device *parent)
|
||||
{
|
||||
/* PoP:ed eMMC */
|
||||
db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
|
||||
/* On-board eMMC */
|
||||
db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
|
||||
/* External Micro SD slot */
|
||||
mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
|
||||
sdi0_configure(parent);
|
||||
/* WLAN SDIO channel */
|
||||
db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,120 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* License terms: GNU General Public License (GPL), version 2
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mfd/stmpe.h>
|
||||
#include <linux/input/bu21013.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/input/matrix_keypad.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include "board-mop500.h"
|
||||
|
||||
/* STMPE/SKE keypad use this key layout */
|
||||
static const unsigned int mop500_keymap[] = {
|
||||
KEY(2, 5, KEY_END),
|
||||
KEY(4, 1, KEY_POWER),
|
||||
KEY(3, 5, KEY_VOLUMEDOWN),
|
||||
KEY(1, 3, KEY_3),
|
||||
KEY(5, 2, KEY_RIGHT),
|
||||
KEY(5, 0, KEY_9),
|
||||
|
||||
KEY(0, 5, KEY_MENU),
|
||||
KEY(7, 6, KEY_ENTER),
|
||||
KEY(4, 5, KEY_0),
|
||||
KEY(6, 7, KEY_2),
|
||||
KEY(3, 4, KEY_UP),
|
||||
KEY(3, 3, KEY_DOWN),
|
||||
|
||||
KEY(6, 4, KEY_SEND),
|
||||
KEY(6, 2, KEY_BACK),
|
||||
KEY(4, 2, KEY_VOLUMEUP),
|
||||
KEY(5, 5, KEY_1),
|
||||
KEY(4, 3, KEY_LEFT),
|
||||
KEY(3, 2, KEY_7),
|
||||
};
|
||||
|
||||
static const struct matrix_keymap_data mop500_keymap_data = {
|
||||
.keymap = mop500_keymap,
|
||||
.keymap_size = ARRAY_SIZE(mop500_keymap),
|
||||
};
|
||||
/*
|
||||
* STMPE1601
|
||||
*/
|
||||
static struct stmpe_keypad_platform_data stmpe1601_keypad_data = {
|
||||
.debounce_ms = 64,
|
||||
.scan_count = 8,
|
||||
.no_autorepeat = true,
|
||||
.keymap_data = &mop500_keymap_data,
|
||||
};
|
||||
|
||||
static struct stmpe_platform_data stmpe1601_data = {
|
||||
.id = 1,
|
||||
.blocks = STMPE_BLOCK_KEYPAD,
|
||||
.irq_trigger = IRQF_TRIGGER_FALLING,
|
||||
.irq_base = MOP500_STMPE1601_IRQ(0),
|
||||
.keypad = &stmpe1601_keypad_data,
|
||||
.autosleep = true,
|
||||
.autosleep_timeout = 1024,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata mop500_i2c0_devices_stuib[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("stmpe1601", 0x40),
|
||||
.irq = NOMADIK_GPIO_TO_IRQ(218),
|
||||
.platform_data = &stmpe1601_data,
|
||||
.flags = I2C_CLIENT_WAKE,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* BU21013 ROHM touchscreen interface on the STUIBs
|
||||
*/
|
||||
|
||||
#define TOUCH_GPIO_PIN 84
|
||||
|
||||
#define TOUCH_XMAX 384
|
||||
#define TOUCH_YMAX 704
|
||||
|
||||
#define PRCMU_CLOCK_OCR 0x1CC
|
||||
#define TSC_EXT_CLOCK_9_6MHZ 0x840000
|
||||
|
||||
static struct bu21013_platform_device tsc_plat_device = {
|
||||
.touch_pin = TOUCH_GPIO_PIN,
|
||||
.touch_x_max = TOUCH_XMAX,
|
||||
.touch_y_max = TOUCH_YMAX,
|
||||
.ext_clk = false,
|
||||
.x_flip = false,
|
||||
.y_flip = true,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("bu21013_tp", 0x5C),
|
||||
.platform_data = &tsc_plat_device,
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("bu21013_tp", 0x5D),
|
||||
.platform_data = &tsc_plat_device,
|
||||
},
|
||||
};
|
||||
|
||||
void __init mop500_stuib_init(void)
|
||||
{
|
||||
if (machine_is_hrefv60())
|
||||
tsc_plat_device.cs_pin = HREFV60_TOUCH_RST_GPIO;
|
||||
else
|
||||
tsc_plat_device.cs_pin = GPIO_BU21013_CS;
|
||||
|
||||
mop500_uib_i2c_add(0, mop500_i2c0_devices_stuib,
|
||||
ARRAY_SIZE(mop500_i2c0_devices_stuib));
|
||||
|
||||
mop500_uib_i2c_add(3, u8500_i2c3_devices_stuib,
|
||||
ARRAY_SIZE(u8500_i2c3_devices_stuib));
|
||||
}
|
||||
|
|
@ -1,92 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Board data for the U8500 UIB, also known as the New UIB
|
||||
* License terms: GNU General Public License (GPL), version 2
|
||||
*/
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/mfd/tc3589x.h>
|
||||
#include <linux/input/matrix_keypad.h>
|
||||
|
||||
#include "irqs.h"
|
||||
|
||||
#include "board-mop500.h"
|
||||
|
||||
static struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B),
|
||||
.irq = NOMADIK_GPIO_TO_IRQ(84),
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* TC35893
|
||||
*/
|
||||
static const unsigned int u8500_keymap[] = {
|
||||
KEY(3, 1, KEY_END),
|
||||
KEY(4, 1, KEY_POWER),
|
||||
KEY(6, 4, KEY_VOLUMEDOWN),
|
||||
KEY(4, 2, KEY_EMAIL),
|
||||
KEY(3, 3, KEY_RIGHT),
|
||||
KEY(2, 5, KEY_BACKSPACE),
|
||||
|
||||
KEY(6, 7, KEY_MENU),
|
||||
KEY(5, 0, KEY_ENTER),
|
||||
KEY(4, 3, KEY_0),
|
||||
KEY(3, 4, KEY_DOT),
|
||||
KEY(5, 2, KEY_UP),
|
||||
KEY(3, 5, KEY_DOWN),
|
||||
|
||||
KEY(4, 5, KEY_SEND),
|
||||
KEY(0, 5, KEY_BACK),
|
||||
KEY(6, 2, KEY_VOLUMEUP),
|
||||
KEY(1, 3, KEY_SPACE),
|
||||
KEY(7, 6, KEY_LEFT),
|
||||
KEY(5, 5, KEY_SEARCH),
|
||||
};
|
||||
|
||||
static struct matrix_keymap_data u8500_keymap_data = {
|
||||
.keymap = u8500_keymap,
|
||||
.keymap_size = ARRAY_SIZE(u8500_keymap),
|
||||
};
|
||||
|
||||
static struct tc3589x_keypad_platform_data tc35893_data = {
|
||||
.krow = TC_KPD_ROWS,
|
||||
.kcol = TC_KPD_COLUMNS,
|
||||
.debounce_period = TC_KPD_DEBOUNCE_PERIOD,
|
||||
.settle_time = TC_KPD_SETTLE_TIME,
|
||||
.irqtype = IRQF_TRIGGER_FALLING,
|
||||
.enable_wakeup = true,
|
||||
.keymap_data = &u8500_keymap_data,
|
||||
.no_autorepeat = true,
|
||||
};
|
||||
|
||||
static struct tc3589x_platform_data tc3589x_keypad_data = {
|
||||
.block = TC3589x_BLOCK_KEYPAD,
|
||||
.keypad = &tc35893_data,
|
||||
.irq_base = MOP500_EGPIO_IRQ_BASE,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata mop500_i2c0_devices_u8500[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("tc3589x", 0x44),
|
||||
.platform_data = &tc3589x_keypad_data,
|
||||
.irq = NOMADIK_GPIO_TO_IRQ(218),
|
||||
.flags = I2C_CLIENT_WAKE,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
void __init mop500_u8500uib_init(void)
|
||||
{
|
||||
mop500_uib_i2c_add(3, mop500_i2c3_devices_u8500,
|
||||
ARRAY_SIZE(mop500_i2c3_devices_u8500));
|
||||
|
||||
mop500_uib_i2c_add(0, mop500_i2c0_devices_u8500,
|
||||
ARRAY_SIZE(mop500_i2c0_devices_u8500));
|
||||
|
||||
}
|
||||
|
|
@ -1,133 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
* License terms: GNU General Public License (GPL), version 2
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) "mop500-uib: " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/i2c.h>
|
||||
|
||||
#include "board-mop500.h"
|
||||
#include "id.h"
|
||||
|
||||
enum mop500_uib {
|
||||
STUIB,
|
||||
U8500UIB,
|
||||
};
|
||||
|
||||
struct uib {
|
||||
const char *name;
|
||||
const char *option;
|
||||
void (*init)(void);
|
||||
};
|
||||
|
||||
static struct uib __initdata mop500_uibs[] = {
|
||||
[STUIB] = {
|
||||
.name = "ST-UIB",
|
||||
.option = "stuib",
|
||||
.init = mop500_stuib_init,
|
||||
},
|
||||
[U8500UIB] = {
|
||||
.name = "U8500-UIB",
|
||||
.option = "u8500uib",
|
||||
.init = mop500_u8500uib_init,
|
||||
},
|
||||
};
|
||||
|
||||
static struct uib *mop500_uib;
|
||||
|
||||
static int __init mop500_uib_setup(char *str)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mop500_uibs); i++) {
|
||||
struct uib *uib = &mop500_uibs[i];
|
||||
|
||||
if (!strcmp(str, uib->option)) {
|
||||
mop500_uib = uib;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i == ARRAY_SIZE(mop500_uibs))
|
||||
pr_err("invalid uib= option (%s)\n", str);
|
||||
|
||||
return 1;
|
||||
}
|
||||
__setup("uib=", mop500_uib_setup);
|
||||
|
||||
/*
|
||||
* The UIBs are detected after the I2C host controllers are registered, so
|
||||
* i2c_register_board_info() can't be used.
|
||||
*/
|
||||
void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
|
||||
unsigned n)
|
||||
{
|
||||
struct i2c_adapter *adap;
|
||||
struct i2c_client *client;
|
||||
int i;
|
||||
|
||||
adap = i2c_get_adapter(busnum);
|
||||
if (!adap) {
|
||||
pr_err("failed to get adapter i2c%d\n", busnum);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < n; i++) {
|
||||
client = i2c_new_device(adap, &info[i]);
|
||||
if (!client)
|
||||
pr_err("failed to register %s to i2c%d\n",
|
||||
info[i].type, busnum);
|
||||
}
|
||||
|
||||
i2c_put_adapter(adap);
|
||||
}
|
||||
|
||||
static void __init __mop500_uib_init(struct uib *uib, const char *why)
|
||||
{
|
||||
pr_info("%s (%s)\n", uib->name, why);
|
||||
uib->init();
|
||||
}
|
||||
|
||||
/*
|
||||
* Detect the UIB attached based on the presence or absence of i2c devices.
|
||||
*/
|
||||
int __init mop500_uib_init(void)
|
||||
{
|
||||
struct uib *uib = mop500_uib;
|
||||
struct i2c_adapter *i2c0;
|
||||
int ret;
|
||||
|
||||
if (!cpu_is_u8500_family())
|
||||
return -ENODEV;
|
||||
|
||||
if (uib) {
|
||||
__mop500_uib_init(uib, "from uib= boot argument");
|
||||
return 0;
|
||||
}
|
||||
|
||||
i2c0 = i2c_get_adapter(0);
|
||||
if (!i2c0) {
|
||||
__mop500_uib_init(&mop500_uibs[STUIB],
|
||||
"fallback, could not get i2c0");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* U8500-UIB has the TC35893 at 0x44 on I2C0, the ST-UIB doesn't. */
|
||||
ret = i2c_smbus_xfer(i2c0, 0x44, 0, I2C_SMBUS_WRITE, 0,
|
||||
I2C_SMBUS_QUICK, NULL);
|
||||
i2c_put_adapter(i2c0);
|
||||
|
||||
if (ret == 0)
|
||||
uib = &mop500_uibs[U8500UIB];
|
||||
else
|
||||
uib = &mop500_uibs[STUIB];
|
||||
|
||||
__mop500_uib_init(uib, "detected");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -14,27 +14,16 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/platform_data/i2c-nomadik.h>
|
||||
#include <linux/platform_data/db8500_thermal.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/amba/bus.h>
|
||||
#include <linux/amba/pl022.h>
|
||||
#include <linux/amba/serial.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/mfd/abx500/ab8500.h>
|
||||
#include <linux/regulator/ab8500.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/driver.h>
|
||||
#include <linux/regulator/gpio-regulator.h>
|
||||
#include <linux/mfd/tc3589x.h>
|
||||
#include <linux/mfd/tps6105x.h>
|
||||
#include <linux/mfd/abx500/ab8500-gpio.h>
|
||||
#include <linux/mfd/abx500/ab8500-codec.h>
|
||||
#include <linux/platform_data/leds-lp55xx.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
|
|
@ -46,7 +35,6 @@
|
|||
#include "setup.h"
|
||||
#include "devices.h"
|
||||
#include "irqs.h"
|
||||
#include <linux/platform_data/crypto-ux500.h>
|
||||
|
||||
#include "ste-dma40-db8500.h"
|
||||
#include "db8500-regs.h"
|
||||
|
|
@ -54,401 +42,9 @@
|
|||
#include "board-mop500.h"
|
||||
#include "board-mop500-regulators.h"
|
||||
|
||||
static struct gpio_led snowball_led_array[] = {
|
||||
{
|
||||
.name = "user_led",
|
||||
.default_trigger = "heartbeat",
|
||||
.gpio = 142,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data snowball_led_data = {
|
||||
.leds = snowball_led_array,
|
||||
.num_leds = ARRAY_SIZE(snowball_led_array),
|
||||
};
|
||||
|
||||
static struct platform_device snowball_led_dev = {
|
||||
.name = "leds-gpio",
|
||||
.dev = {
|
||||
.platform_data = &snowball_led_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config snowball_gpio_en_3v3_data = {
|
||||
.supply_name = "EN-3V3",
|
||||
.gpio = SNOWBALL_EN_3V3_ETH_GPIO,
|
||||
.microvolts = 3300000,
|
||||
.enable_high = 1,
|
||||
.init_data = &gpio_en_3v3_regulator,
|
||||
.startup_delay = 5000, /* 1200us */
|
||||
};
|
||||
|
||||
static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &snowball_gpio_en_3v3_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* Dynamically populated. */
|
||||
static struct gpio sdi0_reg_gpios[] = {
|
||||
{ 0, GPIOF_OUT_INIT_LOW, "mmci_vsel" },
|
||||
};
|
||||
|
||||
static struct gpio_regulator_state sdi0_reg_states[] = {
|
||||
{ .value = 2900000, .gpios = (0 << 0) },
|
||||
{ .value = 1800000, .gpios = (1 << 0) },
|
||||
};
|
||||
|
||||
static struct gpio_regulator_config sdi0_reg_info = {
|
||||
.supply_name = "ext-mmc-level-shifter",
|
||||
.gpios = sdi0_reg_gpios,
|
||||
.nr_gpios = ARRAY_SIZE(sdi0_reg_gpios),
|
||||
.states = sdi0_reg_states,
|
||||
.nr_states = ARRAY_SIZE(sdi0_reg_states),
|
||||
.type = REGULATOR_VOLTAGE,
|
||||
.enable_high = 1,
|
||||
.enabled_at_boot = 0,
|
||||
.init_data = &sdi0_reg_init_data,
|
||||
.startup_delay = 100,
|
||||
};
|
||||
|
||||
static struct platform_device sdi0_regulator = {
|
||||
.name = "gpio-regulator",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &sdi0_reg_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct abx500_gpio_platform_data ab8500_gpio_pdata = {
|
||||
.gpio_base = MOP500_AB8500_PIN_GPIO(1),
|
||||
};
|
||||
|
||||
/* ab8500-codec */
|
||||
static struct ab8500_codec_platform_data ab8500_codec_pdata = {
|
||||
.amics = {
|
||||
.mic1_type = AMIC_TYPE_DIFFERENTIAL,
|
||||
.mic2_type = AMIC_TYPE_DIFFERENTIAL,
|
||||
.mic1a_micbias = AMIC_MICBIAS_VAMIC1,
|
||||
.mic1b_micbias = AMIC_MICBIAS_VAMIC1,
|
||||
.mic2_micbias = AMIC_MICBIAS_VAMIC2
|
||||
},
|
||||
.ear_cmv = EAR_CMV_0_95V
|
||||
};
|
||||
|
||||
static struct gpio_keys_button snowball_key_array[] = {
|
||||
{
|
||||
.gpio = 32,
|
||||
.type = EV_KEY,
|
||||
.code = KEY_1,
|
||||
.desc = "userpb",
|
||||
.active_low = 1,
|
||||
.debounce_interval = 50,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = 151,
|
||||
.type = EV_KEY,
|
||||
.code = KEY_2,
|
||||
.desc = "extkb1",
|
||||
.active_low = 1,
|
||||
.debounce_interval = 50,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = 152,
|
||||
.type = EV_KEY,
|
||||
.code = KEY_3,
|
||||
.desc = "extkb2",
|
||||
.active_low = 1,
|
||||
.debounce_interval = 50,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = 161,
|
||||
.type = EV_KEY,
|
||||
.code = KEY_4,
|
||||
.desc = "extkb3",
|
||||
.active_low = 1,
|
||||
.debounce_interval = 50,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = 162,
|
||||
.type = EV_KEY,
|
||||
.code = KEY_5,
|
||||
.desc = "extkb4",
|
||||
.active_low = 1,
|
||||
.debounce_interval = 50,
|
||||
.wakeup = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data snowball_key_data = {
|
||||
.buttons = snowball_key_array,
|
||||
.nbuttons = ARRAY_SIZE(snowball_key_array),
|
||||
};
|
||||
|
||||
static struct platform_device snowball_key_dev = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &snowball_key_data,
|
||||
}
|
||||
};
|
||||
|
||||
static struct smsc911x_platform_config snowball_sbnet_cfg = {
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
||||
.flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
|
||||
.shift = 1,
|
||||
};
|
||||
|
||||
static struct resource sbnet_res[] = {
|
||||
{
|
||||
.name = "smsc911x-memory",
|
||||
.start = (0x5000 << 16),
|
||||
.end = (0x5000 << 16) + 0xffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = NOMADIK_GPIO_TO_IRQ(140),
|
||||
.end = NOMADIK_GPIO_TO_IRQ(140),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device snowball_sbnet_dev = {
|
||||
.name = "smsc911x",
|
||||
.num_resources = ARRAY_SIZE(sbnet_res),
|
||||
.resource = sbnet_res,
|
||||
.dev = {
|
||||
.platform_data = &snowball_sbnet_cfg,
|
||||
},
|
||||
};
|
||||
|
||||
struct ab8500_platform_data ab8500_platdata = {
|
||||
.irq_base = MOP500_AB8500_IRQ_BASE,
|
||||
.regulator = &ab8500_regulator_plat_data,
|
||||
.gpio = &ab8500_gpio_pdata,
|
||||
.codec = &ab8500_codec_pdata,
|
||||
};
|
||||
|
||||
static struct platform_device u8500_cpufreq_cooling_device = {
|
||||
.name = "db8500-cpufreq-cooling",
|
||||
};
|
||||
|
||||
/*
|
||||
* TPS61052
|
||||
*/
|
||||
|
||||
static struct tps6105x_platform_data mop500_tps61052_data = {
|
||||
.mode = TPS6105X_MODE_VOLTAGE,
|
||||
.regulator_data = &tps61052_regulator,
|
||||
};
|
||||
|
||||
/*
|
||||
* TC35892
|
||||
*/
|
||||
|
||||
static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
|
||||
{
|
||||
struct device *parent = NULL;
|
||||
#if 0
|
||||
/* FIXME: Is the sdi actually part of tc3589x? */
|
||||
parent = tc3589x->dev;
|
||||
#endif
|
||||
mop500_sdi_tc35892_init(parent);
|
||||
}
|
||||
|
||||
static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
|
||||
.gpio_base = MOP500_EGPIO(0),
|
||||
.setup = mop500_tc35892_init,
|
||||
};
|
||||
|
||||
static struct tc3589x_platform_data mop500_tc35892_data = {
|
||||
.block = TC3589x_BLOCK_GPIO,
|
||||
.gpio = &mop500_tc35892_gpio_data,
|
||||
.irq_base = MOP500_EGPIO_IRQ_BASE,
|
||||
};
|
||||
|
||||
static struct lp55xx_led_config lp5521_pri_led[] = {
|
||||
[0] = {
|
||||
.chan_nr = 0,
|
||||
.led_current = 0x2f,
|
||||
.max_current = 0x5f,
|
||||
},
|
||||
[1] = {
|
||||
.chan_nr = 1,
|
||||
.led_current = 0x2f,
|
||||
.max_current = 0x5f,
|
||||
},
|
||||
[2] = {
|
||||
.chan_nr = 2,
|
||||
.led_current = 0x2f,
|
||||
.max_current = 0x5f,
|
||||
},
|
||||
};
|
||||
|
||||
static struct lp55xx_platform_data __initdata lp5521_pri_data = {
|
||||
.label = "lp5521_pri",
|
||||
.led_config = &lp5521_pri_led[0],
|
||||
.num_channels = 3,
|
||||
.clock_mode = LP55XX_CLOCK_EXT,
|
||||
};
|
||||
|
||||
static struct lp55xx_led_config lp5521_sec_led[] = {
|
||||
[0] = {
|
||||
.chan_nr = 0,
|
||||
.led_current = 0x2f,
|
||||
.max_current = 0x5f,
|
||||
},
|
||||
[1] = {
|
||||
.chan_nr = 1,
|
||||
.led_current = 0x2f,
|
||||
.max_current = 0x5f,
|
||||
},
|
||||
[2] = {
|
||||
.chan_nr = 2,
|
||||
.led_current = 0x2f,
|
||||
.max_current = 0x5f,
|
||||
},
|
||||
};
|
||||
|
||||
static struct lp55xx_platform_data __initdata lp5521_sec_data = {
|
||||
.label = "lp5521_sec",
|
||||
.led_config = &lp5521_sec_led[0],
|
||||
.num_channels = 3,
|
||||
.clock_mode = LP55XX_CLOCK_EXT,
|
||||
};
|
||||
|
||||
/* I2C0 devices only available on the first HREF/MOP500 */
|
||||
static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("tc3589x", 0x42),
|
||||
.irq = NOMADIK_GPIO_TO_IRQ(217),
|
||||
.platform_data = &mop500_tc35892_data,
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("tps61052", 0x33),
|
||||
.platform_data = &mop500_tps61052_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
|
||||
{
|
||||
/* lp5521 LED driver, 1st device */
|
||||
I2C_BOARD_INFO("lp5521", 0x33),
|
||||
.platform_data = &lp5521_pri_data,
|
||||
},
|
||||
{
|
||||
/* lp5521 LED driver, 2st device */
|
||||
I2C_BOARD_INFO("lp5521", 0x34),
|
||||
.platform_data = &lp5521_sec_data,
|
||||
},
|
||||
{
|
||||
/* Light sensor Rohm BH1780GLI */
|
||||
I2C_BOARD_INFO("bh1780", 0x29),
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mop500_i2c_board_init(void)
|
||||
{
|
||||
if (machine_is_u8500())
|
||||
mop500_uib_i2c_add(0, mop500_i2c0_devices,
|
||||
ARRAY_SIZE(mop500_i2c0_devices));
|
||||
mop500_uib_i2c_add(2, mop500_i2c2_devices,
|
||||
ARRAY_SIZE(mop500_i2c2_devices));
|
||||
return 0;
|
||||
}
|
||||
device_initcall(mop500_i2c_board_init);
|
||||
|
||||
static void __init mop500_i2c_init(struct device *parent)
|
||||
{
|
||||
db8500_add_i2c0(parent, NULL);
|
||||
db8500_add_i2c1(parent, NULL);
|
||||
db8500_add_i2c2(parent, NULL);
|
||||
db8500_add_i2c3(parent, NULL);
|
||||
}
|
||||
|
||||
static struct gpio_keys_button mop500_gpio_keys[] = {
|
||||
{
|
||||
.desc = "SFH7741 Proximity Sensor",
|
||||
.type = EV_SW,
|
||||
.code = SW_FRONT_PROXIMITY,
|
||||
.active_low = 0,
|
||||
.can_disable = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct regulator *prox_regulator;
|
||||
static int mop500_prox_activate(struct device *dev);
|
||||
static void mop500_prox_deactivate(struct device *dev);
|
||||
|
||||
static struct gpio_keys_platform_data mop500_gpio_keys_data = {
|
||||
.buttons = mop500_gpio_keys,
|
||||
.nbuttons = ARRAY_SIZE(mop500_gpio_keys),
|
||||
.enable = mop500_prox_activate,
|
||||
.disable = mop500_prox_deactivate,
|
||||
};
|
||||
|
||||
static struct platform_device mop500_gpio_keys_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &mop500_gpio_keys_data,
|
||||
},
|
||||
};
|
||||
|
||||
static int mop500_prox_activate(struct device *dev)
|
||||
{
|
||||
prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
|
||||
"vcc");
|
||||
if (IS_ERR(prox_regulator)) {
|
||||
dev_err(&mop500_gpio_keys_device.dev,
|
||||
"no regulator\n");
|
||||
return PTR_ERR(prox_regulator);
|
||||
}
|
||||
|
||||
return regulator_enable(prox_regulator);
|
||||
}
|
||||
|
||||
static void mop500_prox_deactivate(struct device *dev)
|
||||
{
|
||||
regulator_disable(prox_regulator);
|
||||
regulator_put(prox_regulator);
|
||||
}
|
||||
|
||||
static struct cryp_platform_data u8500_cryp1_platform_data = {
|
||||
.mem_to_engine = {
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV48_CAC1,
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
},
|
||||
.engine_to_mem = {
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV48_CAC1,
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
}
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV50_HAC1_TX,
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
};
|
||||
|
||||
static struct hash_platform_data u8500_hash1_platform_data = {
|
||||
.mem_to_engine = &u8500_hash_dma_cfg_tx,
|
||||
.dma_filter = stedma40_filter,
|
||||
};
|
||||
|
||||
/* add any platform devices here - TODO */
|
||||
static struct platform_device *mop500_platform_devs[] __initdata = {
|
||||
&mop500_gpio_keys_device,
|
||||
&sdi0_regulator,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_STE_DMA40
|
||||
|
|
@ -480,236 +76,3 @@ struct pl022_ssp_controller ssp0_plat = {
|
|||
*/
|
||||
.num_chipselect = 5,
|
||||
};
|
||||
|
||||
static void __init mop500_spi_init(struct device *parent)
|
||||
{
|
||||
db8500_add_ssp0(parent, &ssp0_plat);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_STE_DMA40
|
||||
static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV13_UART0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV13_UART0,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV12_UART1,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV12_UART1,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = DMA_DEV_TO_MEM,
|
||||
.dev_type = DB8500_DMA_DEV11_UART2,
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
|
||||
.mode = STEDMA40_MODE_LOGICAL,
|
||||
.dir = DMA_MEM_TO_DEV,
|
||||
.dev_type = DB8500_DMA_DEV11_UART2,
|
||||
};
|
||||
#endif
|
||||
|
||||
struct amba_pl011_data uart0_plat = {
|
||||
#ifdef CONFIG_STE_DMA40
|
||||
.dma_filter = stedma40_filter,
|
||||
.dma_rx_param = &uart0_dma_cfg_rx,
|
||||
.dma_tx_param = &uart0_dma_cfg_tx,
|
||||
#endif
|
||||
};
|
||||
|
||||
struct amba_pl011_data uart1_plat = {
|
||||
#ifdef CONFIG_STE_DMA40
|
||||
.dma_filter = stedma40_filter,
|
||||
.dma_rx_param = &uart1_dma_cfg_rx,
|
||||
.dma_tx_param = &uart1_dma_cfg_tx,
|
||||
#endif
|
||||
};
|
||||
|
||||
struct amba_pl011_data uart2_plat = {
|
||||
#ifdef CONFIG_STE_DMA40
|
||||
.dma_filter = stedma40_filter,
|
||||
.dma_rx_param = &uart2_dma_cfg_rx,
|
||||
.dma_tx_param = &uart2_dma_cfg_tx,
|
||||
#endif
|
||||
};
|
||||
|
||||
static void __init mop500_uart_init(struct device *parent)
|
||||
{
|
||||
db8500_add_uart0(parent, &uart0_plat);
|
||||
db8500_add_uart1(parent, &uart1_plat);
|
||||
db8500_add_uart2(parent, &uart2_plat);
|
||||
}
|
||||
|
||||
static void __init u8500_cryp1_hash1_init(struct device *parent)
|
||||
{
|
||||
db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
|
||||
db8500_add_hash1(parent, &u8500_hash1_platform_data);
|
||||
}
|
||||
|
||||
static struct platform_device *snowball_platform_devs[] __initdata = {
|
||||
&snowball_led_dev,
|
||||
&snowball_key_dev,
|
||||
&snowball_sbnet_dev,
|
||||
&snowball_gpio_en_3v3_regulator_dev,
|
||||
&u8500_cpufreq_cooling_device,
|
||||
&sdi0_regulator,
|
||||
};
|
||||
|
||||
static void __init mop500_init_machine(void)
|
||||
{
|
||||
struct device *parent = NULL;
|
||||
int i;
|
||||
|
||||
platform_device_register(&db8500_prcmu_device);
|
||||
mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
|
||||
|
||||
sdi0_reg_info.enable_gpio = GPIO_SDMMC_EN;
|
||||
sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
|
||||
|
||||
mop500_pinmaps_init();
|
||||
parent = u8500_init_devices();
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
|
||||
mop500_platform_devs[i]->dev.parent = parent;
|
||||
|
||||
platform_add_devices(mop500_platform_devs,
|
||||
ARRAY_SIZE(mop500_platform_devs));
|
||||
|
||||
mop500_i2c_init(parent);
|
||||
mop500_sdi_init(parent);
|
||||
mop500_spi_init(parent);
|
||||
mop500_audio_init(parent);
|
||||
mop500_uart_init(parent);
|
||||
u8500_cryp1_hash1_init(parent);
|
||||
|
||||
/* This board has full regulator constraints */
|
||||
regulator_has_full_constraints();
|
||||
}
|
||||
|
||||
|
||||
static void __init snowball_init_machine(void)
|
||||
{
|
||||
struct device *parent = NULL;
|
||||
int i;
|
||||
|
||||
platform_device_register(&db8500_prcmu_device);
|
||||
|
||||
sdi0_reg_info.enable_gpio = SNOWBALL_SDMMC_EN_GPIO;
|
||||
sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
|
||||
|
||||
snowball_pinmaps_init();
|
||||
parent = u8500_init_devices();
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
|
||||
snowball_platform_devs[i]->dev.parent = parent;
|
||||
|
||||
platform_add_devices(snowball_platform_devs,
|
||||
ARRAY_SIZE(snowball_platform_devs));
|
||||
|
||||
mop500_i2c_init(parent);
|
||||
snowball_sdi_init(parent);
|
||||
mop500_spi_init(parent);
|
||||
mop500_audio_init(parent);
|
||||
mop500_uart_init(parent);
|
||||
|
||||
u8500_cryp1_hash1_init(parent);
|
||||
|
||||
/* This board has full regulator constraints */
|
||||
regulator_has_full_constraints();
|
||||
}
|
||||
|
||||
static void __init hrefv60_init_machine(void)
|
||||
{
|
||||
struct device *parent = NULL;
|
||||
int i;
|
||||
|
||||
platform_device_register(&db8500_prcmu_device);
|
||||
/*
|
||||
* The HREFv60 board removed a GPIO expander and routed
|
||||
* all these GPIO pins to the internal GPIO controller
|
||||
* instead.
|
||||
*/
|
||||
mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
|
||||
|
||||
sdi0_reg_info.enable_gpio = HREFV60_SDMMC_EN_GPIO;
|
||||
sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
|
||||
|
||||
hrefv60_pinmaps_init();
|
||||
parent = u8500_init_devices();
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
|
||||
mop500_platform_devs[i]->dev.parent = parent;
|
||||
|
||||
platform_add_devices(mop500_platform_devs,
|
||||
ARRAY_SIZE(mop500_platform_devs));
|
||||
|
||||
mop500_i2c_init(parent);
|
||||
hrefv60_sdi_init(parent);
|
||||
mop500_spi_init(parent);
|
||||
mop500_audio_init(parent);
|
||||
mop500_uart_init(parent);
|
||||
|
||||
/* This board has full regulator constraints */
|
||||
regulator_has_full_constraints();
|
||||
}
|
||||
|
||||
MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
|
||||
/* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
|
||||
.atag_offset = 0x100,
|
||||
.smp = smp_ops(ux500_smp_ops),
|
||||
.map_io = u8500_map_io,
|
||||
.init_irq = ux500_init_irq,
|
||||
/* we re-use nomadik timer here */
|
||||
.init_time = ux500_timer_init,
|
||||
.init_machine = mop500_init_machine,
|
||||
.init_late = ux500_init_late,
|
||||
.restart = ux500_restart,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
|
||||
.atag_offset = 0x100,
|
||||
.map_io = u8500_map_io,
|
||||
.init_irq = ux500_init_irq,
|
||||
.init_time = ux500_timer_init,
|
||||
.init_machine = mop500_init_machine,
|
||||
.init_late = ux500_init_late,
|
||||
.restart = ux500_restart,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
|
||||
.atag_offset = 0x100,
|
||||
.smp = smp_ops(ux500_smp_ops),
|
||||
.map_io = u8500_map_io,
|
||||
.init_irq = ux500_init_irq,
|
||||
.init_time = ux500_timer_init,
|
||||
.init_machine = hrefv60_init_machine,
|
||||
.init_late = ux500_init_late,
|
||||
.restart = ux500_restart,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
|
||||
.atag_offset = 0x100,
|
||||
.smp = smp_ops(ux500_smp_ops),
|
||||
.map_io = u8500_map_io,
|
||||
.init_irq = ux500_init_irq,
|
||||
/* we re-use nomadik timer here */
|
||||
.init_time = ux500_timer_init,
|
||||
.init_machine = snowball_init_machine,
|
||||
.init_late = NULL,
|
||||
.restart = ux500_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -79,7 +79,6 @@
|
|||
#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */
|
||||
|
||||
struct device;
|
||||
struct i2c_board_info;
|
||||
extern struct mmci_platform_data mop500_sdi0_data;
|
||||
extern struct mmci_platform_data mop500_sdi1_data;
|
||||
extern struct mmci_platform_data mop500_sdi2_data;
|
||||
|
|
@ -88,25 +87,10 @@ extern struct msp_i2s_platform_data msp0_platform_data;
|
|||
extern struct msp_i2s_platform_data msp1_platform_data;
|
||||
extern struct msp_i2s_platform_data msp2_platform_data;
|
||||
extern struct msp_i2s_platform_data msp3_platform_data;
|
||||
extern struct arm_pmu_platdata db8500_pmu_platdata;
|
||||
extern struct amba_pl011_data uart0_plat;
|
||||
extern struct amba_pl011_data uart1_plat;
|
||||
extern struct amba_pl011_data uart2_plat;
|
||||
extern struct pl022_ssp_controller ssp0_plat;
|
||||
extern struct stedma40_platform_data dma40_plat_data;
|
||||
|
||||
extern void mop500_sdi_init(struct device *parent);
|
||||
extern void snowball_sdi_init(struct device *parent);
|
||||
extern void hrefv60_sdi_init(struct device *parent);
|
||||
extern void mop500_sdi_tc35892_init(struct device *parent);
|
||||
void __init mop500_u8500uib_init(void);
|
||||
void __init mop500_stuib_init(void);
|
||||
void __init mop500_pinmaps_init(void);
|
||||
void __init snowball_pinmaps_init(void);
|
||||
void __init hrefv60_pinmaps_init(void);
|
||||
void mop500_audio_init(struct device *parent);
|
||||
|
||||
int __init mop500_uib_init(void);
|
||||
void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
|
||||
unsigned n);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@
|
|||
#include "irqs.h"
|
||||
|
||||
#include "devices-db8500.h"
|
||||
#include "ste-dma40-db8500.h"
|
||||
#include "db8500-regs.h"
|
||||
#include "board-mop500.h"
|
||||
#include "id.h"
|
||||
|
|
@ -93,14 +92,6 @@ void __init u8500_map_io(void)
|
|||
iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
|
||||
}
|
||||
|
||||
static struct resource db8500_pmu_resources[] = {
|
||||
[0] = {
|
||||
.start = IRQ_DB8500_PMU,
|
||||
.end = IRQ_DB8500_PMU,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* The PMU IRQ lines of two cores are wired together into a single interrupt.
|
||||
* Bounce the interrupt to the other core if it's not ours.
|
||||
|
|
@ -125,54 +116,6 @@ struct arm_pmu_platdata db8500_pmu_platdata = {
|
|||
.handle_irq = db8500_pmu_handler,
|
||||
};
|
||||
|
||||
static struct platform_device db8500_pmu_device = {
|
||||
.name = "arm-pmu",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(db8500_pmu_resources),
|
||||
.resource = db8500_pmu_resources,
|
||||
.dev.platform_data = &db8500_pmu_platdata,
|
||||
};
|
||||
|
||||
static struct platform_device *platform_devs[] __initdata = {
|
||||
&u8500_dma40_device,
|
||||
&db8500_pmu_device,
|
||||
};
|
||||
|
||||
static resource_size_t __initdata db8500_gpio_base[] = {
|
||||
U8500_GPIOBANK0_BASE,
|
||||
U8500_GPIOBANK1_BASE,
|
||||
U8500_GPIOBANK2_BASE,
|
||||
U8500_GPIOBANK3_BASE,
|
||||
U8500_GPIOBANK4_BASE,
|
||||
U8500_GPIOBANK5_BASE,
|
||||
U8500_GPIOBANK6_BASE,
|
||||
U8500_GPIOBANK7_BASE,
|
||||
U8500_GPIOBANK8_BASE,
|
||||
};
|
||||
|
||||
static void __init db8500_add_gpios(struct device *parent)
|
||||
{
|
||||
struct nmk_gpio_platform_data pdata = {
|
||||
.supports_sleepmode = true,
|
||||
};
|
||||
|
||||
dbx500_add_gpios(parent, db8500_gpio_base,
|
||||
ARRAY_SIZE(db8500_gpio_base),
|
||||
IRQ_DB8500_GPIO0, &pdata);
|
||||
dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
|
||||
}
|
||||
|
||||
static int usb_db8500_dma_cfg[] = {
|
||||
DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9,
|
||||
DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10,
|
||||
DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11,
|
||||
DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12,
|
||||
DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13,
|
||||
DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14,
|
||||
DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15,
|
||||
DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8
|
||||
};
|
||||
|
||||
static const char *db8500_read_soc_id(void)
|
||||
{
|
||||
void __iomem *uid = __io_address(U8500_BB_UID_BASE);
|
||||
|
|
@ -192,60 +135,22 @@ static struct device * __init db8500_soc_device_init(void)
|
|||
return ux500_soc_device_init(soc_id);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is called from the board init
|
||||
*/
|
||||
struct device * __init u8500_init_devices(void)
|
||||
{
|
||||
struct device *parent;
|
||||
int i;
|
||||
|
||||
parent = db8500_soc_device_init();
|
||||
|
||||
db8500_add_rtc(parent);
|
||||
db8500_add_gpios(parent);
|
||||
db8500_add_usb(parent, usb_db8500_dma_cfg, usb_db8500_dma_cfg);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
|
||||
platform_devs[i]->dev.parent = parent;
|
||||
|
||||
platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
|
||||
|
||||
return parent;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MACH_UX500_DT
|
||||
static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
||||
/* Requires call-back bindings. */
|
||||
OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
|
||||
/* Requires DMA bindings. */
|
||||
OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", NULL),
|
||||
/* Requires clock name bindings. */
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
|
||||
OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,db8500-musb", 0xa03e0000, "musb-ux500.0", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
|
||||
"ux500-msp-i2s.0", &msp0_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
|
||||
"ux500-msp-i2s.1", &msp1_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
|
||||
"ux500-msp-i2s.2", &msp2_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
|
||||
"ux500-msp-i2s.3", &msp3_platform_data),
|
||||
/* Requires non-DT:able platform data. */
|
||||
OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
|
||||
&db8500_prcmu_pdata),
|
||||
OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x.0", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
|
||||
OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
|
||||
|
|
@ -253,17 +158,6 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
|||
/* Requires device name bindings. */
|
||||
OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
|
||||
"pinctrl-db8500", NULL),
|
||||
/* Requires clock name and DMA bindings. */
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
|
||||
"ux500-msp-i2s.0", &msp0_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
|
||||
"ux500-msp-i2s.1", &msp1_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
|
||||
"ux500-msp-i2s.2", &msp2_platform_data),
|
||||
OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
|
||||
"ux500-msp-i2s.3", &msp3_platform_data),
|
||||
/* Requires clock name bindings and channel address lookup table. */
|
||||
OF_DEV_AUXDATA("stericsson,db8500-dma40", 0x801C0000, "dma40.0", NULL),
|
||||
{},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -78,9 +78,17 @@ void __init ux500_init_irq(void)
|
|||
if (cpu_is_u8500_family()) {
|
||||
prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
|
||||
ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
|
||||
u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
|
||||
U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
|
||||
U8500_CLKRST6_BASE);
|
||||
|
||||
if (of_have_populated_dt())
|
||||
u8500_of_clk_init(U8500_CLKRST1_BASE,
|
||||
U8500_CLKRST2_BASE,
|
||||
U8500_CLKRST3_BASE,
|
||||
U8500_CLKRST5_BASE,
|
||||
U8500_CLKRST6_BASE);
|
||||
else
|
||||
u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
|
||||
U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
|
||||
U8500_CLKRST6_BASE);
|
||||
} else if (cpu_is_u9540()) {
|
||||
prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
|
||||
ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
|
||||
|
|
@ -96,11 +104,6 @@ void __init ux500_init_irq(void)
|
|||
}
|
||||
}
|
||||
|
||||
void __init ux500_init_late(void)
|
||||
{
|
||||
mop500_uib_init();
|
||||
}
|
||||
|
||||
static const char * __init ux500_get_machine(void)
|
||||
{
|
||||
return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
|
||||
|
|
|
|||
|
|
@ -1,60 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
* License terms: GNU General Public License (GPL), version 2.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/platform_data/pinctrl-nomadik.h>
|
||||
|
||||
#include "irqs.h"
|
||||
|
||||
#include "devices-common.h"
|
||||
|
||||
static struct platform_device *
|
||||
dbx500_add_gpio(struct device *parent, int id, resource_size_t addr, int irq,
|
||||
struct nmk_gpio_platform_data *pdata)
|
||||
{
|
||||
struct resource resources[] = {
|
||||
{
|
||||
.start = addr,
|
||||
.end = addr + 127,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = irq,
|
||||
.end = irq,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
return platform_device_register_resndata(
|
||||
parent,
|
||||
"gpio",
|
||||
id,
|
||||
resources,
|
||||
ARRAY_SIZE(resources),
|
||||
pdata,
|
||||
sizeof(*pdata));
|
||||
}
|
||||
|
||||
void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
|
||||
int irq, struct nmk_gpio_platform_data *pdata)
|
||||
{
|
||||
int first = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < num; i++, first += 32, irq++) {
|
||||
pdata->first_gpio = first;
|
||||
pdata->first_irq = NOMADIK_GPIO_TO_IRQ(first);
|
||||
pdata->num_gpio = 32;
|
||||
|
||||
dbx500_add_gpio(parent, i, base[i], irq, pdata);
|
||||
}
|
||||
}
|
||||
|
|
@ -1,149 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2010
|
||||
*
|
||||
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
|
||||
* License terms: GNU General Public License (GPL), version 2.
|
||||
*/
|
||||
|
||||
#ifndef __DEVICES_COMMON_H
|
||||
#define __DEVICES_COMMON_H
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/sys_soc.h>
|
||||
#include <linux/amba/bus.h>
|
||||
#include <linux/platform_data/i2c-nomadik.h>
|
||||
#include <linux/platform_data/crypto-ux500.h>
|
||||
|
||||
struct spi_master_cntlr;
|
||||
|
||||
static inline struct amba_device *
|
||||
dbx500_add_msp_spi(struct device *parent, const char *name,
|
||||
resource_size_t base, int irq,
|
||||
struct spi_master_cntlr *pdata)
|
||||
{
|
||||
return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
|
||||
pdata, 0);
|
||||
}
|
||||
|
||||
static inline struct amba_device *
|
||||
dbx500_add_spi(struct device *parent, const char *name, resource_size_t base,
|
||||
int irq, struct spi_master_cntlr *pdata,
|
||||
u32 periphid)
|
||||
{
|
||||
return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
|
||||
pdata, periphid);
|
||||
}
|
||||
|
||||
struct mmci_platform_data;
|
||||
|
||||
static inline struct amba_device *
|
||||
dbx500_add_sdi(struct device *parent, const char *name, resource_size_t base,
|
||||
int irq, struct mmci_platform_data *pdata, u32 periphid)
|
||||
{
|
||||
return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
|
||||
pdata, periphid);
|
||||
}
|
||||
|
||||
struct amba_pl011_data;
|
||||
|
||||
static inline struct amba_device *
|
||||
dbx500_add_uart(struct device *parent, const char *name, resource_size_t base,
|
||||
int irq, struct amba_pl011_data *pdata)
|
||||
{
|
||||
return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
|
||||
}
|
||||
|
||||
struct nmk_i2c_controller;
|
||||
|
||||
static inline struct amba_device *
|
||||
dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq,
|
||||
struct nmk_i2c_controller *data)
|
||||
{
|
||||
/* Conjure a name similar to what the platform device used to have */
|
||||
char name[16];
|
||||
|
||||
snprintf(name, sizeof(name), "nmk-i2c.%d", id);
|
||||
return amba_apb_device_add(parent, name, base, SZ_4K, irq, 0, data, 0);
|
||||
}
|
||||
|
||||
static inline struct amba_device *
|
||||
dbx500_add_rtc(struct device *parent, resource_size_t base, int irq)
|
||||
{
|
||||
return amba_apb_device_add(parent, "rtc-pl031", base, SZ_4K, irq,
|
||||
0, NULL, 0);
|
||||
}
|
||||
|
||||
struct cryp_platform_data;
|
||||
|
||||
static inline struct platform_device *
|
||||
dbx500_add_cryp1(struct device *parent, int id, resource_size_t base, int irq,
|
||||
struct cryp_platform_data *pdata)
|
||||
{
|
||||
struct resource res[] = {
|
||||
DEFINE_RES_MEM(base, SZ_4K),
|
||||
DEFINE_RES_IRQ(irq),
|
||||
};
|
||||
|
||||
struct platform_device_info pdevinfo = {
|
||||
.parent = parent,
|
||||
.name = "cryp1",
|
||||
.id = id,
|
||||
.res = res,
|
||||
.num_res = ARRAY_SIZE(res),
|
||||
.data = pdata,
|
||||
.size_data = sizeof(*pdata),
|
||||
.dma_mask = DMA_BIT_MASK(32),
|
||||
};
|
||||
|
||||
return platform_device_register_full(&pdevinfo);
|
||||
}
|
||||
|
||||
struct hash_platform_data;
|
||||
|
||||
static inline struct platform_device *
|
||||
dbx500_add_hash1(struct device *parent, int id, resource_size_t base,
|
||||
struct hash_platform_data *pdata)
|
||||
{
|
||||
struct resource res[] = {
|
||||
DEFINE_RES_MEM(base, SZ_4K),
|
||||
};
|
||||
|
||||
struct platform_device_info pdevinfo = {
|
||||
.parent = parent,
|
||||
.name = "hash1",
|
||||
.id = id,
|
||||
.res = res,
|
||||
.num_res = ARRAY_SIZE(res),
|
||||
.data = pdata,
|
||||
.size_data = sizeof(*pdata),
|
||||
.dma_mask = DMA_BIT_MASK(32),
|
||||
};
|
||||
|
||||
return platform_device_register_full(&pdevinfo);
|
||||
}
|
||||
|
||||
struct nmk_gpio_platform_data;
|
||||
|
||||
void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
|
||||
int irq, struct nmk_gpio_platform_data *pdata);
|
||||
|
||||
static inline void
|
||||
dbx500_add_pinctrl(struct device *parent, const char *name,
|
||||
resource_size_t base)
|
||||
{
|
||||
struct resource res[] = {
|
||||
DEFINE_RES_MEM(base, SZ_8K),
|
||||
};
|
||||
struct platform_device_info pdevinfo = {
|
||||
.parent = parent,
|
||||
.name = name,
|
||||
.id = -1,
|
||||
.res = res,
|
||||
.num_res = ARRAY_SIZE(res),
|
||||
};
|
||||
|
||||
platform_device_register_full(&pdevinfo);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -9,10 +9,8 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/amba/bus.h>
|
||||
#include <linux/amba/pl022.h>
|
||||
#include <linux/platform_data/dma-ste-dma40.h>
|
||||
#include <linux/mfd/dbx500-prcmu.h>
|
||||
|
||||
#include "setup.h"
|
||||
|
|
@ -20,62 +18,6 @@
|
|||
|
||||
#include "db8500-regs.h"
|
||||
#include "devices-db8500.h"
|
||||
#include "ste-dma40-db8500.h"
|
||||
|
||||
static struct resource dma40_resources[] = {
|
||||
[0] = {
|
||||
.start = U8500_DMA_BASE,
|
||||
.end = U8500_DMA_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
.name = "base",
|
||||
},
|
||||
[1] = {
|
||||
.start = U8500_DMA_LCPA_BASE,
|
||||
.end = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
.name = "lcpa",
|
||||
},
|
||||
[2] = {
|
||||
.start = IRQ_DB8500_DMA,
|
||||
.end = IRQ_DB8500_DMA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
struct stedma40_platform_data dma40_plat_data = {
|
||||
.disabled_channels = {-1},
|
||||
};
|
||||
|
||||
struct platform_device u8500_dma40_device = {
|
||||
.dev = {
|
||||
.platform_data = &dma40_plat_data,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.name = "dma40",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(dma40_resources),
|
||||
.resource = dma40_resources
|
||||
};
|
||||
|
||||
struct resource keypad_resources[] = {
|
||||
[0] = {
|
||||
.start = U8500_SKE_BASE,
|
||||
.end = U8500_SKE_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_DB8500_KB,
|
||||
.end = IRQ_DB8500_KB,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device u8500_ske_keypad_device = {
|
||||
.name = "nmk-ske-keypad",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(keypad_resources),
|
||||
.resource = keypad_resources,
|
||||
};
|
||||
|
||||
struct prcmu_pdata db8500_prcmu_pdata = {
|
||||
.ab_platdata = &ab8500_platdata,
|
||||
|
|
@ -84,39 +26,3 @@ struct prcmu_pdata db8500_prcmu_pdata = {
|
|||
.version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
|
||||
.legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
|
||||
};
|
||||
|
||||
static struct resource db8500_prcmu_res[] = {
|
||||
{
|
||||
.name = "prcmu",
|
||||
.start = U8500_PRCMU_BASE,
|
||||
.end = U8500_PRCMU_BASE + SZ_8K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "prcmu-tcdm",
|
||||
.start = U8500_PRCMU_TCDM_BASE,
|
||||
.end = U8500_PRCMU_TCDM_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "irq",
|
||||
.start = IRQ_DB8500_PRCMU1,
|
||||
.end = IRQ_DB8500_PRCMU1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.name = "prcmu-tcpm",
|
||||
.start = U8500_PRCMU_TCPM_BASE,
|
||||
.end = U8500_PRCMU_TCPM_BASE + SZ_32K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device db8500_prcmu_device = {
|
||||
.name = "db8500-prcmu",
|
||||
.resource = db8500_prcmu_res,
|
||||
.num_resources = ARRAY_SIZE(db8500_prcmu_res),
|
||||
.dev = {
|
||||
.platform_data = &db8500_prcmu_pdata,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,122 +8,12 @@
|
|||
#ifndef __DEVICES_DB8500_H
|
||||
#define __DEVICES_DB8500_H
|
||||
|
||||
#include <linux/platform_data/usb-musb-ux500.h>
|
||||
#include "irqs.h"
|
||||
#include "db8500-regs.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
struct ske_keypad_platform_data;
|
||||
struct pl022_ssp_controller;
|
||||
struct platform_device;
|
||||
|
||||
extern struct ab8500_platform_data ab8500_platdata;
|
||||
extern struct prcmu_pdata db8500_prcmu_pdata;
|
||||
extern struct platform_device db8500_prcmu_device;
|
||||
|
||||
static inline struct platform_device *
|
||||
db8500_add_ske_keypad(struct device *parent,
|
||||
struct ske_keypad_platform_data *pdata,
|
||||
size_t size)
|
||||
{
|
||||
struct resource resources[] = {
|
||||
DEFINE_RES_MEM(U8500_SKE_BASE, SZ_4K),
|
||||
DEFINE_RES_IRQ(IRQ_DB8500_KB),
|
||||
};
|
||||
|
||||
return platform_device_register_resndata(parent, "nmk-ske-keypad", -1,
|
||||
resources, 2, pdata, size);
|
||||
}
|
||||
|
||||
static inline struct amba_device *
|
||||
db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
|
||||
int irq, struct pl022_ssp_controller *pdata)
|
||||
{
|
||||
return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
|
||||
}
|
||||
|
||||
#define db8500_add_i2c0(parent, pdata) \
|
||||
dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
|
||||
#define db8500_add_i2c1(parent, pdata) \
|
||||
dbx500_add_i2c(parent, 1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata)
|
||||
#define db8500_add_i2c2(parent, pdata) \
|
||||
dbx500_add_i2c(parent, 2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata)
|
||||
#define db8500_add_i2c3(parent, pdata) \
|
||||
dbx500_add_i2c(parent, 3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata)
|
||||
#define db8500_add_i2c4(parent, pdata) \
|
||||
dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
|
||||
|
||||
#define db8500_add_msp0_spi(parent, pdata) \
|
||||
dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
|
||||
IRQ_DB8500_MSP0, pdata)
|
||||
#define db8500_add_msp1_spi(parent, pdata) \
|
||||
dbx500_add_msp_spi(parent, "msp1", U8500_MSP1_BASE, \
|
||||
IRQ_DB8500_MSP1, pdata)
|
||||
#define db8500_add_msp2_spi(parent, pdata) \
|
||||
dbx500_add_msp_spi(parent, "msp2", U8500_MSP2_BASE, \
|
||||
IRQ_DB8500_MSP2, pdata)
|
||||
#define db8500_add_msp3_spi(parent, pdata) \
|
||||
dbx500_add_msp_spi(parent, "msp3", U8500_MSP3_BASE, \
|
||||
IRQ_DB8500_MSP1, pdata)
|
||||
|
||||
#define db8500_add_rtc(parent) \
|
||||
dbx500_add_rtc(parent, U8500_RTC_BASE, IRQ_DB8500_RTC);
|
||||
|
||||
#define db8500_add_usb(parent, rx_cfg, tx_cfg) \
|
||||
ux500_add_usb(parent, U8500_USBOTG_BASE, \
|
||||
IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
|
||||
|
||||
#define db8500_add_sdi0(parent, pdata, pid) \
|
||||
dbx500_add_sdi(parent, "sdi0", U8500_SDI0_BASE, \
|
||||
IRQ_DB8500_SDMMC0, pdata, pid)
|
||||
#define db8500_add_sdi1(parent, pdata, pid) \
|
||||
dbx500_add_sdi(parent, "sdi1", U8500_SDI1_BASE, \
|
||||
IRQ_DB8500_SDMMC1, pdata, pid)
|
||||
#define db8500_add_sdi2(parent, pdata, pid) \
|
||||
dbx500_add_sdi(parent, "sdi2", U8500_SDI2_BASE, \
|
||||
IRQ_DB8500_SDMMC2, pdata, pid)
|
||||
#define db8500_add_sdi3(parent, pdata, pid) \
|
||||
dbx500_add_sdi(parent, "sdi3", U8500_SDI3_BASE, \
|
||||
IRQ_DB8500_SDMMC3, pdata, pid)
|
||||
#define db8500_add_sdi4(parent, pdata, pid) \
|
||||
dbx500_add_sdi(parent, "sdi4", U8500_SDI4_BASE, \
|
||||
IRQ_DB8500_SDMMC4, pdata, pid)
|
||||
#define db8500_add_sdi5(parent, pdata, pid) \
|
||||
dbx500_add_sdi(parent, "sdi5", U8500_SDI5_BASE, \
|
||||
IRQ_DB8500_SDMMC5, pdata, pid)
|
||||
|
||||
#define db8500_add_ssp0(parent, pdata) \
|
||||
db8500_add_ssp(parent, "ssp0", U8500_SSP0_BASE, \
|
||||
IRQ_DB8500_SSP0, pdata)
|
||||
#define db8500_add_ssp1(parent, pdata) \
|
||||
db8500_add_ssp(parent, "ssp1", U8500_SSP1_BASE, \
|
||||
IRQ_DB8500_SSP1, pdata)
|
||||
|
||||
#define db8500_add_spi0(parent, pdata) \
|
||||
dbx500_add_spi(parent, "spi0", U8500_SPI0_BASE, \
|
||||
IRQ_DB8500_SPI0, pdata, 0)
|
||||
#define db8500_add_spi1(parent, pdata) \
|
||||
dbx500_add_spi(parent, "spi1", U8500_SPI1_BASE, \
|
||||
IRQ_DB8500_SPI1, pdata, 0)
|
||||
#define db8500_add_spi2(parent, pdata) \
|
||||
dbx500_add_spi(parent, "spi2", U8500_SPI2_BASE, \
|
||||
IRQ_DB8500_SPI2, pdata, 0)
|
||||
#define db8500_add_spi3(parent, pdata) \
|
||||
dbx500_add_spi(parent, "spi3", U8500_SPI3_BASE, \
|
||||
IRQ_DB8500_SPI3, pdata, 0)
|
||||
|
||||
#define db8500_add_uart0(parent, pdata) \
|
||||
dbx500_add_uart(parent, "uart0", U8500_UART0_BASE, \
|
||||
IRQ_DB8500_UART0, pdata)
|
||||
#define db8500_add_uart1(parent, pdata) \
|
||||
dbx500_add_uart(parent, "uart1", U8500_UART1_BASE, \
|
||||
IRQ_DB8500_UART1, pdata)
|
||||
#define db8500_add_uart2(parent, pdata) \
|
||||
dbx500_add_uart(parent, "uart2", U8500_UART2_BASE, \
|
||||
IRQ_DB8500_UART2, pdata)
|
||||
|
||||
#define db8500_add_cryp1(parent, pdata) \
|
||||
dbx500_add_cryp1(parent, -1, U8500_CRYP1_BASE, IRQ_DB8500_CRYP1, pdata)
|
||||
#define db8500_add_hash1(parent, pdata) \
|
||||
dbx500_add_hash1(parent, -1, U8500_HASH1_BASE, pdata)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -10,14 +10,6 @@
|
|||
struct platform_device;
|
||||
struct amba_device;
|
||||
|
||||
extern struct platform_device u8500_gpio_devs[];
|
||||
|
||||
extern struct amba_device ux500_pl031_device;
|
||||
|
||||
extern struct platform_device ux500_hash1_device;
|
||||
extern struct platform_device ux500_cryp1_device;
|
||||
|
||||
extern struct platform_device u8500_dma40_device;
|
||||
extern struct platform_device ux500_ske_keypad_device;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@ extern void __init u8500_map_io(void);
|
|||
extern struct device * __init u8500_init_devices(void);
|
||||
|
||||
extern void __init ux500_init_irq(void);
|
||||
extern void __init ux500_init_late(void);
|
||||
|
||||
extern struct device *ux500_soc_device_init(const char *soc_id);
|
||||
|
||||
|
|
|
|||
|
|
@ -97,8 +97,8 @@ void __init ux500_timer_init(void)
|
|||
* sched_clock with higher rating then MTU since is always-on.
|
||||
*
|
||||
*/
|
||||
|
||||
nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
|
||||
if (!of_have_populated_dt())
|
||||
nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
|
||||
clksrc_dbx500_prcmu_init(prcmu_timer_base);
|
||||
ux500_twd_init();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,135 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2011
|
||||
*
|
||||
* Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/usb/musb.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_data/usb-musb-ux500.h>
|
||||
#include <linux/platform_data/dma-ste-dma40.h>
|
||||
|
||||
#include "db8500-regs.h"
|
||||
|
||||
#define MUSB_DMA40_RX_CH { \
|
||||
.mode = STEDMA40_MODE_LOGICAL, \
|
||||
.dir = DMA_DEV_TO_MEM, \
|
||||
}
|
||||
|
||||
#define MUSB_DMA40_TX_CH { \
|
||||
.mode = STEDMA40_MODE_LOGICAL, \
|
||||
.dir = DMA_MEM_TO_DEV, \
|
||||
}
|
||||
|
||||
static struct stedma40_chan_cfg musb_dma_rx_ch[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS]
|
||||
= {
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH,
|
||||
MUSB_DMA40_RX_CH
|
||||
};
|
||||
|
||||
static struct stedma40_chan_cfg musb_dma_tx_ch[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS]
|
||||
= {
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
MUSB_DMA40_TX_CH,
|
||||
};
|
||||
|
||||
static void *ux500_dma_rx_param_array[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS] = {
|
||||
&musb_dma_rx_ch[0],
|
||||
&musb_dma_rx_ch[1],
|
||||
&musb_dma_rx_ch[2],
|
||||
&musb_dma_rx_ch[3],
|
||||
&musb_dma_rx_ch[4],
|
||||
&musb_dma_rx_ch[5],
|
||||
&musb_dma_rx_ch[6],
|
||||
&musb_dma_rx_ch[7]
|
||||
};
|
||||
|
||||
static void *ux500_dma_tx_param_array[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS] = {
|
||||
&musb_dma_tx_ch[0],
|
||||
&musb_dma_tx_ch[1],
|
||||
&musb_dma_tx_ch[2],
|
||||
&musb_dma_tx_ch[3],
|
||||
&musb_dma_tx_ch[4],
|
||||
&musb_dma_tx_ch[5],
|
||||
&musb_dma_tx_ch[6],
|
||||
&musb_dma_tx_ch[7]
|
||||
};
|
||||
|
||||
static struct ux500_musb_board_data musb_board_data = {
|
||||
.dma_rx_param_array = ux500_dma_rx_param_array,
|
||||
.dma_tx_param_array = ux500_dma_tx_param_array,
|
||||
.dma_filter = stedma40_filter,
|
||||
};
|
||||
|
||||
static struct musb_hdrc_platform_data musb_platform_data = {
|
||||
.mode = MUSB_OTG,
|
||||
.board_data = &musb_board_data,
|
||||
};
|
||||
|
||||
static struct resource usb_resources[] = {
|
||||
[0] = {
|
||||
.name = "usb-mem",
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
|
||||
[1] = {
|
||||
.name = "mc", /* hard-coded in musb */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device ux500_musb_device = {
|
||||
.name = "musb-ux500",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &musb_platform_data,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(usb_resources),
|
||||
.resource = usb_resources,
|
||||
};
|
||||
|
||||
static inline void ux500_usb_dma_update_rx_ch_config(int *dev_type)
|
||||
{
|
||||
u32 idx;
|
||||
|
||||
for (idx = 0; idx < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; idx++)
|
||||
musb_dma_rx_ch[idx].dev_type = dev_type[idx];
|
||||
}
|
||||
|
||||
static inline void ux500_usb_dma_update_tx_ch_config(int *dev_type)
|
||||
{
|
||||
u32 idx;
|
||||
|
||||
for (idx = 0; idx < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; idx++)
|
||||
musb_dma_tx_ch[idx].dev_type = dev_type[idx];
|
||||
}
|
||||
|
||||
void ux500_add_usb(struct device *parent, resource_size_t base, int irq,
|
||||
int *dma_rx_cfg, int *dma_tx_cfg)
|
||||
{
|
||||
ux500_musb_device.resource[0].start = base;
|
||||
ux500_musb_device.resource[0].end = base + SZ_64K - 1;
|
||||
ux500_musb_device.resource[1].start = irq;
|
||||
ux500_musb_device.resource[1].end = irq;
|
||||
|
||||
ux500_usb_dma_update_rx_ch_config(dma_rx_cfg);
|
||||
ux500_usb_dma_update_tx_ch_config(dma_tx_cfg);
|
||||
|
||||
ux500_musb_device.dev.parent = parent;
|
||||
|
||||
platform_device_register(&ux500_musb_device);
|
||||
}
|
||||
|
|
@ -8,6 +8,7 @@ obj-y += clk-prcmu.o
|
|||
obj-y += clk-sysctrl.o
|
||||
|
||||
# Clock definitions
|
||||
obj-y += u8500_of_clk.o
|
||||
obj-y += u8500_clk.o
|
||||
obj-y += u9540_clk.o
|
||||
obj-y += u8540_clk.o
|
||||
|
|
|
|||
559
drivers/clk/ux500/u8500_of_clk.c
Normal file
559
drivers/clk/ux500/u8500_of_clk.c
Normal file
|
|
@ -0,0 +1,559 @@
|
|||
/*
|
||||
* Clock definitions for u8500 platform.
|
||||
*
|
||||
* Copyright (C) 2012 ST-Ericsson SA
|
||||
* Author: Ulf Hansson <ulf.hansson@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#include <linux/of.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clkdev.h>
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/mfd/dbx500-prcmu.h>
|
||||
#include <linux/platform_data/clk-ux500.h>
|
||||
#include "clk.h"
|
||||
|
||||
#define PRCC_NUM_PERIPH_CLUSTERS 6
|
||||
#define PRCC_PERIPHS_PER_CLUSTER 32
|
||||
|
||||
static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
|
||||
static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
|
||||
static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
|
||||
|
||||
#define PRCC_SHOW(clk, base, bit) \
|
||||
clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
|
||||
#define PRCC_PCLK_STORE(clk, base, bit) \
|
||||
prcc_pclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
|
||||
#define PRCC_KCLK_STORE(clk, base, bit) \
|
||||
prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
|
||||
|
||||
struct clk *ux500_twocell_get(struct of_phandle_args *clkspec, void *data)
|
||||
{
|
||||
struct clk **clk_data = data;
|
||||
unsigned int base, bit;
|
||||
|
||||
if (clkspec->args_count != 2)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
base = clkspec->args[0];
|
||||
bit = clkspec->args[1];
|
||||
|
||||
if (base != 1 && base != 2 && base != 3 && base != 5 && base != 6) {
|
||||
pr_err("%s: invalid PRCC base %d\n", __func__, base);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
return PRCC_SHOW(clk_data, base, bit);
|
||||
}
|
||||
|
||||
static const struct of_device_id u8500_clk_of_match[] = {
|
||||
{ .compatible = "stericsson,u8500-clks", },
|
||||
{ },
|
||||
};
|
||||
|
||||
void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
|
||||
u32 clkrst5_base, u32 clkrst6_base)
|
||||
{
|
||||
struct prcmu_fw_version *fw_version;
|
||||
struct device_node *np = NULL;
|
||||
struct device_node *child = NULL;
|
||||
const char *sgaclk_parent = NULL;
|
||||
struct clk *clk, *rtc_clk, *twd_clk;
|
||||
|
||||
if (of_have_populated_dt())
|
||||
np = of_find_matching_node(NULL, u8500_clk_of_match);
|
||||
if (!np) {
|
||||
pr_err("Either DT or U8500 Clock node not found\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Clock sources */
|
||||
clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
|
||||
CLK_IS_ROOT|CLK_IGNORE_UNUSED);
|
||||
prcmu_clk[PRCMU_PLLSOC0] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("soc1_pll", NULL, PRCMU_PLLSOC1,
|
||||
CLK_IS_ROOT|CLK_IGNORE_UNUSED);
|
||||
prcmu_clk[PRCMU_PLLSOC1] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("ddr_pll", NULL, PRCMU_PLLDDR,
|
||||
CLK_IS_ROOT|CLK_IGNORE_UNUSED);
|
||||
prcmu_clk[PRCMU_PLLDDR] = clk;
|
||||
|
||||
/* FIXME: Add sys, ulp and int clocks here. */
|
||||
|
||||
rtc_clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL",
|
||||
CLK_IS_ROOT|CLK_IGNORE_UNUSED,
|
||||
32768);
|
||||
|
||||
/* PRCMU clocks */
|
||||
fw_version = prcmu_get_fw_version();
|
||||
if (fw_version != NULL) {
|
||||
switch (fw_version->project) {
|
||||
case PRCMU_FW_PROJECT_U8500_C2:
|
||||
case PRCMU_FW_PROJECT_U8520:
|
||||
case PRCMU_FW_PROJECT_U8420:
|
||||
sgaclk_parent = "soc0_pll";
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (sgaclk_parent)
|
||||
clk = clk_reg_prcmu_gate("sgclk", sgaclk_parent,
|
||||
PRCMU_SGACLK, 0);
|
||||
else
|
||||
clk = clk_reg_prcmu_gate("sgclk", NULL,
|
||||
PRCMU_SGACLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_SGACLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_UARTCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("msp02clk", NULL, PRCMU_MSP02CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_MSP02CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_MSP1CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_I2CCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_SLIMCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_PER1CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_PER2CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_PER3CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_PER5CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_PER6CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_PER7CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("lcdclk", NULL, PRCMU_LCDCLK, 0,
|
||||
CLK_IS_ROOT|CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_LCDCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_BMLCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("hsitxclk", NULL, PRCMU_HSITXCLK, 0,
|
||||
CLK_IS_ROOT|CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_HSITXCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("hsirxclk", NULL, PRCMU_HSIRXCLK, 0,
|
||||
CLK_IS_ROOT|CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_HSIRXCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("hdmiclk", NULL, PRCMU_HDMICLK, 0,
|
||||
CLK_IS_ROOT|CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_HDMICLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_APEATCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("apetraceclk", NULL, PRCMU_APETRACECLK,
|
||||
CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_APETRACECLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_MCDECLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK,
|
||||
CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_IPI2CCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK,
|
||||
CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_DSIALTCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_DMACLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_B2R2CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("tvclk", NULL, PRCMU_TVCLK, 0,
|
||||
CLK_IS_ROOT|CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_TVCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_SSPCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_RNGCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_UICCCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT);
|
||||
prcmu_clk[PRCMU_TIMCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL, PRCMU_SDMMCCLK,
|
||||
100000000,
|
||||
CLK_IS_ROOT|CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_SDMMCCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("dsi_pll", "hdmiclk",
|
||||
PRCMU_PLLDSI, 0, CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_PLLDSI] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("dsi0clk", "dsi_pll",
|
||||
PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_DSI0CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("dsi1clk", "dsi_pll",
|
||||
PRCMU_DSI1CLK, 0, CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_DSI1CLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("dsi0escclk", "tvclk",
|
||||
PRCMU_DSI0ESCCLK, 0, CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_DSI0ESCCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("dsi1escclk", "tvclk",
|
||||
PRCMU_DSI1ESCCLK, 0, CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_DSI1ESCCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable("dsi2escclk", "tvclk",
|
||||
PRCMU_DSI2ESCCLK, 0, CLK_SET_RATE_GATE);
|
||||
prcmu_clk[PRCMU_DSI2ESCCLK] = clk;
|
||||
|
||||
clk = clk_reg_prcmu_scalable_rate("armss", NULL,
|
||||
PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
|
||||
prcmu_clk[PRCMU_ARMSS] = clk;
|
||||
|
||||
twd_clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
|
||||
CLK_IGNORE_UNUSED, 1, 2);
|
||||
|
||||
/*
|
||||
* FIXME: Add special handled PRCMU clocks here:
|
||||
* 1. clkout0yuv, use PRCMU as parent + need regulator + pinctrl.
|
||||
* 2. ab9540_clkout1yuv, see clkout0yuv
|
||||
*/
|
||||
|
||||
/* PRCC P-clocks */
|
||||
clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base,
|
||||
BIT(0), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 0);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base,
|
||||
BIT(1), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 1);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base,
|
||||
BIT(2), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 2);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base,
|
||||
BIT(3), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 3);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base,
|
||||
BIT(4), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 4);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base,
|
||||
BIT(5), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 5);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base,
|
||||
BIT(6), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 6);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base,
|
||||
BIT(7), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 7);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base,
|
||||
BIT(8), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 8);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base,
|
||||
BIT(9), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 9);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base,
|
||||
BIT(10), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 10);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base,
|
||||
BIT(11), 0);
|
||||
PRCC_PCLK_STORE(clk, 1, 11);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", clkrst2_base,
|
||||
BIT(0), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 0);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", clkrst2_base,
|
||||
BIT(1), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 1);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", clkrst2_base,
|
||||
BIT(2), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 2);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", clkrst2_base,
|
||||
BIT(3), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 3);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", clkrst2_base,
|
||||
BIT(4), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 4);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", clkrst2_base,
|
||||
BIT(5), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 5);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", clkrst2_base,
|
||||
BIT(6), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 6);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", clkrst2_base,
|
||||
BIT(7), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 7);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", clkrst2_base,
|
||||
BIT(8), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 8);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", clkrst2_base,
|
||||
BIT(9), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 9);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base,
|
||||
BIT(10), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 10);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base,
|
||||
BIT(11), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 1);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base,
|
||||
BIT(12), 0);
|
||||
PRCC_PCLK_STORE(clk, 2, 12);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base,
|
||||
BIT(0), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 0);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base,
|
||||
BIT(1), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 1);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", clkrst3_base,
|
||||
BIT(2), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 2);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", clkrst3_base,
|
||||
BIT(3), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 3);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", clkrst3_base,
|
||||
BIT(4), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 4);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", clkrst3_base,
|
||||
BIT(5), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 5);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", clkrst3_base,
|
||||
BIT(6), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 6);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", clkrst3_base,
|
||||
BIT(7), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 7);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", clkrst3_base,
|
||||
BIT(8), 0);
|
||||
PRCC_PCLK_STORE(clk, 3, 8);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", clkrst5_base,
|
||||
BIT(0), 0);
|
||||
PRCC_PCLK_STORE(clk, 5, 0);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", clkrst5_base,
|
||||
BIT(1), 0);
|
||||
PRCC_PCLK_STORE(clk, 5, 1);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", clkrst6_base,
|
||||
BIT(0), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 0);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", clkrst6_base,
|
||||
BIT(1), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 1);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", clkrst6_base,
|
||||
BIT(2), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 2);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", clkrst6_base,
|
||||
BIT(3), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 3);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", clkrst6_base,
|
||||
BIT(4), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 4);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", clkrst6_base,
|
||||
BIT(5), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 5);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", clkrst6_base,
|
||||
BIT(6), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 6);
|
||||
|
||||
clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", clkrst6_base,
|
||||
BIT(7), 0);
|
||||
PRCC_PCLK_STORE(clk, 6, 7);
|
||||
|
||||
/* PRCC K-clocks
|
||||
*
|
||||
* FIXME: Some drivers requires PERPIH[n| to be automatically enabled
|
||||
* by enabling just the K-clock, even if it is not a valid parent to
|
||||
* the K-clock. Until drivers get fixed we might need some kind of
|
||||
* "parent muxed join".
|
||||
*/
|
||||
|
||||
/* Periph1 */
|
||||
clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
|
||||
clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 0);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
|
||||
clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 1);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",
|
||||
clkrst1_base, BIT(2), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 2);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",
|
||||
clkrst1_base, BIT(3), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 3);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",
|
||||
clkrst1_base, BIT(4), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 4);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",
|
||||
clkrst1_base, BIT(5), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 5);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",
|
||||
clkrst1_base, BIT(6), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 6);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
|
||||
clkrst1_base, BIT(8), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 8);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
|
||||
clkrst1_base, BIT(9), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 9);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",
|
||||
clkrst1_base, BIT(10), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 1, 10);
|
||||
|
||||
/* Periph2 */
|
||||
clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",
|
||||
clkrst2_base, BIT(0), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 2, 0);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",
|
||||
clkrst2_base, BIT(2), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 2, 2);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",
|
||||
clkrst2_base, BIT(3), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 2, 3);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",
|
||||
clkrst2_base, BIT(4), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 2, 4);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk",
|
||||
clkrst2_base, BIT(5), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 2, 5);
|
||||
|
||||
/* Note that rate is received from parent. */
|
||||
clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk",
|
||||
clkrst2_base, BIT(6),
|
||||
CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
|
||||
PRCC_KCLK_STORE(clk, 2, 6);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk",
|
||||
clkrst2_base, BIT(7),
|
||||
CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
|
||||
PRCC_KCLK_STORE(clk, 2, 7);
|
||||
|
||||
/* Periph3 */
|
||||
clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",
|
||||
clkrst3_base, BIT(1), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 1);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk",
|
||||
clkrst3_base, BIT(2), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 2);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk",
|
||||
clkrst3_base, BIT(3), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 3);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk",
|
||||
clkrst3_base, BIT(4), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 4);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k",
|
||||
clkrst3_base, BIT(5), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 5);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk",
|
||||
clkrst3_base, BIT(6), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 6);
|
||||
|
||||
clk = clk_reg_prcc_kclk("p3_sdi5_kclk", "sdmmcclk",
|
||||
clkrst3_base, BIT(7), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 3, 7);
|
||||
|
||||
/* Periph6 */
|
||||
clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk",
|
||||
clkrst6_base, BIT(0), CLK_SET_RATE_GATE);
|
||||
PRCC_KCLK_STORE(clk, 6, 0);
|
||||
|
||||
for_each_child_of_node(np, child) {
|
||||
static struct clk_onecell_data clk_data;
|
||||
|
||||
if (!of_node_cmp(child->name, "prcmu-clock")) {
|
||||
clk_data.clks = prcmu_clk;
|
||||
clk_data.clk_num = ARRAY_SIZE(prcmu_clk);
|
||||
of_clk_add_provider(child, of_clk_src_onecell_get, &clk_data);
|
||||
}
|
||||
if (!of_node_cmp(child->name, "prcc-periph-clock"))
|
||||
of_clk_add_provider(child, ux500_twocell_get, prcc_pclk);
|
||||
|
||||
if (!of_node_cmp(child->name, "prcc-kernel-clock"))
|
||||
of_clk_add_provider(child, ux500_twocell_get, prcc_kclk);
|
||||
|
||||
if (!of_node_cmp(child->name, "rtc32k-clock"))
|
||||
of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk);
|
||||
|
||||
if (!of_node_cmp(child->name, "smp-twd-clock"))
|
||||
of_clk_add_provider(child, of_clk_src_simple_get, twd_clk);
|
||||
}
|
||||
}
|
||||
|
|
@ -83,7 +83,7 @@ void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
|
|||
clk_register_clkdev(clk, NULL, "lcd");
|
||||
clk_register_clkdev(clk, "lcd", "mcde");
|
||||
|
||||
clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BML8580CLK,
|
||||
clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK,
|
||||
CLK_IS_ROOT);
|
||||
clk_register_clkdev(clk, NULL, "bml");
|
||||
|
||||
|
|
|
|||
|
|
@ -480,7 +480,6 @@ static struct clk_mgt clk_mgt[PRCMU_NUM_REG_CLOCKS] = {
|
|||
CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true),
|
||||
CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true),
|
||||
CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true),
|
||||
CLK_MGT_ENTRY(BML8580CLK, PLL_DIV, true),
|
||||
CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true),
|
||||
CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true),
|
||||
CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true),
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@
|
|||
#define PRCM_PER7CLK_MGT (0x040)
|
||||
#define PRCM_LCDCLK_MGT (0x044)
|
||||
#define PRCM_BMLCLK_MGT (0x04C)
|
||||
#define PRCM_BML8580CLK_MGT (0x108)
|
||||
#define PRCM_HSITXCLK_MGT (0x050)
|
||||
#define PRCM_HSIRXCLK_MGT (0x054)
|
||||
#define PRCM_HDMICLK_MGT (0x058)
|
||||
|
|
|
|||
|
|
@ -259,7 +259,7 @@ static int ux500_probe(struct platform_device *pdev)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
clk = clk_get(&pdev->dev, "usb");
|
||||
clk = clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(&pdev->dev, "failed to get clock\n");
|
||||
ret = PTR_ERR(clk);
|
||||
|
|
|
|||
83
include/dt-bindings/mfd/dbx500-prcmu.h
Normal file
83
include/dt-bindings/mfd/dbx500-prcmu.h
Normal file
|
|
@ -0,0 +1,83 @@
|
|||
/*
|
||||
* This header provides constants for the PRCMU bindings.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_MFD_PRCMU_H
|
||||
#define _DT_BINDINGS_MFD_PRCMU_H
|
||||
|
||||
/*
|
||||
* Clock identifiers.
|
||||
*/
|
||||
#define ARMCLK 0
|
||||
#define PRCMU_ACLK 1
|
||||
#define PRCMU_SVAMMCSPCLK 2
|
||||
#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
|
||||
#define PRCMU_SIACLK 3
|
||||
#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
|
||||
#define PRCMU_SGACLK 4
|
||||
#define PRCMU_UARTCLK 5
|
||||
#define PRCMU_MSP02CLK 6
|
||||
#define PRCMU_MSP1CLK 7
|
||||
#define PRCMU_I2CCLK 8
|
||||
#define PRCMU_SDMMCCLK 9
|
||||
#define PRCMU_SLIMCLK 10
|
||||
#define PRCMU_CAMCLK 10 /* DBx540 only. */
|
||||
#define PRCMU_PER1CLK 11
|
||||
#define PRCMU_PER2CLK 12
|
||||
#define PRCMU_PER3CLK 13
|
||||
#define PRCMU_PER5CLK 14
|
||||
#define PRCMU_PER6CLK 15
|
||||
#define PRCMU_PER7CLK 16
|
||||
#define PRCMU_LCDCLK 17
|
||||
#define PRCMU_BMLCLK 18
|
||||
#define PRCMU_HSITXCLK 19
|
||||
#define PRCMU_HSIRXCLK 20
|
||||
#define PRCMU_HDMICLK 21
|
||||
#define PRCMU_APEATCLK 22
|
||||
#define PRCMU_APETRACECLK 23
|
||||
#define PRCMU_MCDECLK 24
|
||||
#define PRCMU_IPI2CCLK 25
|
||||
#define PRCMU_DSIALTCLK 26
|
||||
#define PRCMU_DMACLK 27
|
||||
#define PRCMU_B2R2CLK 28
|
||||
#define PRCMU_TVCLK 29
|
||||
#define SPARE_UNIPROCLK 30
|
||||
#define PRCMU_SSPCLK 31
|
||||
#define PRCMU_RNGCLK 32
|
||||
#define PRCMU_UICCCLK 33
|
||||
#define PRCMU_G1CLK 34 /* DBx540 only. */
|
||||
#define PRCMU_HVACLK 35 /* DBx540 only. */
|
||||
#define PRCMU_SPARE1CLK 36
|
||||
#define PRCMU_SPARE2CLK 37
|
||||
|
||||
#define PRCMU_NUM_REG_CLOCKS 38
|
||||
|
||||
#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
|
||||
#define PRCMU_SYSCLK 39
|
||||
#define PRCMU_CDCLK 40
|
||||
#define PRCMU_TIMCLK 41
|
||||
#define PRCMU_PLLSOC0 42
|
||||
#define PRCMU_PLLSOC1 43
|
||||
#define PRCMU_ARMSS 44
|
||||
#define PRCMU_PLLDDR 45
|
||||
|
||||
/* DSI Clocks */
|
||||
#define PRCMU_PLLDSI 46
|
||||
#define PRCMU_DSI0CLK 47
|
||||
#define PRCMU_DSI1CLK 48
|
||||
#define PRCMU_DSI0ESCCLK 49
|
||||
#define PRCMU_DSI1ESCCLK 50
|
||||
#define PRCMU_DSI2ESCCLK 51
|
||||
|
||||
/* LCD DSI PLL - Ux540 only */
|
||||
#define PRCMU_PLLDSI_LCD 52
|
||||
#define PRCMU_DSI0CLK_LCD 53
|
||||
#define PRCMU_DSI1CLK_LCD 54
|
||||
#define PRCMU_DSI0ESCCLK_LCD 55
|
||||
#define PRCMU_DSI1ESCCLK_LCD 56
|
||||
#define PRCMU_DSI2ESCCLK_LCD 57
|
||||
|
||||
#define PRCMU_NUM_CLKS 58
|
||||
|
||||
#endif
|
||||
|
|
@ -12,6 +12,8 @@
|
|||
#include <linux/notifier.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
|
||||
|
||||
/* Offset for the firmware version within the TCPM */
|
||||
#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
|
||||
#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
|
||||
|
|
@ -94,74 +96,6 @@ enum prcmu_wakeup_index {
|
|||
#define PRCMU_CLKSRC_ARMCLKFIX 0x46
|
||||
#define PRCMU_CLKSRC_HDMICLK 0x47
|
||||
|
||||
/*
|
||||
* Clock identifiers.
|
||||
*/
|
||||
enum prcmu_clock {
|
||||
PRCMU_SGACLK,
|
||||
PRCMU_UARTCLK,
|
||||
PRCMU_MSP02CLK,
|
||||
PRCMU_MSP1CLK,
|
||||
PRCMU_I2CCLK,
|
||||
PRCMU_SDMMCCLK,
|
||||
PRCMU_SPARE1CLK,
|
||||
PRCMU_SLIMCLK,
|
||||
PRCMU_PER1CLK,
|
||||
PRCMU_PER2CLK,
|
||||
PRCMU_PER3CLK,
|
||||
PRCMU_PER5CLK,
|
||||
PRCMU_PER6CLK,
|
||||
PRCMU_PER7CLK,
|
||||
PRCMU_LCDCLK,
|
||||
PRCMU_BMLCLK,
|
||||
PRCMU_HSITXCLK,
|
||||
PRCMU_HSIRXCLK,
|
||||
PRCMU_HDMICLK,
|
||||
PRCMU_APEATCLK,
|
||||
PRCMU_APETRACECLK,
|
||||
PRCMU_MCDECLK,
|
||||
PRCMU_IPI2CCLK,
|
||||
PRCMU_DSIALTCLK,
|
||||
PRCMU_DMACLK,
|
||||
PRCMU_B2R2CLK,
|
||||
PRCMU_TVCLK,
|
||||
PRCMU_SSPCLK,
|
||||
PRCMU_RNGCLK,
|
||||
PRCMU_UICCCLK,
|
||||
PRCMU_PWMCLK,
|
||||
PRCMU_IRDACLK,
|
||||
PRCMU_IRRCCLK,
|
||||
PRCMU_SIACLK,
|
||||
PRCMU_SVACLK,
|
||||
PRCMU_ACLK,
|
||||
PRCMU_HVACLK, /* Ux540 only */
|
||||
PRCMU_G1CLK, /* Ux540 only */
|
||||
PRCMU_SDMMCHCLK,
|
||||
PRCMU_CAMCLK,
|
||||
PRCMU_BML8580CLK,
|
||||
PRCMU_NUM_REG_CLOCKS,
|
||||
PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS,
|
||||
PRCMU_CDCLK,
|
||||
PRCMU_TIMCLK,
|
||||
PRCMU_PLLSOC0,
|
||||
PRCMU_PLLSOC1,
|
||||
PRCMU_ARMSS,
|
||||
PRCMU_PLLDDR,
|
||||
PRCMU_PLLDSI,
|
||||
PRCMU_DSI0CLK,
|
||||
PRCMU_DSI1CLK,
|
||||
PRCMU_DSI0ESCCLK,
|
||||
PRCMU_DSI1ESCCLK,
|
||||
PRCMU_DSI2ESCCLK,
|
||||
/* LCD DSI PLL - Ux540 only */
|
||||
PRCMU_PLLDSI_LCD,
|
||||
PRCMU_DSI0CLK_LCD,
|
||||
PRCMU_DSI1CLK_LCD,
|
||||
PRCMU_DSI0ESCCLK_LCD,
|
||||
PRCMU_DSI1ESCCLK_LCD,
|
||||
PRCMU_DSI2ESCCLK_LCD,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum prcmu_wdog_id - PRCMU watchdog IDs
|
||||
* @PRCMU_WDOG_ALL: use all timers
|
||||
|
|
|
|||
|
|
@ -10,6 +10,9 @@
|
|||
#ifndef __CLK_UX500_H
|
||||
#define __CLK_UX500_H
|
||||
|
||||
void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
|
||||
u32 clkrst5_base, u32 clkrst6_base);
|
||||
|
||||
void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
|
||||
u32 clkrst5_base, u32 clkrst6_base);
|
||||
void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
|
||||
|
|
|
|||
Loading…
Reference in a new issue