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net/mlx5: Lag, add support to create TTC tables for LAG port selection

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Add support to create inner and outer TTC tables for LAG port
selection. These tables are used to classify the packets in
order to select the related definer.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Maor Gottlieb 2021-07-15 09:43:35 +03:00 committed by Saeed Mahameed
parent dc48516ec7
commit 8e25a2bc66
2 changed files with 92 additions and 0 deletions
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91
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c
View file

@ -5,6 +5,8 @@
#include "lag.h"
enum {
MLX5_LAG_FT_LEVEL_TTC,
MLX5_LAG_FT_LEVEL_INNER_TTC,
MLX5_LAG_FT_LEVEL_DEFINER,
};
@ -420,3 +422,92 @@ static void set_tt_map(struct mlx5_lag_port_sel *port_sel,
break;
}
}
#define SET_IGNORE_DESTS_BITS(tt_map, dests) \
do { \
int idx; \
\
for_each_clear_bit(idx, tt_map, MLX5_NUM_TT) \
set_bit(idx, dests); \
} while (0)
static void mlx5_lag_set_inner_ttc_params(struct mlx5_lag *ldev,
struct ttc_params *ttc_params)
{
struct mlx5_core_dev *dev = ldev->pf[MLX5_LAG_P1].dev;
struct mlx5_lag_port_sel *port_sel = &ldev->port_sel;
struct mlx5_flow_table_attr *ft_attr;
int tt;
ttc_params->ns = mlx5_get_flow_namespace(dev,
MLX5_FLOW_NAMESPACE_PORT_SEL);
ft_attr = &ttc_params->ft_attr;
ft_attr->level = MLX5_LAG_FT_LEVEL_INNER_TTC;
for_each_set_bit(tt, port_sel->tt_map, MLX5_NUM_TT) {
ttc_params->dests[tt].type =
MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
ttc_params->dests[tt].ft = port_sel->inner.definers[tt]->ft;
}
SET_IGNORE_DESTS_BITS(port_sel->tt_map, ttc_params->ignore_dests);
}
static void mlx5_lag_set_outer_ttc_params(struct mlx5_lag *ldev,
struct ttc_params *ttc_params)
{
struct mlx5_core_dev *dev = ldev->pf[MLX5_LAG_P1].dev;
struct mlx5_lag_port_sel *port_sel = &ldev->port_sel;
struct mlx5_flow_table_attr *ft_attr;
int tt;
ttc_params->ns = mlx5_get_flow_namespace(dev,
MLX5_FLOW_NAMESPACE_PORT_SEL);
ft_attr = &ttc_params->ft_attr;
ft_attr->level = MLX5_LAG_FT_LEVEL_TTC;
for_each_set_bit(tt, port_sel->tt_map, MLX5_NUM_TT) {
ttc_params->dests[tt].type =
MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
ttc_params->dests[tt].ft = port_sel->outer.definers[tt]->ft;
}
SET_IGNORE_DESTS_BITS(port_sel->tt_map, ttc_params->ignore_dests);
ttc_params->inner_ttc = port_sel->tunnel;
if (!port_sel->tunnel)
return;
for (tt = 0; tt < MLX5_NUM_TUNNEL_TT; tt++) {
ttc_params->tunnel_dests[tt].type =
MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
ttc_params->tunnel_dests[tt].ft =
mlx5_get_ttc_flow_table(port_sel->inner.ttc);
}
}
static int mlx5_lag_create_ttc_table(struct mlx5_lag *ldev)
{
struct mlx5_core_dev *dev = ldev->pf[MLX5_LAG_P1].dev;
struct mlx5_lag_port_sel *port_sel = &ldev->port_sel;
struct ttc_params ttc_params = {};
mlx5_lag_set_outer_ttc_params(ldev, &ttc_params);
port_sel->outer.ttc = mlx5_create_ttc_table(dev, &ttc_params);
if (IS_ERR(port_sel->outer.ttc))
return PTR_ERR(port_sel->outer.ttc);
return 0;
}
static int mlx5_lag_create_inner_ttc_table(struct mlx5_lag *ldev)
{
struct mlx5_core_dev *dev = ldev->pf[MLX5_LAG_P1].dev;
struct mlx5_lag_port_sel *port_sel = &ldev->port_sel;
struct ttc_params ttc_params = {};
mlx5_lag_set_inner_ttc_params(ldev, &ttc_params);
port_sel->inner.ttc = mlx5_create_ttc_table(dev, &ttc_params);
if (IS_ERR(port_sel->inner.ttc))
return PTR_ERR(port_sel->inner.ttc);
return 0;
}

1
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.h
View file

@ -14,6 +14,7 @@ struct mlx5_lag_definer {
};
struct mlx5_lag_ttc {
struct mlx5_ttc_table *ttc;
struct mlx5_lag_definer *definers[MLX5_NUM_TT];
};