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microblaze: Add PVR for endians plus detection
Upcomming microblaze version will support little-endian. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Grant Likely <grant.likely@secretlab.ca>
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44180a573e
commit
8e2ad016b2
6 changed files with 9 additions and 1 deletions
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@ -38,6 +38,7 @@ struct cpuinfo {
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u32 use_exc;
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u32 ver_code;
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u32 mmu;
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u32 endian;
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/* CPU caches */
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u32 use_icache;
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@ -32,6 +32,7 @@ struct pvr_s {
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#define PVR0_USE_DCACHE_MASK 0x01000000
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#define PVR0_USE_MMU 0x00800000
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#define PVR0_USE_BTC 0x00400000
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#define PVR0_ENDI 0x00200000
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#define PVR0_VERSION_MASK 0x0000FF00
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#define PVR0_USER1_MASK 0x000000FF
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@ -209,6 +210,8 @@ struct pvr_s {
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#define PVR_MMU_TLB_ACCESS(pvr) (pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
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#define PVR_MMU_ZONES(pvr) (pvr.pvr[11] & PVR11_MMU_ZONES)
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/* endian */
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#define PVR_ENDIAN(pvr) (pvr.pvr[0] & PVR0_ENDI)
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int cpu_has_pvr(void);
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void get_pvr(struct pvr_s *pvr);
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@ -72,6 +72,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
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CI(pvr_user2, USER2);
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CI(mmu, USE_MMU);
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CI(endian, ENDIAN);
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CI(use_icache, USE_ICACHE);
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CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
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@ -119,6 +119,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
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ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
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ci->mmu = fcpu(cpu, "xlnx,use-mmu");
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ci->endian = fcpu(cpu, "xlnx,endianness");
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ci->ver_code = 0;
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ci->fpga_family_code = 0;
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@ -51,11 +51,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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count = seq_printf(m,
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"CPU-Family: MicroBlaze\n"
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"FPGA-Arch: %s\n"
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"CPU-Ver: %s\n"
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"CPU-Ver: %s, %s endian\n"
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"CPU-MHz: %d.%02d\n"
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"BogoMips: %lu.%02lu\n",
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fpga_family,
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cpu_ver,
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cpuinfo.endian ? "little" : "big",
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cpuinfo.cpu_clock_freq /
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1000000,
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cpuinfo.cpu_clock_freq %
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@ -85,6 +85,7 @@ microblaze_0: cpu@0 {
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xlnx,dynamic-bus-sizing = <0x1>;
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xlnx,edge-is-positive = <0x1>;
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xlnx,family = "virtex5";
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xlnx,endianness = <0x1>;
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xlnx,fpu-exception = <0x1>;
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xlnx,fsl-data-size = <0x20>;
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xlnx,fsl-exception = <0x0>;
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