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drm/i915: kill ivybridge_irq_postinstall
It was very similar to ironlake_irq_postinstall, so IMHO merging both functions results in a code that is easier to maintain. With this change, all the irq handler vfuncs between ironlake and ivybridge are now unified. v2: Add "(" and ")" to make at least one vim user much happier (Chris) Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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1 changed files with 20 additions and 49 deletions
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@ -2165,21 +2165,33 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
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static int ironlake_irq_postinstall(struct drm_device *dev)
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{
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unsigned long irqflags;
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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/* enable kind of interrupts always enabled */
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u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
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DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
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DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
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DE_PIPEA_FIFO_UNDERRUN | DE_POISON;
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u32 display_mask, extra_mask;
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if (INTEL_INFO(dev)->gen >= 7) {
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display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
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DE_PCH_EVENT_IVB | DE_PLANEC_FLIP_DONE_IVB |
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DE_PLANEB_FLIP_DONE_IVB |
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DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB |
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DE_ERR_INT_IVB);
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extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
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DE_PIPEA_VBLANK_IVB);
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I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
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} else {
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display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
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DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
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DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
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DE_PIPEA_FIFO_UNDERRUN | DE_POISON);
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extra_mask = DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT;
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}
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dev_priv->irq_mask = ~display_mask;
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/* should always can generate irq */
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I915_WRITE(DEIIR, I915_READ(DEIIR));
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I915_WRITE(DEIMR, dev_priv->irq_mask);
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I915_WRITE(DEIER, display_mask |
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DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT);
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I915_WRITE(DEIER, display_mask | extra_mask);
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POSTING_READ(DEIER);
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gen5_gt_irq_postinstall(dev);
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@ -2200,38 +2212,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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return 0;
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}
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static int ivybridge_irq_postinstall(struct drm_device *dev)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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/* enable kind of interrupts always enabled */
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u32 display_mask =
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DE_MASTER_IRQ_CONTROL | DE_GSE_IVB | DE_PCH_EVENT_IVB |
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DE_PLANEC_FLIP_DONE_IVB |
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DE_PLANEB_FLIP_DONE_IVB |
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DE_PLANEA_FLIP_DONE_IVB |
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DE_AUX_CHANNEL_A_IVB |
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DE_ERR_INT_IVB;
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dev_priv->irq_mask = ~display_mask;
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/* should always can generate irq */
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I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
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I915_WRITE(DEIIR, I915_READ(DEIIR));
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I915_WRITE(DEIMR, dev_priv->irq_mask);
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I915_WRITE(DEIER,
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display_mask |
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DE_PIPEC_VBLANK_IVB |
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DE_PIPEB_VBLANK_IVB |
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DE_PIPEA_VBLANK_IVB);
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POSTING_READ(DEIER);
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gen5_gt_irq_postinstall(dev);
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ibx_irq_postinstall(dev);
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return 0;
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}
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static int valleyview_irq_postinstall(struct drm_device *dev)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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@ -3040,15 +3020,6 @@ void intel_irq_init(struct drm_device *dev)
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dev->driver->enable_vblank = valleyview_enable_vblank;
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dev->driver->disable_vblank = valleyview_disable_vblank;
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dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
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} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
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/* Share uninstall handlers with ILK/SNB */
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dev->driver->irq_handler = ironlake_irq_handler;
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dev->driver->irq_preinstall = ironlake_irq_preinstall;
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dev->driver->irq_postinstall = ivybridge_irq_postinstall;
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dev->driver->irq_uninstall = ironlake_irq_uninstall;
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dev->driver->enable_vblank = ironlake_enable_vblank;
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dev->driver->disable_vblank = ironlake_disable_vblank;
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dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
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} else if (HAS_PCH_SPLIT(dev)) {
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dev->driver->irq_handler = ironlake_irq_handler;
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dev->driver->irq_preinstall = ironlake_irq_preinstall;
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