RISC-V Fixes for 5.13-rc6
* A pair of XIP fixes: one to fix alternatives, and one to turn off the rest of the features that require code modification. * A fix to a type that was causing some alternatives to break. * A build fix for BUILTIN_DTB. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmDE1gATHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiZUxD/wJCNTks+q/reK6CjbpqhBtYvi2TnfG Mg6fOlblQRgApnfPbEy1tJEsZAIFClD7OtmUPM+5O2P7CoDp62VYqD1SoCMruXX2 9lJVhfpz0ZYGGaJyBf5SJ73TMgowI8WlryhYnqfp1sjcpKUjN0ncINc8vI9UveXB p248/0IKK6ZMqsuLvUbQl4knPgV7AgGxyh0f3Iahj/GkRnqtWU38/9RABjCfGB59 6uGO9lGQbCs4enQSXqNs0xpzVrmo8TK31jwOgGGv4t9yTyY+AYaRrx0vvm9CIs+i n9/H77GlUw3Jka0QpiV9pdwY+eHfmoEr5ywL/tFw1W6A7jqkaiPLOzVP84cMob5f BbBJj5mES4pZfZBJYlwsnaet8UfOCaGBzcyoAt/IAe5FTudo5DCXLAWa+Zm84mj1 disMlG6pgl85Za7DRVvvXbhxO1ENaN6cWAXg1E5T2MkILdqmle31C37JtO3W0Uj/ dw9qa9wYW4G04xxFuMRZFLGNzEpwULQXcY5ixrnB64v8traOaIbyIzL+cy3bYSR8 yhU9A0AYTKA41irYokr4VyT6+qiYEP6e1Yg+iC3YEMQfdmbPheTJotm2DjoI+lKK UH8dJWiHAJro653VWPnpB08SpXo0HEKdWfCJSlxbMTeY0u62KG+KWNJlcRQTaxZF LJsLZLXuY2VYMw== =c3op -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-5.13-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - A pair of XIP fixes: one to fix alternatives, and one to turn off the rest of the features that require code modification - A fix to a type that was causing some alternatives to break - A build fix for BUILTIN_DTB * tag 'riscv-for-linus-5.13-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix BUILTIN_DTB for sifive and microchip soc riscv: alternative: fix typo in macro name riscv: code patching only works on !XIP_KERNEL riscv: xip: support runtime trap patching
This commit is contained in:
Linus Torvalds
commit
8ecfa36cd4
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@ -61,11 +61,11 @@ config RISCV
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select GENERIC_TIME_VSYSCALL if MMU && 64BIT
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select HANDLE_DOMAIN_IRQ
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL
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select HAVE_ARCH_JUMP_LABEL_RELATIVE
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select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
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select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
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select HAVE_ARCH_KASAN if MMU && 64BIT
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select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT
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select HAVE_ARCH_KGDB
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select HAVE_ARCH_KGDB if !XIP_KERNEL
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select HAVE_ARCH_KGDB_QXFER_PKT
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select HAVE_ARCH_MMAP_RND_BITS if MMU
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select HAVE_ARCH_SECCOMP_FILTER
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@ -80,9 +80,9 @@ config RISCV
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select HAVE_GCC_PLUGINS
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select HAVE_GENERIC_VDSO if MMU && 64BIT
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select HAVE_IRQ_TIME_ACCOUNTING
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select HAVE_KPROBES
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select HAVE_KPROBES_ON_FTRACE
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select HAVE_KRETPROBES
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select HAVE_KPROBES if !XIP_KERNEL
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select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL
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select HAVE_KRETPROBES if !XIP_KERNEL
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select HAVE_PCI
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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@ -231,11 +231,11 @@ config ARCH_RV64I
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bool "RV64I"
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select 64BIT
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select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && GCC_VERSION >= 50000
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select HAVE_DYNAMIC_FTRACE if MMU && $(cc-option,-fpatchable-function-entry=8)
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select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && $(cc-option,-fpatchable-function-entry=8)
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select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
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select HAVE_FTRACE_MCOUNT_RECORD
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select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_TRACER if !XIP_KERNEL
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select SWIOTLB if MMU
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endchoice
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@ -1,2 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += microchip-mpfs-icicle-kit.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,3 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \
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hifive-unmatched-a00.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -51,7 +51,7 @@
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REG_ASM " " newlen "\n" \
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".word " errata_id "\n"
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#define ALT_NEW_CONSTENT(vendor_id, errata_id, enable, new_c) \
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#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \
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".if " __stringify(enable) " == 1\n" \
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".pushsection .alternative, \"a\"\n" \
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ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(errata_id), "889f - 888f") \
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@ -69,7 +69,7 @@
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"886 :\n" \
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old_c "\n" \
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"887 :\n" \
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ALT_NEW_CONSTENT(vendor_id, errata_id, enable, new_c)
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ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c)
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#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
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__ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
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@ -86,8 +86,13 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code,
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}
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}
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#if defined (CONFIG_XIP_KERNEL) && defined (CONFIG_RISCV_ERRATA_ALTERNATIVE)
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#define __trap_section __section(".xip.traps")
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#else
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#define __trap_section
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#endif
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#define DO_ERROR_INFO(name, signo, code, str) \
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asmlinkage __visible void name(struct pt_regs *regs) \
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asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
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{ \
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do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \
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}
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@ -111,7 +116,7 @@ DO_ERROR_INFO(do_trap_store_misaligned,
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int handle_misaligned_load(struct pt_regs *regs);
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int handle_misaligned_store(struct pt_regs *regs);
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asmlinkage void do_trap_load_misaligned(struct pt_regs *regs)
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asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs)
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{
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if (!handle_misaligned_load(regs))
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return;
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@ -119,7 +124,7 @@ asmlinkage void do_trap_load_misaligned(struct pt_regs *regs)
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"Oops - load address misaligned");
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}
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asmlinkage void do_trap_store_misaligned(struct pt_regs *regs)
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asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs)
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{
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if (!handle_misaligned_store(regs))
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return;
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@ -146,7 +151,7 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
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return GET_INSN_LENGTH(insn);
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}
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asmlinkage __visible void do_trap_break(struct pt_regs *regs)
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asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
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{
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#ifdef CONFIG_KPROBES
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if (kprobe_single_step_handler(regs))
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@ -99,9 +99,22 @@ SECTIONS
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}
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(PAGE_SIZE);
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. = ALIGN(8);
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.alternative : {
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__alt_start = .;
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*(.alternative)
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__alt_end = .;
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}
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__init_end = .;
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. = ALIGN(16);
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.xip.traps : {
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__xip_traps_start = .;
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*(.xip.traps)
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__xip_traps_end = .;
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}
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. = ALIGN(PAGE_SIZE);
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.sdata : {
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__global_pointer$ = . + 0x800;
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*(.sdata*)
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