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drm/amdgpu: add uvd enc command in header
Add UVD encode command interface definition for uvd6.3 HEVC encoding Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#define VCE_CMD_UPDATE_PTB 0x00000107
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#define VCE_CMD_UPDATE_PTB 0x00000107
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#define VCE_CMD_FLUSH_TLB 0x00000108
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#define VCE_CMD_FLUSH_TLB 0x00000108
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/* HEVC ENC */
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#define HEVC_ENC_CMD_NO_OP 0x00000000
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#define HEVC_ENC_CMD_END 0x00000001
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#define HEVC_ENC_CMD_FENCE 0x00000003
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#define HEVC_ENC_CMD_TRAP 0x00000004
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#define HEVC_ENC_CMD_IB_VM 0x00000102
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#define HEVC_ENC_CMD_WAIT_GE 0x00000106
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#define HEVC_ENC_CMD_UPDATE_PTB 0x00000107
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#define HEVC_ENC_CMD_FLUSH_TLB 0x00000108
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/* mmPA_SC_RASTER_CONFIG mask */
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/* mmPA_SC_RASTER_CONFIG mask */
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#define RB_MAP_PKR0(x) ((x) << 0)
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#define RB_MAP_PKR0(x) ((x) << 0)
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#define RB_MAP_PKR0_MASK (0x3 << 0)
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#define RB_MAP_PKR0_MASK (0x3 << 0)
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