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AT91 & LAN966 DT #1 for 5.19: 

- at91: DT compliance updates to gic and dataflash nodes
 - lan966: addition to many basic nodes for various peripherals
 - lan966: Kontron KSwitch D10: support for this new board
   and its network switch
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Merge tag 'at91-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 & LAN966 DT #1 for 5.19:

- at91: DT compliance updates to gic and dataflash nodes
- lan966: addition to many basic nodes for various peripherals
- lan966: Kontron KSwitch D10: support for this new board
  and its network switch

* tag 'at91-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: kswitch-d10: enable networking
  ARM: dts: lan966x: add switch node
  ARM: dts: lan966x: add serdes node
  ARM: dts: lan966x: add reset switch reset node
  ARM: dts: lan966x: add MIIM nodes
  ARM: dts: lan966x: add hwmon node
  ARM: dts: lan966x: add basic Kontron KSwitch D10 support
  ARM: dts: lan966x: add flexcom I2C nodes
  ARM: dts: lan966x: add flexcom SPI nodes
  ARM: dts: lan966x: add all flexcom usart nodes
  ARM: dts: lan966x: add missing uart DMA channel
  ARM: dts: lan966x: add sgpio node
  ARM: dts: lan966x: swap dma channels for crypto node
  ARM: dts: lan966x: rename pinctrl nodes
  ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
  ARM: dts: at91: use generic node name for dataflash

Link: https://lore.kernel.org/r/20220513162338.87717-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-05-13 21:52:09 +02:00
parent 7213d3a5a1 46a9556d97
commit 8f311c09df
16 changed files with 687 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
View File

@ -54,7 +54,7 @@ flexcom@f8034000 {
clock-names = "spi_clk";
atmel,fifo-size = <32>;
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at25f512b";
reg = <0>;
spi-max-frequency = <20000000>;

4
arch/arm/boot/dts/Makefile
View File

@ -768,7 +768,9 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \
dtb-$(CONFIG_SOC_IMXRT) += \
imxrt1050-evk.dtb
dtb-$(CONFIG_SOC_LAN966) += \
lan966x-pcb8291.dtb
lan966x-pcb8291.dtb \
lan966x-kontron-kswitch-d10-mmt-6g-2gs.dtb \
lan966x-kontron-kswitch-d10-mmt-8g.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-iot.dtb \
ls1021a-moxa-uc-8410a.dtb \

4
arch/arm/boot/dts/at91rm9200ek.dts
View File

@ -73,7 +73,7 @@
spi0: spi@fffe0000 {
status = "okay";
cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <15000000>;
reg = <0>;
@ -94,7 +94,7 @@
status = "okay";
};
nor_flash@10000000 {
flash@10000000 {
compatible = "cfi-flash";
reg = <0x10000000 0x800000>;
linux,mtd-name = "physmap-flash.0";

2
arch/arm/boot/dts/at91sam9260ek.dts
View File

@ -92,7 +92,7 @@
spi0: spi@fffc8000 {
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@1 {
flash@1 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <1>;

2
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -145,7 +145,7 @@
cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>;
status = "okay";
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at45", "atmel,dataflash";
reg = <0>;
spi-max-frequency = <15000000>;

2
arch/arm/boot/dts/at91sam9263ek.dts
View File

@ -95,7 +95,7 @@
spi0: spi@fffa4000 {
status = "okay";
cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <0>;

2
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
View File

@ -110,7 +110,7 @@
spi0: spi@fffc8000 {
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@1 {
flash@1 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <1>;

2
arch/arm/boot/dts/at91sam9m10g45ek.dts
View File

@ -167,7 +167,7 @@
spi0: spi@fffa4000{
status = "okay";
cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <13000000>;
reg = <0>;

2
arch/arm/boot/dts/at91sam9rlek.dts
View File

@ -180,7 +180,7 @@
spi0: spi@fffcc000 {
status = "okay";
cs-gpios = <&pioA 28 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <15000000>;
reg = <0>;

94
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts Normal file
View File

@ -0,0 +1,94 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
*/
/dts-v1/;
#include "lan966x-kontron-kswitch-d10-mmt.dtsi"
/ {
model = "Kontron KSwitch D10 MMT 6G-2GS";
compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
"microchip,lan9668", "microchip,lan966";
aliases {
i2c0 = &i2c4;
i2c1 = &i2c1;
};
sfp0: sfp0 {
compatible = "sff,sfp";
i2c-bus = <&i2c4>;
los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
maximum-power-milliwatt = <2500>;
tx-disable-gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>;
tx-fault-gpios = <&sgpio_in 0 2 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&sgpio_out 2 0 GPIO_ACTIVE_HIGH>;
rate-select1-gpios = <&sgpio_out 2 1 GPIO_ACTIVE_HIGH>;
};
sfp1: sfp1 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpios = <&sgpio_in 1 2 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&sgpio_in 1 3 GPIO_ACTIVE_LOW>;
maximum-power-milliwatt = <2500>;
tx-disable-gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>;
tx-fault-gpios = <&sgpio_in 0 3 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&sgpio_out 2 2 GPIO_ACTIVE_HIGH>;
rate-select1-gpios = <&sgpio_out 2 3 GPIO_ACTIVE_HIGH>;
};
};
&flx1 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c1: i2c@600 {
pinctrl-0 = <&fc1_c_pins>;
pinctrl-names = "default";
status = "okay";
};
};
&flx4 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c4: i2c@600 {
pinctrl-0 = <&fc4_b_pins>;
pinctrl-names = "default";
status = "okay";
};
};
&gpio {
fc1_c_pins: fc1-c-i2c-pins {
/* SCL, SDA */
pins = "GPIO_47", "GPIO_48";
function = "fc1_c";
};
fc4_b_pins: fc4-b-i2c-pins {
/* SCL, SDA */
pins = "GPIO_57", "GPIO_58";
function = "fc4_b";
};
};
&port2 {
phys = <&serdes 2 SERDES6G(0)>;
sfp = <&sfp0>;
managed = "in-band-status";
phy-mode = "sgmii";
status = "okay";
};
&port3 {
phys = <&serdes 3 SERDES6G(1)>;
sfp = <&sfp1>;
managed = "in-band-status";
phy-mode = "sgmii";
status = "okay";
};

39
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts Normal file
View File

@ -0,0 +1,39 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for the Kontron KSwitch D10 MMT 8G
*/
/dts-v1/;
#include "lan966x-kontron-kswitch-d10-mmt.dtsi"
/ {
model = "Kontron KSwitch D10 MMT 8G";
compatible = "kontron,kswitch-d10-mmt-8g", "kontron,s1921",
"microchip,lan9668", "microchip,lan966";
};
&mdio0 {
phy2: ethernet-phy@3 {
reg = <3>;
};
phy3: ethernet-phy@4 {
reg = <4>;
};
};
&port2 {
phys = <&serdes 2 SERDES6G(0)>;
phy-handle = <&phy2>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
&port3 {
phys = <&serdes 3 SERDES6G(1)>;
phy-handle = <&phy3>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};

190
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi Normal file
View File

@ -0,0 +1,190 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Common part of the device tree for the Kontron KSwitch D10 MMT
*/
/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"
/ {
aliases {
serial0 = &usart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-restart {
compatible = "gpio-restart";
gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
priority = <200>;
};
};
&flx0 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "okay";
usart0: serial@200 {
pinctrl-0 = <&usart0_pins>;
pinctrl-names = "default";
status = "okay";
};
};
&flx3 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
status = "okay";
spi3: spi@400 {
pinctrl-0 = <&fc3_b_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
};
&gpio {
fc3_b_pins: fc3-b-pins {
/* SCK, MISO, MOSI */
pins = "GPIO_51", "GPIO_52", "GPIO_53";
function = "fc3_b";
};
miim_c_pins: miim-c-pins {
/* MDC, MDIO */
pins = "GPIO_59", "GPIO_60";
function = "miim_c";
};
sgpio_a_pins: sgpio-a-pins {
/* SCK, D0, D1 */
pins = "GPIO_32", "GPIO_33", "GPIO_34";
function = "sgpio_a";
};
sgpio_b_pins: sgpio-b-pins {
/* LD */
pins = "GPIO_64";
function = "sgpio_b";
};
usart0_pins: usart0-pins {
/* RXD, TXD */
pins = "GPIO_25", "GPIO_26";
function = "fc0_b";
};
};
&mdio0 {
pinctrl-0 = <&miim_c_pins>;
pinctrl-names = "default";
reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
clock-frequency = <2500000>;
status = "okay";
phy4: ethernet-phy@5 {
reg = <5>;
coma-mode-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
};
phy5: ethernet-phy@6 {
reg = <6>;
coma-mode-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
};
phy6: ethernet-phy@7 {
reg = <7>;
coma-mode-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
};
phy7: ethernet-phy@8 {
reg = <8>;
coma-mode-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
};
};
&mdio1 {
status = "okay";
};
&phy0 {
status = "okay";
};
&phy1 {
status = "okay";
};
&port0 {
phys = <&serdes 0 CU(0)>;
phy-handle = <&phy0>;
phy-mode = "gmii";
status = "okay";
};
&port1 {
phys = <&serdes 1 CU(1)>;
phy-handle = <&phy1>;
phy-mode = "gmii";
status = "okay";
};
&port4 {
phys = <&serdes 4 SERDES6G(2)>;
phy-handle = <&phy4>;
phy-mode = "qsgmii";
status = "okay";
};
&port5 {
phys = <&serdes 5 SERDES6G(2)>;
phy-handle = <&phy5>;
phy-mode = "qsgmii";
status = "okay";
};
&port6 {
phys = <&serdes 6 SERDES6G(2)>;
phy-handle = <&phy6>;
phy-mode = "qsgmii";
status = "okay";
};
&port7 {
phys = <&serdes 7 SERDES6G(2)>;
phy-handle = <&phy7>;
phy-mode = "qsgmii";
status = "okay";
};
&serdes {
status = "okay";
};
&sgpio {
pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>;
pinctrl-names = "default";
bus-frequency = <8000000>;
/* arbitrary range because all GPIOs are in software mode */
microchip,sgpio-port-ranges = <0 11>;
status = "okay";
sgpio_in: gpio@0 {
ngpios = <128>;
};
sgpio_out: gpio@1 {
ngpios = <128>;
};
};
&switch {
status = "okay";
};
&watchdog {
status = "okay";
};

2
arch/arm/boot/dts/lan966x-pcb8291.dts
View File

@ -35,7 +35,7 @@
function = "fc3_b";
};
can0_b_pins: can0_b_pins {
can0_b_pins: can0-b-pins {
/* RX, TX */
pins = "GPIO_35", "GPIO_36";
function = "can0_b";

353
arch/arm/boot/dts/lan966x.dtsi
View File

@ -84,6 +84,68 @@
#size-cells = <1>;
ranges;
switch: switch@e0000000 {
compatible = "microchip,lan966x-switch";
reg = <0xe0000000 0x0100000>,
<0xe2000000 0x0800000>;
reg-names = "cpu", "gcb";
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "xtr", "fdma", "ana", "ptp",
"ptp-ext";
resets = <&reset 0>;
reset-names = "switch";
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port0: port@0 {
reg = <0>;
status = "disabled";
};
port1: port@1 {
reg = <1>;
status = "disabled";
};
port2: port@2 {
reg = <2>;
status = "disabled";
};
port3: port@3 {
reg = <3>;
status = "disabled";
};
port4: port@4 {
reg = <4>;
status = "disabled";
};
port5: port@5 {
reg = <5>;
status = "disabled";
};
port6: port@6 {
reg = <6>;
status = "disabled";
};
port7: port@7 {
reg = <7>;
status = "disabled";
};
};
};
flx0: flexcom@e0040000 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xe0040000 0x100>;
@ -92,6 +154,47 @@
#size-cells = <1>;
ranges = <0x0 0xe0040000 0x800>;
status = "disabled";
usart0: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
<&dma0 AT91_XDMAC_DT_PERID(2)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "usart";
atmel,fifo-size = <32>;
status = "disabled";
};
spi0: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
<&dma0 AT91_XDMAC_DT_PERID(2)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c0: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
<&dma0 AT91_XDMAC_DT_PERID(2)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
flx1: flexcom@e0044000 {
@ -102,6 +205,47 @@
#size-cells = <1>;
ranges = <0x0 0xe0044000 0x800>;
status = "disabled";
usart1: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
<&dma0 AT91_XDMAC_DT_PERID(4)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "usart";
atmel,fifo-size = <32>;
status = "disabled";
};
spi1: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
<&dma0 AT91_XDMAC_DT_PERID(4)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
<&dma0 AT91_XDMAC_DT_PERID(4)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
trng: rng@e0048000 {
@ -114,9 +258,9 @@
compatible = "atmel,at91sam9g46-aes";
reg = <0xe004c000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(13)>,
<&dma0 AT91_XDMAC_DT_PERID(12)>;
dma-names = "rx", "tx";
dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
<&dma0 AT91_XDMAC_DT_PERID(13)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "aes_clk";
};
@ -129,6 +273,47 @@
#size-cells = <1>;
ranges = <0x0 0xe0060000 0x800>;
status = "disabled";
usart2: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
<&dma0 AT91_XDMAC_DT_PERID(6)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "usart";
atmel,fifo-size = <32>;
status = "disabled";
};
spi2: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
<&dma0 AT91_XDMAC_DT_PERID(6)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
<&dma0 AT91_XDMAC_DT_PERID(6)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
flx3: flexcom@e0064000 {
@ -144,11 +329,42 @@
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
<&dma0 AT91_XDMAC_DT_PERID(8)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "usart";
atmel,fifo-size = <32>;
status = "disabled";
};
spi3: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
<&dma0 AT91_XDMAC_DT_PERID(8)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
<&dma0 AT91_XDMAC_DT_PERID(8)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
dma0: dma-controller@e0068000 {
@ -178,6 +394,47 @@
#size-cells = <1>;
ranges = <0x0 0xe0070000 0x800>;
status = "disabled";
usart4: serial@200 {
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
<&dma0 AT91_XDMAC_DT_PERID(10)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "usart";
atmel,fifo-size = <32>;
status = "disabled";
};
spi4: spi@400 {
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
<&dma0 AT91_XDMAC_DT_PERID(10)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
clock-names = "spi_clk";
atmel,fifo-size = <32>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
<&dma0 AT91_XDMAC_DT_PERID(10)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
timer0: timer@e008c000 {
@ -196,6 +453,11 @@
status = "disabled";
};
cpu_ctrl: syscon@e00c0000 {
compatible = "microchip,lan966x-cpu-syscon", "syscon";
reg = <0xe00c0000 0x350>;
};
can0: can@e081c000 {
compatible = "bosch,m_can";
reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
@ -211,10 +473,20 @@
status = "disabled";
};
reset: reset-controller@e200400c {
compatible = "microchip,lan966x-switch-reset";
reg = <0xe200400c 0x4>;
reg-names = "gcb";
#reset-cells = <1>;
cpu-syscon = <&cpu_ctrl>;
};
gpio: pinctrl@e2004064 {
compatible = "microchip,lan966x-pinctrl";
reg = <0xe2004064 0xb4>,
<0xe2010024 0x138>;
resets = <&reset 0>;
reset-names = "switch";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio 0 0 78>;
@ -223,6 +495,81 @@
#interrupt-cells = <2>;
};
mdio0: mdio@e2004118 {
compatible = "microchip,lan966x-miim";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xe2004118 0x24>;
clocks = <&sys_clk>;
status = "disabled";
};
mdio1: mdio@e200413c {
compatible = "microchip,lan966x-miim";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xe200413c 0x24>,
<0xe2010020 0x4>;
clocks = <&sys_clk>;
status = "disabled";
phy0: ethernet-phy@1 {
reg = <1>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
phy1: ethernet-phy@2 {
reg = <2>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
sgpio: gpio@e2004190 {
compatible = "microchip,sparx5-sgpio";
reg = <0xe2004190 0x118>;
clocks = <&sys_clk>;
resets = <&reset 0>;
reset-names = "switch";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sgpio_in: gpio@0 {
compatible = "microchip,sparx5-sgpio-bank";
reg = <0>;
gpio-controller;
#gpio-cells = <3>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
};
sgpio_out: gpio@1 {
compatible = "microchip,sparx5-sgpio-bank";
reg = <1>;
gpio-controller;
#gpio-cells = <3>;
};
};
hwmon: hwmon@e2010180 {
compatible = "microchip,lan9668-hwmon";
reg = <0xe2010180 0xc>,
<0xe20042a8 0xc>;
reg-names = "pvt", "fan";
clocks = <&sys_clk>;
};
serdes: serdes@e202c000 {
compatible = "microchip,lan966x-serdes";
reg = <0xe202c000 0x9c>,
<0xe2004010 0x4>;
#phy-cells = <2>;
status = "disabled";
};
gic: interrupt-controller@e8c11000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;

1
arch/arm/boot/dts/sama7g5.dtsi
View File

@ -857,7 +857,6 @@
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
interrupt-parent;
reg = <0xe8c11000 0x1000>,
<0xe8c12000 0x2000>;
};

2
arch/arm/boot/dts/usb_a9263.dts
View File

@ -60,7 +60,7 @@
spi0: spi@fffa4000 {
cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>;
status = "okay";
mtd_dataflash@0 {
flash@0 {
compatible = "atmel,at45", "atmel,dataflash";
reg = <0>;
spi-max-frequency = <15000000>;