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arm64: dts: mediatek: mt8186: Wire up CPU frequency/voltage scaling

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This adds clocks, dynamic power coefficients, and OPP tables for the CPU
cores, so that everything required at the SoC level for CPU freqency and
voltage scaling is available.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230609072906.2784594-3-wenst@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Chen-Yu Tsai 2023-06-09 15:29:03 +08:00 committed by Matthias Brugger
parent 32dfbc03fc
commit 8f4ed8fc51
1 changed files with 242 additions and 0 deletions
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242
arch/arm64/boot/dts/mediatek/mt8186.dtsi
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@ -120,6 +120,208 @@ cci_opp_15: opp-1400000000 {
}; };
}; };
cluster0_opp: opp-table-cluster0 {
compatible = "operating-points-v2";
opp-shared;
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <600000>;
required-opps = <&cci_opp_0>;
};
opp-774000000 {
opp-hz = /bits/ 64 <774000000>;
opp-microvolt = <675000>;
required-opps = <&cci_opp_1>;
};
opp-875000000 {
opp-hz = /bits/ 64 <875000000>;
opp-microvolt = <700000>;
required-opps = <&cci_opp_2>;
};
opp-975000000 {
opp-hz = /bits/ 64 <975000000>;
opp-microvolt = <725000>;
required-opps = <&cci_opp_3>;
};
opp-1075000000 {
opp-hz = /bits/ 64 <1075000000>;
opp-microvolt = <750000>;
required-opps = <&cci_opp_4>;
};
opp-1175000000 {
opp-hz = /bits/ 64 <1175000000>;
opp-microvolt = <775000>;
required-opps = <&cci_opp_5>;
};
opp-1275000000 {
opp-hz = /bits/ 64 <1275000000>;
opp-microvolt = <800000>;
required-opps = <&cci_opp_6>;
};
opp-1375000000 {
opp-hz = /bits/ 64 <1375000000>;
opp-microvolt = <825000>;
required-opps = <&cci_opp_7>;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <856250>;
required-opps = <&cci_opp_8>;
};
opp-1618000000 {
opp-hz = /bits/ 64 <1618000000>;
opp-microvolt = <875000>;
required-opps = <&cci_opp_9>;
};
opp-1666000000 {
opp-hz = /bits/ 64 <1666000000>;
opp-microvolt = <900000>;
required-opps = <&cci_opp_10>;
};
opp-1733000000 {
opp-hz = /bits/ 64 <1733000000>;
opp-microvolt = <925000>;
required-opps = <&cci_opp_11>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <950000>;
required-opps = <&cci_opp_12>;
};
opp-1866000000 {
opp-hz = /bits/ 64 <1866000000>;
opp-microvolt = <981250>;
required-opps = <&cci_opp_13>;
};
opp-1933000000 {
opp-hz = /bits/ 64 <1933000000>;
opp-microvolt = <1006250>;
required-opps = <&cci_opp_14>;
};
opp-2000000000 {
opp-hz = /bits/ 64 <2000000000>;
opp-microvolt = <1031250>;
required-opps = <&cci_opp_15>;
};
};
cluster1_opp: opp-table-cluster1 {
compatible = "operating-points-v2";
opp-shared;
opp-774000000 {
opp-hz = /bits/ 64 <774000000>;
opp-microvolt = <675000>;
required-opps = <&cci_opp_0>;
};
opp-835000000 {
opp-hz = /bits/ 64 <835000000>;
opp-microvolt = <693750>;
required-opps = <&cci_opp_1>;
};
opp-919000000 {
opp-hz = /bits/ 64 <919000000>;
opp-microvolt = <718750>;
required-opps = <&cci_opp_2>;
};
opp-1002000000 {
opp-hz = /bits/ 64 <1002000000>;
opp-microvolt = <743750>;
required-opps = <&cci_opp_3>;
};
opp-1085000000 {
opp-hz = /bits/ 64 <1085000000>;
opp-microvolt = <775000>;
required-opps = <&cci_opp_4>;
};
opp-1169000000 {
opp-hz = /bits/ 64 <1169000000>;
opp-microvolt = <800000>;
required-opps = <&cci_opp_5>;
};
opp-1308000000 {
opp-hz = /bits/ 64 <1308000000>;
opp-microvolt = <843750>;
required-opps = <&cci_opp_6>;
};
opp-1419000000 {
opp-hz = /bits/ 64 <1419000000>;
opp-microvolt = <875000>;
required-opps = <&cci_opp_7>;
};
opp-1530000000 {
opp-hz = /bits/ 64 <1530000000>;
opp-microvolt = <912500>;
required-opps = <&cci_opp_8>;
};
opp-1670000000 {
opp-hz = /bits/ 64 <1670000000>;
opp-microvolt = <956250>;
required-opps = <&cci_opp_9>;
};
opp-1733000000 {
opp-hz = /bits/ 64 <1733000000>;
opp-microvolt = <981250>;
required-opps = <&cci_opp_10>;
};
opp-1796000000 {
opp-hz = /bits/ 64 <1796000000>;
opp-microvolt = <1012500>;
required-opps = <&cci_opp_11>;
};
opp-1860000000 {
opp-hz = /bits/ 64 <1860000000>;
opp-microvolt = <1037500>;
required-opps = <&cci_opp_12>;
};
opp-1923000000 {
opp-hz = /bits/ 64 <1923000000>;
opp-microvolt = <1062500>;
required-opps = <&cci_opp_13>;
};
cluster1_opp_14: opp-1986000000 {
opp-hz = /bits/ 64 <1986000000>;
opp-microvolt = <1093750>;
required-opps = <&cci_opp_14>;
};
cluster1_opp_15: opp-2050000000 {
opp-hz = /bits/ 64 <2050000000>;
opp-microvolt = <1118750>;
required-opps = <&cci_opp_15>;
};
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -166,6 +368,11 @@ cpu0: cpu@0 {
reg = <0x000>; reg = <0x000>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2000000000>; clock-frequency = <2000000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
capacity-dmips-mhz = <382>; capacity-dmips-mhz = <382>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>; cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>; i-cache-size = <32768>;
@ -185,6 +392,11 @@ cpu1: cpu@100 {
reg = <0x100>; reg = <0x100>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2000000000>; clock-frequency = <2000000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
capacity-dmips-mhz = <382>; capacity-dmips-mhz = <382>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>; cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>; i-cache-size = <32768>;
@ -204,6 +416,11 @@ cpu2: cpu@200 {
reg = <0x200>; reg = <0x200>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2000000000>; clock-frequency = <2000000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
capacity-dmips-mhz = <382>; capacity-dmips-mhz = <382>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>; cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>; i-cache-size = <32768>;
@ -223,6 +440,11 @@ cpu3: cpu@300 {
reg = <0x300>; reg = <0x300>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2000000000>; clock-frequency = <2000000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
capacity-dmips-mhz = <382>; capacity-dmips-mhz = <382>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>; cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>; i-cache-size = <32768>;
@ -242,6 +464,11 @@ cpu4: cpu@400 {
reg = <0x400>; reg = <0x400>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2000000000>; clock-frequency = <2000000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
capacity-dmips-mhz = <382>; capacity-dmips-mhz = <382>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>; cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>; i-cache-size = <32768>;
@ -261,6 +488,11 @@ cpu5: cpu@500 {
reg = <0x500>; reg = <0x500>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2000000000>; clock-frequency = <2000000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster0_opp>;
dynamic-power-coefficient = <84>;
capacity-dmips-mhz = <382>; capacity-dmips-mhz = <382>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>; cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>; i-cache-size = <32768>;
@ -280,6 +512,11 @@ cpu6: cpu@600 {
reg = <0x600>; reg = <0x600>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2050000000>; clock-frequency = <2050000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_BL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <335>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_ret_b &cpu_off_b>; cpu-idle-states = <&cpu_ret_b &cpu_off_b>;
i-cache-size = <65536>; i-cache-size = <65536>;
@ -299,6 +536,11 @@ cpu7: cpu@700 {
reg = <0x700>; reg = <0x700>;
enable-method = "psci"; enable-method = "psci";
clock-frequency = <2050000000>; clock-frequency = <2050000000>;
clocks = <&mcusys CLK_MCU_ARMPLL_BL_SEL>,
<&apmixedsys CLK_APMIXED_MAINPLL>;
clock-names = "cpu", "intermediate";
operating-points-v2 = <&cluster1_opp>;
dynamic-power-coefficient = <335>;
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_ret_b &cpu_off_b>; cpu-idle-states = <&cpu_ret_b &cpu_off_b>;
i-cache-size = <65536>; i-cache-size = <65536>;