bus: Add Baikal-T1 APB-bus driver
Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. IO requests are routed to this bus by means of the DW AMBA 3 AXI Interconnect. In case if an attempted APB transaction stays with no response for a pre-defined time an interrupt occurs and the bus gets freed for a next operation. This driver provides the interrupt handler to detect the erroneous address, prints an error message about the address fault, updates an errors counter. The counter and the APB-bus operations timeout can be accessed via corresponding sysfs nodes. A dedicated sysfs-node can be also used to artificially cause the bus errors described above. [arnd: fix build warnings for missing includes and wrong return types] Link: https://lore.kernel.org/r/20200526125928.17096-6-Sergey.Semin@baikalelectronics.ru Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Paul Burton <paulburton@kernel.org> Cc: Olof Johansson <olof@lixom.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: soc@kernel.org Cc: devicetree@vger.kernel.org Reported-by: kbuild test robot <lkp@intel.com> Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Serge Semin
Arnd Bergmann
parent
63cb77136e
commit
8f93662d83
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@ -29,6 +29,21 @@ config BRCMSTB_GISB_ARB
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arbiter. This driver provides timeout and target abort error handling
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and internal bus master decoding.
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config BT1_APB
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tristate "Baikal-T1 APB-bus driver"
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depends on MIPS_BAIKAL_T1 || COMPILE_TEST
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select REGMAP_MMIO
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help
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Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
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IO requests are routed to this bus by means of the DW AMBA 3 AXI
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Interconnect. In case of any APB protocol collisions, slave device
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not responding on timeout an IRQ is raised with an erroneous address
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reported to the APB terminator (APB Errors Handler Block). This
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driver provides the interrupt handler to detect the erroneous
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address, prints an error message about the address fault, updates an
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errors counter. The counter and the APB-bus operations timeout can be
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accessed via corresponding sysfs nodes.
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config BT1_AXI
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tristate "Baikal-T1 AXI-bus driver"
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depends on MIPS_BAIKAL_T1 || COMPILE_TEST
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@ -13,6 +13,7 @@ obj-$(CONFIG_MOXTET) += moxtet.o
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# DPAA2 fsl-mc bus
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obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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obj-$(CONFIG_BT1_APB) += bt1-apb.o
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obj-$(CONFIG_BT1_AXI) += bt1-axi.o
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obj-$(CONFIG_IMX_WEIM) += imx-weim.o
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obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o
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@ -0,0 +1,422 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
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*
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* Authors:
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* Serge Semin <Sergey.Semin@baikalelectronics.ru>
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*
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* Baikal-T1 APB-bus driver
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/atomic.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/nmi.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/clk.h>
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#include <linux/reset.h>
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#include <linux/time64.h>
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#include <linux/clk.h>
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#include <linux/sysfs.h>
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#define APB_EHB_ISR 0x00
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#define APB_EHB_ISR_PENDING BIT(0)
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#define APB_EHB_ISR_MASK BIT(1)
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#define APB_EHB_ADDR 0x04
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#define APB_EHB_TIMEOUT 0x08
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#define APB_EHB_TIMEOUT_MIN 0x000003FFU
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#define APB_EHB_TIMEOUT_MAX 0xFFFFFFFFU
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/*
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* struct bt1_apb - Baikal-T1 APB EHB private data
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* @dev: Pointer to the device structure.
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* @regs: APB EHB registers map.
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* @res: No-device error injection memory region.
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* @irq: Errors IRQ number.
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* @rate: APB-bus reference clock rate.
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* @pclk: APB-reference clock.
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* @prst: APB domain reset line.
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* @count: Number of errors detected.
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*/
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struct bt1_apb {
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struct device *dev;
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struct regmap *regs;
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void __iomem *res;
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int irq;
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unsigned long rate;
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struct clk *pclk;
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struct reset_control *prst;
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atomic_t count;
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};
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static const struct regmap_config bt1_apb_regmap_cfg = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = APB_EHB_TIMEOUT,
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.fast_io = true
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};
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static inline unsigned long bt1_apb_n_to_timeout_us(struct bt1_apb *apb, u32 n)
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{
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u64 timeout = (u64)n * USEC_PER_SEC;
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do_div(timeout, apb->rate);
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return timeout;
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}
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static inline unsigned long bt1_apb_timeout_to_n_us(struct bt1_apb *apb,
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unsigned long timeout)
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{
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u64 n = (u64)timeout * apb->rate;
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do_div(n, USEC_PER_SEC);
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return n;
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}
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static irqreturn_t bt1_apb_isr(int irq, void *data)
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{
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struct bt1_apb *apb = data;
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u32 addr = 0;
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regmap_read(apb->regs, APB_EHB_ADDR, &addr);
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dev_crit_ratelimited(apb->dev,
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"APB-bus fault %d: Slave access timeout at 0x%08x\n",
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atomic_inc_return(&apb->count),
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addr);
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/*
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* Print backtrace on each CPU. This might be pointless if the fault
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* has happened on the same CPU as the IRQ handler is executed or
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* the other core proceeded further execution despite the error.
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* But if it's not, by looking at the trace we would get straight to
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* the cause of the problem.
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*/
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trigger_all_cpu_backtrace();
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regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING, 0);
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return IRQ_HANDLED;
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}
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static void bt1_apb_clear_data(void *data)
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{
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struct bt1_apb *apb = data;
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struct platform_device *pdev = to_platform_device(apb->dev);
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platform_set_drvdata(pdev, NULL);
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}
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static struct bt1_apb *bt1_apb_create_data(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct bt1_apb *apb;
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int ret;
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apb = devm_kzalloc(dev, sizeof(*apb), GFP_KERNEL);
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if (!apb)
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return ERR_PTR(-ENOMEM);
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ret = devm_add_action(dev, bt1_apb_clear_data, apb);
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if (ret) {
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dev_err(dev, "Can't add APB EHB data clear action\n");
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return ERR_PTR(ret);
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}
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apb->dev = dev;
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atomic_set(&apb->count, 0);
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platform_set_drvdata(pdev, apb);
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return apb;
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}
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static int bt1_apb_request_regs(struct bt1_apb *apb)
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{
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struct platform_device *pdev = to_platform_device(apb->dev);
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void __iomem *regs;
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regs = devm_platform_ioremap_resource_byname(pdev, "ehb");
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if (IS_ERR(regs)) {
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dev_err(apb->dev, "Couldn't map APB EHB registers\n");
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return PTR_ERR(regs);
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}
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apb->regs = devm_regmap_init_mmio(apb->dev, regs, &bt1_apb_regmap_cfg);
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if (IS_ERR(apb->regs)) {
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dev_err(apb->dev, "Couldn't create APB EHB regmap\n");
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return PTR_ERR(apb->regs);
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}
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apb->res = devm_platform_ioremap_resource_byname(pdev, "nodev");
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if (IS_ERR(apb->res)) {
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dev_err(apb->dev, "Couldn't map reserved region\n");
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return PTR_ERR(apb->res);
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}
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return 0;
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}
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static int bt1_apb_request_rst(struct bt1_apb *apb)
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{
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int ret;
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apb->prst = devm_reset_control_get_optional_exclusive(apb->dev, "prst");
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if (IS_ERR(apb->prst)) {
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dev_warn(apb->dev, "Couldn't get reset control line\n");
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return PTR_ERR(apb->prst);
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}
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ret = reset_control_deassert(apb->prst);
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if (ret)
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dev_err(apb->dev, "Failed to deassert the reset line\n");
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return ret;
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}
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static void bt1_apb_disable_clk(void *data)
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{
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struct bt1_apb *apb = data;
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clk_disable_unprepare(apb->pclk);
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}
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static int bt1_apb_request_clk(struct bt1_apb *apb)
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{
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int ret;
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apb->pclk = devm_clk_get(apb->dev, "pclk");
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if (IS_ERR(apb->pclk)) {
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dev_err(apb->dev, "Couldn't get APB clock descriptor\n");
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return PTR_ERR(apb->pclk);
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}
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ret = clk_prepare_enable(apb->pclk);
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if (ret) {
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dev_err(apb->dev, "Couldn't enable the APB clock\n");
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return ret;
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}
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ret = devm_add_action_or_reset(apb->dev, bt1_apb_disable_clk, apb);
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if (ret) {
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dev_err(apb->dev, "Can't add APB EHB clocks disable action\n");
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return ret;
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}
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apb->rate = clk_get_rate(apb->pclk);
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if (!apb->rate) {
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dev_err(apb->dev, "Invalid clock rate\n");
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return -EINVAL;
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}
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return 0;
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}
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static void bt1_apb_clear_irq(void *data)
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{
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struct bt1_apb *apb = data;
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regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_MASK, 0);
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}
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static int bt1_apb_request_irq(struct bt1_apb *apb)
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{
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struct platform_device *pdev = to_platform_device(apb->dev);
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int ret;
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apb->irq = platform_get_irq(pdev, 0);
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if (apb->irq < 0)
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return apb->irq;
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ret = devm_request_irq(apb->dev, apb->irq, bt1_apb_isr, IRQF_SHARED,
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"bt1-apb", apb);
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if (ret) {
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dev_err(apb->dev, "Couldn't request APB EHB IRQ\n");
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return ret;
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}
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ret = devm_add_action(apb->dev, bt1_apb_clear_irq, apb);
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if (ret) {
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dev_err(apb->dev, "Can't add APB EHB IRQs clear action\n");
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return ret;
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}
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/* Unmask IRQ and clear it' pending flag. */
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regmap_update_bits(apb->regs, APB_EHB_ISR,
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APB_EHB_ISR_PENDING | APB_EHB_ISR_MASK,
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APB_EHB_ISR_MASK);
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return 0;
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}
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static ssize_t count_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct bt1_apb *apb = dev_get_drvdata(dev);
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return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&apb->count));
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}
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static DEVICE_ATTR_RO(count);
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static ssize_t timeout_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct bt1_apb *apb = dev_get_drvdata(dev);
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unsigned long timeout;
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int ret;
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u32 n;
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ret = regmap_read(apb->regs, APB_EHB_TIMEOUT, &n);
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if (ret)
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return ret;
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timeout = bt1_apb_n_to_timeout_us(apb, n);
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return scnprintf(buf, PAGE_SIZE, "%lu\n", timeout);
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}
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static ssize_t timeout_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct bt1_apb *apb = dev_get_drvdata(dev);
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unsigned long timeout;
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int ret;
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u32 n;
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if (kstrtoul(buf, 0, &timeout) < 0)
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return -EINVAL;
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n = bt1_apb_timeout_to_n_us(apb, timeout);
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n = clamp(n, APB_EHB_TIMEOUT_MIN, APB_EHB_TIMEOUT_MAX);
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ret = regmap_write(apb->regs, APB_EHB_TIMEOUT, n);
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return ret ?: count;
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}
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static DEVICE_ATTR_RW(timeout);
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static ssize_t inject_error_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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return scnprintf(buf, PAGE_SIZE, "Error injection: nodev irq\n");
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}
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static ssize_t inject_error_store(struct device *dev,
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struct device_attribute *attr,
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const char *data, size_t count)
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{
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struct bt1_apb *apb = dev_get_drvdata(dev);
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/*
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* Either dummy read from the unmapped address in the APB IO area
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* or manually set the IRQ status.
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*/
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if (!strncmp(data, "nodev", 5))
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readl(apb->res);
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else if (!strncmp(data, "irq", 3))
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regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING,
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APB_EHB_ISR_PENDING);
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else
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return -EINVAL;
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return count;
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}
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static DEVICE_ATTR_RW(inject_error);
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static struct attribute *bt1_apb_sysfs_attrs[] = {
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&dev_attr_count.attr,
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&dev_attr_timeout.attr,
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&dev_attr_inject_error.attr,
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NULL
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};
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ATTRIBUTE_GROUPS(bt1_apb_sysfs);
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static void bt1_apb_remove_sysfs(void *data)
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{
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struct bt1_apb *apb = data;
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device_remove_groups(apb->dev, bt1_apb_sysfs_groups);
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}
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static int bt1_apb_init_sysfs(struct bt1_apb *apb)
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{
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int ret;
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ret = device_add_groups(apb->dev, bt1_apb_sysfs_groups);
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if (ret) {
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dev_err(apb->dev, "Failed to create EHB APB sysfs nodes\n");
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return ret;
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}
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ret = devm_add_action_or_reset(apb->dev, bt1_apb_remove_sysfs, apb);
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if (ret)
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dev_err(apb->dev, "Can't add APB EHB sysfs remove action\n");
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return ret;
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}
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static int bt1_apb_probe(struct platform_device *pdev)
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{
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struct bt1_apb *apb;
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int ret;
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apb = bt1_apb_create_data(pdev);
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if (IS_ERR(apb))
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return PTR_ERR(apb);
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ret = bt1_apb_request_regs(apb);
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if (ret)
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return ret;
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ret = bt1_apb_request_rst(apb);
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if (ret)
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return ret;
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ret = bt1_apb_request_clk(apb);
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if (ret)
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return ret;
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ret = bt1_apb_request_irq(apb);
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if (ret)
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return ret;
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ret = bt1_apb_init_sysfs(apb);
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if (ret)
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return ret;
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return 0;
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}
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static const struct of_device_id bt1_apb_of_match[] = {
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{ .compatible = "baikal,bt1-apb" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, bt1_apb_of_match);
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static struct platform_driver bt1_apb_driver = {
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.probe = bt1_apb_probe,
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.driver = {
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.name = "bt1-apb",
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.of_match_table = bt1_apb_of_match
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}
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};
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module_platform_driver(bt1_apb_driver);
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MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>");
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MODULE_DESCRIPTION("Baikal-T1 APB-bus driver");
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||||
MODULE_LICENSE("GPL v2");
|
||||
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Reference in New Issue