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thermal: samsung: change base_common to more meaningful base_second
On Exynos5440 and Exynos5420 there are registers common across the TMU channels. To support that, we introduced a ADDRESS_MULTIPLE flag in the driver and the 2nd set of register base and size are provided in the "reg" property of the node. As per Amit's suggestion, this patch changes the base_common to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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74429c2f03
commit
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4 changed files with 12 additions and 12 deletions
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@ -11,8 +11,8 @@
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- reg : Address range of the thermal registers. For soc's which has multiple
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instances of TMU and some registers are shared across all TMU's like
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interrupt related then 2 set of register has to supplied. First set
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belongs to each instance of TMU and second set belongs to common TMU
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registers.
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belongs to register set of TMU instance and second set belongs to
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registers shared with the TMU instance.
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- interrupts : Should contain interrupt for thermal system
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- clocks : The main clock for TMU device
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- clock-names : Thermal system clock name
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@ -41,7 +41,7 @@
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* @id: identifier of the one instance of the TMU controller.
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* @pdata: pointer to the tmu platform/configuration data
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* @base: base address of the single instance of the TMU controller.
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* @base_common: base address of the common registers of the TMU controller.
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* @base_second: base address of the common registers of the TMU controller.
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* @irq: irq number of the TMU controller.
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* @soc: id of the SOC type.
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* @irq_work: pointer to the irq work structure.
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@ -56,7 +56,7 @@ struct exynos_tmu_data {
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int id;
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struct exynos_tmu_platform_data *pdata;
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void __iomem *base;
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void __iomem *base_common;
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void __iomem *base_second;
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int irq;
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enum soc_type soc;
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struct work_struct irq_work;
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@ -298,7 +298,7 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
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}
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/*Clear the PMIN in the common TMU register*/
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if (reg->tmu_pmin && !data->id)
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writel(0, data->base_common + reg->tmu_pmin);
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writel(0, data->base_second + reg->tmu_pmin);
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out:
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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@ -455,7 +455,7 @@ static void exynos_tmu_work(struct work_struct *work)
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/* Find which sensor generated this interrupt */
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if (reg->tmu_irqstatus) {
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val_type = readl(data->base_common + reg->tmu_irqstatus);
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val_type = readl(data->base_second + reg->tmu_irqstatus);
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if (!((val_type >> data->id) & 0x1))
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goto out;
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}
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@ -580,7 +580,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
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* Check if the TMU shares some registers and then try to map the
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* memory of common registers.
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*/
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if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
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if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE))
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return 0;
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if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
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@ -588,9 +588,9 @@ static int exynos_map_dt_data(struct platform_device *pdev)
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return -ENODEV;
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}
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data->base_common = devm_ioremap(&pdev->dev, res.start,
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data->base_second = devm_ioremap(&pdev->dev, res.start,
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resource_size(&res));
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if (!data->base_common) {
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if (!data->base_second) {
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dev_err(&pdev->dev, "Failed to ioremap memory\n");
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return -ENOMEM;
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}
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@ -60,7 +60,7 @@ enum soc_type {
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* state(active/idle) can be checked.
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* TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
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* sample time.
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* TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
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* TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
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* sensors shares some common registers.
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* TMU_SUPPORT - macro to compare the above features with the supplied.
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*/
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@ -70,7 +70,7 @@ enum soc_type {
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#define TMU_SUPPORT_FALLING_TRIP BIT(3)
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#define TMU_SUPPORT_READY_STATUS BIT(4)
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#define TMU_SUPPORT_EMUL_TIME BIT(5)
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#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
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#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6)
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#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
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@ -255,7 +255,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
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.type = SOC_ARCH_EXYNOS5440, \
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.registers = &exynos5440_tmu_registers, \
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.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
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TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
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TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
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struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
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.tmu_data = {
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