mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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ASoC: Updates for v4.17
This is a *very* big release for ASoC. Not much change in the core but there s the transition of all the individual drivers over to components which is intended to support further core work. The goal is to make it easier to do further core work by removing the need to special case all the different driver classes in the core, many of the devices end up being used in multiple roles in modern systems. We also have quite a lot of new drivers added this month of all kinds, quite a few for simple devices but also some more advanced ones with more substantial code. - The biggest thing is the huge series from Morimoto-san which converted everything over to components. This is a huge change by code volume but was fairly mechanical - Many fixes for some of the Realtek based Baytrail systems covering both the CODECs and the CPUs, contributed by Hans de Goode. - Lots of cleanups for Samsung based Odroid systems from Sylwester Nawrocki. - The Freescale SSI driver also got a lot of cleanups from Nicolin Chen. - The Blackfin drivers have been removed as part of the removal of the architecture. - New drivers for AKM AK4458 and AK5558, several AMD based machines, several Intel based machines, Maxim MAX9759, Motorola CPCAP, Socionext Uniphier SoCs, and TI PCM1789 and TDA7419 -----BEGIN PGP SIGNATURE----- iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlrCUIYTHGJyb29uaWVA a2VybmVsLm9yZwAKCRAk1otyXVSH0A29B/sGkDyeoSTkvAIIu1cmVAIdpxz/MniC 2/KOVlZkIPV2WqS7wdzadJhTw8Xv/yX+By6w5dYQZyBsw9elYr/AvDomqetEwJfo 229jJGWxFbxNxgSo0gNeo5bL44ISjLK8TUw72YN3M1a15XvxF4NQwxmw3/5FYLHB i3bxUd+nBTtshnnBTZFCvraF7kgm2OT1wQJgOiD6fWD4eSrIUrnp5kmUzvkrtMEA PjKWV3k8d4xc1r5IDraX/saUYeoXQ/3cGkktWtc/AmqEf+mLI1iYpdhbAeiEqyNU mkhcuMwF4E1qaMP0GgifhWnDgEyp4GvMUYkM21EjgKrOxgraMw3NcgX9 =JfFJ -----END PGP SIGNATURE----- Merge tag 'asoc-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for v4.17 This is a *very* big release for ASoC. Not much change in the core but there s the transition of all the individual drivers over to components which is intended to support further core work. The goal is to make it easier to do further core work by removing the need to special case all the different driver classes in the core, many of the devices end up being used in multiple roles in modern systems. We also have quite a lot of new drivers added this month of all kinds, quite a few for simple devices but also some more advanced ones with more substantial code. - The biggest thing is the huge series from Morimoto-san which converted everything over to components. This is a huge change by code volume but was fairly mechanical - Many fixes for some of the Realtek based Baytrail systems covering both the CODECs and the CPUs, contributed by Hans de Goode. - Lots of cleanups for Samsung based Odroid systems from Sylwester Nawrocki. - The Freescale SSI driver also got a lot of cleanups from Nicolin Chen. - The Blackfin drivers have been removed as part of the removal of the architecture. - New drivers for AKM AK4458 and AK5558, several AMD based machines, several Intel based machines, Maxim MAX9759, Motorola CPCAP, Socionext Uniphier SoCs, and TI PCM1789 and TDA7419
This commit is contained in:
commit
903d271a3f
985 changed files with 32399 additions and 25685 deletions
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@ -1,110 +1,139 @@
|
||||||
What: /sys/class/ata_...
|
What: /sys/class/ata_...
|
||||||
Date: August 2008
|
|
||||||
Contact: Gwendal Grignou<gwendal@google.com>
|
|
||||||
Description:
|
Description:
|
||||||
|
Provide a place in sysfs for storing the ATA topology of the
|
||||||
Provide a place in sysfs for storing the ATA topology of the system. This allows
|
system. This allows retrieving various information about ATA
|
||||||
retrieving various information about ATA objects.
|
objects.
|
||||||
|
|
||||||
Files under /sys/class/ata_port
|
Files under /sys/class/ata_port
|
||||||
-------------------------------
|
-------------------------------
|
||||||
|
|
||||||
For each port, a directory ataX is created where X is the ata_port_id of
|
For each port, a directory ataX is created where X is the ata_port_id of the
|
||||||
the port. The device parent is the ata host device.
|
port. The device parent is the ata host device.
|
||||||
|
|
||||||
idle_irq (read)
|
|
||||||
|
|
||||||
Number of IRQ received by the port while idle [some ata HBA only].
|
What: /sys/class/ata_port/ataX/nr_pmp_links
|
||||||
|
What: /sys/class/ata_port/ataX/idle_irq
|
||||||
|
Date: May, 2010
|
||||||
|
KernelVersion: v2.6.37
|
||||||
|
Contact: Gwendal Grignou <gwendal@chromium.org>
|
||||||
|
Description:
|
||||||
|
nr_pmp_links: (RO) If a SATA Port Multiplier (PM) is
|
||||||
|
connected, the number of links behind it.
|
||||||
|
|
||||||
nr_pmp_links (read)
|
idle_irq: (RO) Number of IRQ received by the port while
|
||||||
|
idle [some ata HBA only].
|
||||||
|
|
||||||
If a SATA Port Multiplier (PM) is connected, number of link behind it.
|
|
||||||
|
What: /sys/class/ata_port/ataX/port_no
|
||||||
|
Date: May, 2013
|
||||||
|
KernelVersion: v3.11
|
||||||
|
Contact: Gwendal Grignou <gwendal@chromium.org>
|
||||||
|
Description:
|
||||||
|
(RO) Host local port number. While registering host controller,
|
||||||
|
port numbers are tracked based upon number of ports available on
|
||||||
|
the controller. This attribute is needed by udev for composing
|
||||||
|
persistent links in /dev/disk/by-path.
|
||||||
|
|
||||||
Files under /sys/class/ata_link
|
Files under /sys/class/ata_link
|
||||||
-------------------------------
|
-------------------------------
|
||||||
|
|
||||||
Behind each port, there is a ata_link. If there is a SATA PM in the
|
Behind each port, there is a ata_link. If there is a SATA PM in the topology, 15
|
||||||
topology, 15 ata_link objects are created.
|
ata_link objects are created.
|
||||||
|
|
||||||
If a link is behind a port, the directory name is linkX, where X is
|
If a link is behind a port, the directory name is linkX, where X is ata_port_id
|
||||||
ata_port_id of the port.
|
of the port. If a link is behind a PM, its name is linkX.Y where X is
|
||||||
If a link is behind a PM, its name is linkX.Y where X is ata_port_id
|
ata_port_id of the parent port and Y the PM port.
|
||||||
of the parent port and Y the PM port.
|
|
||||||
|
|
||||||
hw_sata_spd_limit
|
|
||||||
|
|
||||||
Maximum speed supported by the connected SATA device.
|
What: /sys/class/ata_link/linkX[.Y]/hw_sata_spd_limit
|
||||||
|
What: /sys/class/ata_link/linkX[.Y]/sata_spd_limit
|
||||||
|
What: /sys/class/ata_link/linkX[.Y]/sata_spd
|
||||||
|
Date: May, 2010
|
||||||
|
KernelVersion: v2.6.37
|
||||||
|
Contact: Gwendal Grignou <gwendal@chromium.org>
|
||||||
|
Description:
|
||||||
|
hw_sata_spd_limit: (RO) Maximum speed supported by the
|
||||||
|
connected SATA device.
|
||||||
|
|
||||||
sata_spd_limit
|
sata_spd_limit: (RO) Maximum speed imposed by libata.
|
||||||
|
|
||||||
Maximum speed imposed by libata.
|
sata_spd: (RO) Current speed of the link
|
||||||
|
eg. 1.5, 3 Gbps etc.
|
||||||
|
|
||||||
sata_spd
|
|
||||||
|
|
||||||
Current speed of the link [1.5, 3Gps,...].
|
|
||||||
|
|
||||||
Files under /sys/class/ata_device
|
Files under /sys/class/ata_device
|
||||||
---------------------------------
|
---------------------------------
|
||||||
|
|
||||||
Behind each link, up to two ata device are created.
|
Behind each link, up to two ata devices are created.
|
||||||
The name of the directory is devX[.Y].Z where:
|
The name of the directory is devX[.Y].Z where:
|
||||||
- X is ata_port_id of the port where the device is connected,
|
- X is ata_port_id of the port where the device is connected,
|
||||||
- Y the port of the PM if any, and
|
- Y the port of the PM if any, and
|
||||||
- Z the device id: for PATA, there is usually 2 devices [0,1],
|
- Z the device id: for PATA, there is usually 2 devices [0,1], only 1 for SATA.
|
||||||
only 1 for SATA.
|
|
||||||
|
|
||||||
class
|
|
||||||
Device class. Can be "ata" for disk, "atapi" for packet device,
|
|
||||||
"pmp" for PM, or "none" if no device was found behind the link.
|
|
||||||
|
|
||||||
dma_mode
|
What: /sys/class/ata_device/devX[.Y].Z/spdn_cnt
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/gscr
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/ering
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/id
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/pio_mode
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/xfer_mode
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/dma_mode
|
||||||
|
What: /sys/class/ata_device/devX[.Y].Z/class
|
||||||
|
Date: May, 2010
|
||||||
|
KernelVersion: v2.6.37
|
||||||
|
Contact: Gwendal Grignou <gwendal@chromium.org>
|
||||||
|
Description:
|
||||||
|
spdn_cnt: (RO) Number of times libata decided to lower the
|
||||||
|
speed of link due to errors.
|
||||||
|
|
||||||
Transfer modes supported by the device when in DMA mode.
|
gscr: (RO) Cached result of the dump of PM GSCR
|
||||||
Mostly used by PATA device.
|
register. Valid registers are:
|
||||||
|
|
||||||
pio_mode
|
0: SATA_PMP_GSCR_PROD_ID,
|
||||||
|
1: SATA_PMP_GSCR_REV,
|
||||||
|
2: SATA_PMP_GSCR_PORT_INFO,
|
||||||
|
32: SATA_PMP_GSCR_ERROR,
|
||||||
|
33: SATA_PMP_GSCR_ERROR_EN,
|
||||||
|
64: SATA_PMP_GSCR_FEAT,
|
||||||
|
96: SATA_PMP_GSCR_FEAT_EN,
|
||||||
|
130: SATA_PMP_GSCR_SII_GPIO
|
||||||
|
|
||||||
Transfer modes supported by the device when in PIO mode.
|
Only valid if the device is a PM.
|
||||||
Mostly used by PATA device.
|
|
||||||
|
|
||||||
xfer_mode
|
ering: (RO) Formatted output of the error ring of the
|
||||||
|
device.
|
||||||
|
|
||||||
Current transfer mode.
|
id: (RO) Cached result of IDENTIFY command, as
|
||||||
|
described in ATA8 7.16 and 7.17. Only valid if
|
||||||
|
the device is not a PM.
|
||||||
|
|
||||||
id
|
pio_mode: (RO) Transfer modes supported by the device when
|
||||||
|
in PIO mode. Mostly used by PATA device.
|
||||||
|
|
||||||
Cached result of IDENTIFY command, as described in ATA8 7.16 and 7.17.
|
xfer_mode: (RO) Current transfer mode
|
||||||
Only valid if the device is not a PM.
|
|
||||||
|
|
||||||
gscr
|
dma_mode: (RO) Transfer modes supported by the device when
|
||||||
|
in DMA mode. Mostly used by PATA device.
|
||||||
|
|
||||||
Cached result of the dump of PM GSCR register.
|
class: (RO) Device class. Can be "ata" for disk,
|
||||||
Valid registers are:
|
"atapi" for packet device, "pmp" for PM, or
|
||||||
0: SATA_PMP_GSCR_PROD_ID,
|
"none" if no device was found behind the link.
|
||||||
1: SATA_PMP_GSCR_REV,
|
|
||||||
2: SATA_PMP_GSCR_PORT_INFO,
|
|
||||||
32: SATA_PMP_GSCR_ERROR,
|
|
||||||
33: SATA_PMP_GSCR_ERROR_EN,
|
|
||||||
64: SATA_PMP_GSCR_FEAT,
|
|
||||||
96: SATA_PMP_GSCR_FEAT_EN,
|
|
||||||
130: SATA_PMP_GSCR_SII_GPIO
|
|
||||||
Only valid if the device is a PM.
|
|
||||||
|
|
||||||
trim
|
|
||||||
|
|
||||||
Shows the DSM TRIM mode currently used by the device. Valid
|
What: /sys/class/ata_device/devX[.Y].Z/trim
|
||||||
values are:
|
Date: May, 2015
|
||||||
unsupported: Drive does not support DSM TRIM
|
KernelVersion: v4.10
|
||||||
unqueued: Drive supports unqueued DSM TRIM only
|
Contact: Gwendal Grignou <gwendal@chromium.org>
|
||||||
queued: Drive supports queued DSM TRIM
|
Description:
|
||||||
forced_unqueued: Drive's queued DSM support is known to be
|
(RO) Shows the DSM TRIM mode currently used by the device. Valid
|
||||||
buggy and only unqueued TRIM commands
|
values are:
|
||||||
are sent
|
|
||||||
|
|
||||||
spdn_cnt
|
unsupported: Drive does not support DSM TRIM
|
||||||
|
|
||||||
Number of time libata decided to lower the speed of link due to errors.
|
unqueued: Drive supports unqueued DSM TRIM only
|
||||||
|
|
||||||
ering
|
queued: Drive supports queued DSM TRIM
|
||||||
|
|
||||||
Formatted output of the error ring of the device.
|
forced_unqueued: Drive's queued DSM support is known to
|
||||||
|
be buggy and only unqueued TRIM commands
|
||||||
|
are sent
|
||||||
|
|
58
Documentation/ABI/testing/sysfs-block-device
Normal file
58
Documentation/ABI/testing/sysfs-block-device
Normal file
|
@ -0,0 +1,58 @@
|
||||||
|
What: /sys/block/*/device/sw_activity
|
||||||
|
Date: Jun, 2008
|
||||||
|
KernelVersion: v2.6.27
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RW) Used by drivers which support software controlled activity
|
||||||
|
LEDs.
|
||||||
|
|
||||||
|
It has the following valid values:
|
||||||
|
|
||||||
|
0 OFF - the LED is not activated on activity
|
||||||
|
1 BLINK_ON - the LED blinks on every 10ms when activity is
|
||||||
|
detected.
|
||||||
|
2 BLINK_OFF - the LED is on when idle, and blinks off
|
||||||
|
every 10ms when activity is detected.
|
||||||
|
|
||||||
|
Note that the user must turn sw_activity OFF it they wish to
|
||||||
|
control the activity LED via the em_message file.
|
||||||
|
|
||||||
|
|
||||||
|
What: /sys/block/*/device/unload_heads
|
||||||
|
Date: Sep, 2008
|
||||||
|
KernelVersion: v2.6.28
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RW) Hard disk shock protection
|
||||||
|
|
||||||
|
Writing an integer value to this file will take the heads of the
|
||||||
|
respective drive off the platter and block all I/O operations
|
||||||
|
for the specified number of milliseconds.
|
||||||
|
|
||||||
|
- If the device does not support the unload heads feature,
|
||||||
|
access is denied with -EOPNOTSUPP.
|
||||||
|
- The maximal value accepted for a timeout is 30000
|
||||||
|
milliseconds.
|
||||||
|
- A previously set timeout can be cancelled and disk can resume
|
||||||
|
normal operation immediately by specifying a timeout of 0.
|
||||||
|
- Some hard drives only comply with an earlier version of the
|
||||||
|
ATA standard, but support the unload feature nonetheless.
|
||||||
|
There is no safe way Linux can detect these devices, so this
|
||||||
|
is not enabled by default. If it is known that your device
|
||||||
|
does support the unload feature, then you can tell the kernel
|
||||||
|
to enable it by writing -1. It can be disabled again by
|
||||||
|
writing -2.
|
||||||
|
- Values below -2 are rejected with -EINVAL
|
||||||
|
|
||||||
|
For more information, see
|
||||||
|
Documentation/laptops/disk-shock-protection.txt
|
||||||
|
|
||||||
|
|
||||||
|
What: /sys/block/*/device/ncq_prio_enable
|
||||||
|
Date: Oct, 2016
|
||||||
|
KernelVersion: v4.10
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RW) Write to the file to turn on or off the SATA ncq (native
|
||||||
|
command queueing) support. By default this feature is turned
|
||||||
|
off.
|
|
@ -27,3 +27,92 @@ Description: This file contains the current status of the "SSD Smart Path"
|
||||||
the direct i/o path to physical devices. This setting is
|
the direct i/o path to physical devices. This setting is
|
||||||
controller wide, affecting all configured logical drives on the
|
controller wide, affecting all configured logical drives on the
|
||||||
controller. This file is readable and writable.
|
controller. This file is readable and writable.
|
||||||
|
|
||||||
|
What: /sys/class/scsi_host/hostX/link_power_management_policy
|
||||||
|
Date: Oct, 2007
|
||||||
|
KernelVersion: v2.6.24
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RW) This parameter allows the user to read and set the link
|
||||||
|
(interface) power management.
|
||||||
|
|
||||||
|
There are four possible options:
|
||||||
|
|
||||||
|
min_power: Tell the controller to try to make the link use the
|
||||||
|
least possible power when possible. This may sacrifice some
|
||||||
|
performance due to increased latency when coming out of lower
|
||||||
|
power states.
|
||||||
|
|
||||||
|
max_performance: Generally, this means no power management.
|
||||||
|
Tell the controller to have performance be a priority over power
|
||||||
|
management.
|
||||||
|
|
||||||
|
medium_power: Tell the controller to enter a lower power state
|
||||||
|
when possible, but do not enter the lowest power state, thus
|
||||||
|
improving latency over min_power setting.
|
||||||
|
|
||||||
|
med_power_with_dipm: Identical to the existing medium_power
|
||||||
|
setting except that it enables dipm (device initiated power
|
||||||
|
management) on top, which makes it match the Windows IRST (Intel
|
||||||
|
Rapid Storage Technology) driver settings. This setting is also
|
||||||
|
close to min_power, except that:
|
||||||
|
a) It does not use host-initiated slumber mode, but it does
|
||||||
|
allow device-initiated slumber
|
||||||
|
b) It does not enable low power device sleep mode (DevSlp).
|
||||||
|
|
||||||
|
What: /sys/class/scsi_host/hostX/em_message
|
||||||
|
What: /sys/class/scsi_host/hostX/em_message_type
|
||||||
|
Date: Jun, 2008
|
||||||
|
KernelVersion: v2.6.27
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
em_message: (RW) Enclosure management support. For the LED
|
||||||
|
protocol, writes and reads correspond to the LED message format
|
||||||
|
as defined in the AHCI spec.
|
||||||
|
|
||||||
|
The user must turn sw_activity (under /sys/block/*/device/) OFF
|
||||||
|
it they wish to control the activity LED via the em_message
|
||||||
|
file.
|
||||||
|
|
||||||
|
em_message_type: (RO) Displays the current enclosure management
|
||||||
|
protocol that is being used by the driver (for eg. LED, SAF-TE,
|
||||||
|
SES-2, SGPIO etc).
|
||||||
|
|
||||||
|
What: /sys/class/scsi_host/hostX/ahci_port_cmd
|
||||||
|
What: /sys/class/scsi_host/hostX/ahci_host_caps
|
||||||
|
What: /sys/class/scsi_host/hostX/ahci_host_cap2
|
||||||
|
Date: Mar, 2010
|
||||||
|
KernelVersion: v2.6.35
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
[to be documented]
|
||||||
|
|
||||||
|
What: /sys/class/scsi_host/hostX/ahci_host_version
|
||||||
|
Date: Mar, 2010
|
||||||
|
KernelVersion: v2.6.35
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RO) Display the version of the AHCI spec implemented by the
|
||||||
|
host.
|
||||||
|
|
||||||
|
What: /sys/class/scsi_host/hostX/em_buffer
|
||||||
|
Date: Apr, 2010
|
||||||
|
KernelVersion: v2.6.35
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RW) Allows access to AHCI EM (enclosure management) buffer
|
||||||
|
directly if the host supports EM.
|
||||||
|
|
||||||
|
For eg. the AHCI driver supports SGPIO EM messages but the
|
||||||
|
SATA/AHCI specs do not define the SGPIO message format of the EM
|
||||||
|
buffer. Different hardware(HW) vendors may have different
|
||||||
|
definitions. With the em_buffer attribute, this issue can be
|
||||||
|
solved by allowing HW vendors to provide userland drivers and
|
||||||
|
tools for their SGPIO initiators.
|
||||||
|
|
||||||
|
What: /sys/class/scsi_host/hostX/em_message_supported
|
||||||
|
Date: Oct, 2009
|
||||||
|
KernelVersion: v2.6.39
|
||||||
|
Contact: linux-ide@vger.kernel.org
|
||||||
|
Description:
|
||||||
|
(RO) Displays supported enclosure management message types.
|
||||||
|
|
|
@ -16,6 +16,7 @@ Required properties:
|
||||||
- ddc: phandle to the hdmi ddc node
|
- ddc: phandle to the hdmi ddc node
|
||||||
- phy: phandle to the hdmi phy node
|
- phy: phandle to the hdmi phy node
|
||||||
- samsung,syscon-phandle: phandle for system controller node for PMU.
|
- samsung,syscon-phandle: phandle for system controller node for PMU.
|
||||||
|
- #sound-dai-cells: should be 0.
|
||||||
|
|
||||||
Required properties for Exynos 4210, 4212, 5420 and 5433:
|
Required properties for Exynos 4210, 4212, 5420 and 5433:
|
||||||
- clocks: list of clock IDs from SoC clock driver.
|
- clocks: list of clock IDs from SoC clock driver.
|
||||||
|
|
|
@ -3,11 +3,11 @@ Device-Tree bindings for sigma delta modulator
|
||||||
Required properties:
|
Required properties:
|
||||||
- compatible: should be "ads1201", "sd-modulator". "sd-modulator" can be use
|
- compatible: should be "ads1201", "sd-modulator". "sd-modulator" can be use
|
||||||
as a generic SD modulator if modulator not specified in compatible list.
|
as a generic SD modulator if modulator not specified in compatible list.
|
||||||
- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers".
|
- #io-channel-cells = <0>: See the IIO bindings section "IIO consumers".
|
||||||
|
|
||||||
Example node:
|
Example node:
|
||||||
|
|
||||||
ads1202: adc@0 {
|
ads1202: adc@0 {
|
||||||
compatible = "sd-modulator";
|
compatible = "sd-modulator";
|
||||||
#io-channel-cells = <1>;
|
#io-channel-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -50,14 +50,15 @@ Example:
|
||||||
compatible = "marvell,mv88e6085";
|
compatible = "marvell,mv88e6085";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||||
};
|
|
||||||
mdio {
|
mdio {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
switch1phy0: switch1phy0@0 {
|
switch1phy0: switch1phy0@0 {
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
interrupt-parent = <&switch0>;
|
interrupt-parent = <&switch0>;
|
||||||
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -74,23 +75,24 @@ Example:
|
||||||
compatible = "marvell,mv88e6390";
|
compatible = "marvell,mv88e6390";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||||
};
|
|
||||||
mdio {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
switch1phy0: switch1phy0@0 {
|
|
||||||
reg = <0>;
|
|
||||||
interrupt-parent = <&switch0>;
|
|
||||||
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
mdio1 {
|
mdio {
|
||||||
compatible = "marvell,mv88e6xxx-mdio-external";
|
#address-cells = <1>;
|
||||||
#address-cells = <1>;
|
#size-cells = <0>;
|
||||||
#size-cells = <0>;
|
switch1phy0: switch1phy0@0 {
|
||||||
switch1phy9: switch1phy0@9 {
|
reg = <0>;
|
||||||
reg = <9>;
|
interrupt-parent = <&switch0>;
|
||||||
|
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mdio1 {
|
||||||
|
compatible = "marvell,mv88e6xxx-mdio-external";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
switch1phy9: switch1phy0@9 {
|
||||||
|
reg = <9>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -27,7 +27,11 @@ Required properties:
|
||||||
SoC-specific version corresponding to the platform first followed by
|
SoC-specific version corresponding to the platform first followed by
|
||||||
the generic version.
|
the generic version.
|
||||||
|
|
||||||
- reg: offset and length of (1) the register block and (2) the stream buffer.
|
- reg: Offset and length of (1) the register block and (2) the stream buffer.
|
||||||
|
The region for the register block is mandatory.
|
||||||
|
The region for the stream buffer is optional, as it is only present on
|
||||||
|
R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A7796),
|
||||||
|
and M3-N (R8A77965).
|
||||||
- interrupts: A list of interrupt-specifiers, one for each entry in
|
- interrupts: A list of interrupt-specifiers, one for each entry in
|
||||||
interrupt-names.
|
interrupt-names.
|
||||||
If interrupt-names is not present, an interrupt specifier
|
If interrupt-names is not present, an interrupt specifier
|
||||||
|
|
23
Documentation/devicetree/bindings/sound/ak4458.txt
Normal file
23
Documentation/devicetree/bindings/sound/ak4458.txt
Normal file
|
@ -0,0 +1,23 @@
|
||||||
|
AK4458 audio DAC
|
||||||
|
|
||||||
|
This device supports I2C mode.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible : "asahi-kasei,ak4458"
|
||||||
|
- reg : The I2C address of the device for I2C
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- reset-gpios: A GPIO specifier for the power down & reset pin
|
||||||
|
- mute-gpios: A GPIO specifier for the soft mute pin
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
&i2c {
|
||||||
|
ak4458: dac@10 {
|
||||||
|
compatible = "asahi-kasei,ak4458";
|
||||||
|
reg = <0x10>;
|
||||||
|
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>
|
||||||
|
mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>
|
||||||
|
};
|
||||||
|
};
|
22
Documentation/devicetree/bindings/sound/ak5558.txt
Normal file
22
Documentation/devicetree/bindings/sound/ak5558.txt
Normal file
|
@ -0,0 +1,22 @@
|
||||||
|
AK5558 8 channel differential 32-bit delta-sigma ADC
|
||||||
|
|
||||||
|
This device supports I2C mode only.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible : "asahi-kasei,ak5558"
|
||||||
|
- reg : The I2C address of the device.
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
- reset-gpios: A GPIO specifier for the power down & reset pin.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
&i2c {
|
||||||
|
ak5558: adc@10 {
|
||||||
|
compatible = "asahi-kasei,ak5558";
|
||||||
|
reg = <0x10>;
|
||||||
|
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
};
|
|
@ -25,6 +25,9 @@ Optional properties:
|
||||||
interrupt is to be used to wake system, otherwise "irq" should be used.
|
interrupt is to be used to wake system, otherwise "irq" should be used.
|
||||||
- wakeup-source: Flag to indicate this device can wake system (suspend/resume).
|
- wakeup-source: Flag to indicate this device can wake system (suspend/resume).
|
||||||
|
|
||||||
|
- #clock-cells : Should be set to '<0>', only one clock source provided;
|
||||||
|
- clock-output-names : Name given for DAI clocks output;
|
||||||
|
|
||||||
- clocks : phandle and clock specifier for codec MCLK.
|
- clocks : phandle and clock specifier for codec MCLK.
|
||||||
- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
|
- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
|
||||||
|
|
||||||
|
@ -83,6 +86,9 @@ Example:
|
||||||
VDDMIC-supply = <®_audio>;
|
VDDMIC-supply = <®_audio>;
|
||||||
VDDIO-supply = <®_audio>;
|
VDDIO-supply = <®_audio>;
|
||||||
|
|
||||||
|
#clock-cells = <0>;
|
||||||
|
clock-output-names = "dai-clks";
|
||||||
|
|
||||||
clocks = <&clks 201>;
|
clocks = <&clks 201>;
|
||||||
clock-names = "mclk";
|
clock-names = "mclk";
|
||||||
|
|
||||||
|
|
|
@ -8,6 +8,7 @@ Required properties:
|
||||||
Optional properties:
|
Optional properties:
|
||||||
- dmicen-gpios: GPIO specifier for dmic to control start and stop
|
- dmicen-gpios: GPIO specifier for dmic to control start and stop
|
||||||
- num-channels: Number of microphones on this DAI
|
- num-channels: Number of microphones on this DAI
|
||||||
|
- wakeup-delay-ms: Delay (in ms) after enabling the DMIC
|
||||||
|
|
||||||
Example node:
|
Example node:
|
||||||
|
|
||||||
|
@ -15,4 +16,5 @@ Example node:
|
||||||
compatible = "dmic-codec";
|
compatible = "dmic-codec";
|
||||||
dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
|
dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
|
||||||
num-channels = <1>;
|
num-channels = <1>;
|
||||||
|
wakeup-delay-ms <50>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -28,7 +28,6 @@ The compatible list for this generic sound card currently:
|
||||||
(compatible with CS4271 and CS4272)
|
(compatible with CS4271 and CS4272)
|
||||||
|
|
||||||
"fsl,imx-audio-wm8962"
|
"fsl,imx-audio-wm8962"
|
||||||
(compatible with Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt)
|
|
||||||
|
|
||||||
"fsl,imx-audio-sgtl5000"
|
"fsl,imx-audio-sgtl5000"
|
||||||
(compatible with Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt)
|
(compatible with Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt)
|
||||||
|
|
|
@ -1,53 +0,0 @@
|
||||||
Freescale i.MX audio complex with WM8962 codec
|
|
||||||
|
|
||||||
Required properties:
|
|
||||||
|
|
||||||
- compatible : "fsl,imx-audio-wm8962"
|
|
||||||
|
|
||||||
- model : The user-visible name of this sound complex
|
|
||||||
|
|
||||||
- ssi-controller : The phandle of the i.MX SSI controller
|
|
||||||
|
|
||||||
- audio-codec : The phandle of the WM8962 audio codec
|
|
||||||
|
|
||||||
- audio-routing : A list of the connections between audio components.
|
|
||||||
Each entry is a pair of strings, the first being the
|
|
||||||
connection's sink, the second being the connection's
|
|
||||||
source. Valid names could be power supplies, WM8962
|
|
||||||
pins, and the jacks on the board:
|
|
||||||
|
|
||||||
Power supplies:
|
|
||||||
* Mic Bias
|
|
||||||
|
|
||||||
Board connectors:
|
|
||||||
* Mic Jack
|
|
||||||
* Headphone Jack
|
|
||||||
* Ext Spk
|
|
||||||
|
|
||||||
- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
|
|
||||||
|
|
||||||
- mux-ext-port : The external port of the i.MX audio muxer
|
|
||||||
|
|
||||||
Note: The AUDMUX port numbering should start at 1, which is consistent with
|
|
||||||
hardware manual.
|
|
||||||
|
|
||||||
Example:
|
|
||||||
|
|
||||||
sound {
|
|
||||||
compatible = "fsl,imx6q-sabresd-wm8962",
|
|
||||||
"fsl,imx-audio-wm8962";
|
|
||||||
model = "wm8962-audio";
|
|
||||||
ssi-controller = <&ssi2>;
|
|
||||||
audio-codec = <&codec>;
|
|
||||||
audio-routing =
|
|
||||||
"Headphone Jack", "HPOUTL",
|
|
||||||
"Headphone Jack", "HPOUTR",
|
|
||||||
"Ext Spk", "SPKOUTL",
|
|
||||||
"Ext Spk", "SPKOUTR",
|
|
||||||
"MICBIAS", "AMIC",
|
|
||||||
"IN3R", "MICBIAS",
|
|
||||||
"DMIC", "MICBIAS",
|
|
||||||
"DMICDAT", "DMIC";
|
|
||||||
mux-int-port = <2>;
|
|
||||||
mux-ext-port = <3>;
|
|
||||||
};
|
|
|
@ -16,6 +16,8 @@ Optional properties:
|
||||||
|
|
||||||
- clock-names: Should be "mclk"
|
- clock-names: Should be "mclk"
|
||||||
|
|
||||||
|
- #sound-dai-cells : should be 0.
|
||||||
|
|
||||||
- maxim,dmic-freq: Frequency at which to clock DMIC
|
- maxim,dmic-freq: Frequency at which to clock DMIC
|
||||||
|
|
||||||
- maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:
|
- maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:
|
||||||
|
|
18
Documentation/devicetree/bindings/sound/maxim,max9759.txt
Normal file
18
Documentation/devicetree/bindings/sound/maxim,max9759.txt
Normal file
|
@ -0,0 +1,18 @@
|
||||||
|
Maxim MAX9759 Speaker Amplifier
|
||||||
|
===============================
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : "maxim,max9759"
|
||||||
|
- shutdown-gpios : the gpio connected to the shutdown pin
|
||||||
|
- mute-gpios : the gpio connected to the mute pin
|
||||||
|
- gain-gpios : the 2 gpios connected to the g1 and g2 pins
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
max9759: analog-amplifier {
|
||||||
|
compatible = "maxim,max9759";
|
||||||
|
shutdown-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||||
|
mute-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||||
|
gain-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>,
|
||||||
|
<&gpio3 25 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
|
@ -53,7 +53,7 @@ See ../arm/mediatek/mediatek,audsys.txt for details about the parent node.
|
||||||
Example:
|
Example:
|
||||||
|
|
||||||
audsys: audio-subsystem@11220000 {
|
audsys: audio-subsystem@11220000 {
|
||||||
compatible = "mediatek,mt2701-audsys", "syscon", "simple-mfd";
|
compatible = "mediatek,mt2701-audsys", "syscon";
|
||||||
...
|
...
|
||||||
|
|
||||||
afe: audio-controller {
|
afe: audio-controller {
|
||||||
|
|
22
Documentation/devicetree/bindings/sound/pcm1789.txt
Normal file
22
Documentation/devicetree/bindings/sound/pcm1789.txt
Normal file
|
@ -0,0 +1,22 @@
|
||||||
|
Texas Instruments pcm1789 DT bindings
|
||||||
|
|
||||||
|
PCM1789 is a simple audio codec that can be connected via
|
||||||
|
I2C or SPI. Currently, only I2C bus is supported.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible: "ti,pcm1789"
|
||||||
|
|
||||||
|
Required properties on I2C:
|
||||||
|
|
||||||
|
- reg: the I2C address
|
||||||
|
- reset-gpios: GPIO to control the RESET pin
|
||||||
|
|
||||||
|
Examples:
|
||||||
|
|
||||||
|
audio-codec@4c {
|
||||||
|
compatible = "ti,pcm1789";
|
||||||
|
reg = <0x4c>;
|
||||||
|
reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
|
||||||
|
#sound-dai-cells = <0>;
|
||||||
|
};
|
|
@ -351,6 +351,7 @@ Required properties:
|
||||||
- "renesas,rcar_sound-r8a7793" (R-Car M2-N)
|
- "renesas,rcar_sound-r8a7793" (R-Car M2-N)
|
||||||
- "renesas,rcar_sound-r8a7794" (R-Car E2)
|
- "renesas,rcar_sound-r8a7794" (R-Car E2)
|
||||||
- "renesas,rcar_sound-r8a7795" (R-Car H3)
|
- "renesas,rcar_sound-r8a7795" (R-Car H3)
|
||||||
|
- "renesas,rcar_sound-r8a7796" (R-Car M3-W)
|
||||||
- reg : Should contain the register physical address.
|
- reg : Should contain the register physical address.
|
||||||
required register is
|
required register is
|
||||||
SRU/ADG/SSI if generation1
|
SRU/ADG/SSI if generation1
|
||||||
|
|
|
@ -22,7 +22,7 @@ Optionnal properties:
|
||||||
Example:
|
Example:
|
||||||
|
|
||||||
sound {
|
sound {
|
||||||
compatible = "rockchip,rockchip-audio-es8388";
|
compatible = "rockchip,rk3288-hdmi-analog";
|
||||||
rockchip,model = "Analog audio output";
|
rockchip,model = "Analog audio output";
|
||||||
rockchip,i2s-controller = <&i2s>;
|
rockchip,i2s-controller = <&i2s>;
|
||||||
rockchip,audio-codec = <&es8388>;
|
rockchip,audio-codec = <&es8388>;
|
||||||
|
|
29
Documentation/devicetree/bindings/sound/rohm,bd28623.txt
Normal file
29
Documentation/devicetree/bindings/sound/rohm,bd28623.txt
Normal file
|
@ -0,0 +1,29 @@
|
||||||
|
ROHM BD28623MUV Class D speaker amplifier for digital input
|
||||||
|
|
||||||
|
This codec does not have any control buses such as I2C, it detect format and
|
||||||
|
rate of I2S signal automatically. It has two signals that can be connected
|
||||||
|
to GPIOs: reset and mute.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : should be "rohm,bd28623"
|
||||||
|
- #sound-dai-cells: should be 0.
|
||||||
|
- VCCA-supply : regulator phandle for the VCCA supply
|
||||||
|
- VCCP1-supply : regulator phandle for the VCCP1 supply
|
||||||
|
- VCCP2-supply : regulator phandle for the VCCP2 supply
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- reset-gpios : GPIO specifier for the active low reset line
|
||||||
|
- mute-gpios : GPIO specifier for the active low mute line
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
codec {
|
||||||
|
compatible = "rohm,bd28623";
|
||||||
|
#sound-dai-cells = <0>;
|
||||||
|
|
||||||
|
VCCA-supply = <&vcc_reg>;
|
||||||
|
VCCP1-supply = <&vcc_reg>;
|
||||||
|
VCCP2-supply = <&vcc_reg>;
|
||||||
|
reset-gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
|
||||||
|
mute-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
|
@ -16,6 +16,23 @@ Optional properties:
|
||||||
- realtek,dmic-en
|
- realtek,dmic-en
|
||||||
Boolean. true if dmic is used.
|
Boolean. true if dmic is used.
|
||||||
|
|
||||||
|
- realtek,jack-detect-source
|
||||||
|
u32. Valid values:
|
||||||
|
1: Use JD1_1 pin for jack-detect
|
||||||
|
2: Use JD1_2 pin for jack-detect
|
||||||
|
3: Use JD2 pin for jack-detect
|
||||||
|
|
||||||
|
- realtek,over-current-threshold-microamp
|
||||||
|
u32, micbias over-current detection threshold in µA, valid values are
|
||||||
|
600, 1500 and 2000µA.
|
||||||
|
|
||||||
|
- realtek,over-current-scale-factor
|
||||||
|
u32, micbias over-current detection scale-factor, valid values are:
|
||||||
|
0: Scale current by 0.5
|
||||||
|
1: Scale current by 0.75
|
||||||
|
2: Scale current by 1.0
|
||||||
|
3: Scale current by 1.5
|
||||||
|
|
||||||
Pins on the device (for linking into audio routes) for RT5651:
|
Pins on the device (for linking into audio routes) for RT5651:
|
||||||
|
|
||||||
* DMIC L1
|
* DMIC L1
|
||||||
|
|
|
@ -1,10 +1,10 @@
|
||||||
RT5665/RT5666/RT5668 audio CODEC
|
RT5665/RT5666 audio CODEC
|
||||||
|
|
||||||
This device supports I2C only.
|
This device supports I2C only.
|
||||||
|
|
||||||
Required properties:
|
Required properties:
|
||||||
|
|
||||||
- compatible : One of "realtek,rt5665", "realtek,rt5666" or "realtek,rt5668".
|
- compatible : One of "realtek,rt5665", "realtek,rt5666".
|
||||||
|
|
||||||
- reg : The I2C address of the device.
|
- reg : The I2C address of the device.
|
||||||
|
|
||||||
|
|
|
@ -2,8 +2,10 @@ Samsung Exynos Odroid XU3/XU4 audio complex with MAX98090 codec
|
||||||
|
|
||||||
Required properties:
|
Required properties:
|
||||||
|
|
||||||
- compatible - "samsung,odroidxu3-audio" - for Odroid XU3 board,
|
- compatible - "hardkernel,odroid-xu3-audio" - for Odroid XU3 board,
|
||||||
"samsung,odroidxu4-audio" - for Odroid XU4 board
|
"hardkernel,odroid-xu4-audio" - for Odroid XU4 board (deprecated),
|
||||||
|
"samsung,odroid-xu3-audio" - for Odroid XU3 board (deprecated),
|
||||||
|
"samsung,odroid-xu4-audio" - for Odroid XU4 board (deprecated)
|
||||||
- model - the user-visible name of this sound complex
|
- model - the user-visible name of this sound complex
|
||||||
- clocks - should contain entries matching clock names in the clock-names
|
- clocks - should contain entries matching clock names in the clock-names
|
||||||
property
|
property
|
||||||
|
@ -35,7 +37,7 @@ Required sub-nodes:
|
||||||
Example:
|
Example:
|
||||||
|
|
||||||
sound {
|
sound {
|
||||||
compatible = "samsung,odroidxu3-audio";
|
compatible = "hardkernel,odroid-xu3-audio";
|
||||||
model = "Odroid-XU3";
|
model = "Odroid-XU3";
|
||||||
samsung,audio-routing =
|
samsung,audio-routing =
|
||||||
"Headphone Jack", "HPL",
|
"Headphone Jack", "HPL",
|
||||||
|
|
|
@ -4,9 +4,13 @@ Required properties:
|
||||||
|
|
||||||
- compatible : "samsung,tm2-audio"
|
- compatible : "samsung,tm2-audio"
|
||||||
- model : the user-visible name of this sound complex
|
- model : the user-visible name of this sound complex
|
||||||
- audio-codec : the phandle of the wm5110 audio codec node,
|
- audio-codec : the first entry should be phandle of the wm5110 audio
|
||||||
as described in ../mfd/arizona.txt
|
codec node, as described in ../mfd/arizona.txt;
|
||||||
- i2s-controller : the phandle of the I2S controller
|
the second entry should be phandle of the HDMI
|
||||||
|
transmitter node
|
||||||
|
- i2s-controller : the list of phandle and argument tuples pointing to
|
||||||
|
I2S controllers, the first entry should be I2S0 and
|
||||||
|
the second one I2S1
|
||||||
- audio-amplifier : the phandle of the MAX98504 amplifier
|
- audio-amplifier : the phandle of the MAX98504 amplifier
|
||||||
- samsung,audio-routing : a list of the connections between audio components;
|
- samsung,audio-routing : a list of the connections between audio components;
|
||||||
each entry is a pair of strings, the first being the
|
each entry is a pair of strings, the first being the
|
||||||
|
@ -22,8 +26,8 @@ Example:
|
||||||
|
|
||||||
sound {
|
sound {
|
||||||
compatible = "samsung,tm2-audio";
|
compatible = "samsung,tm2-audio";
|
||||||
audio-codec = <&wm5110>;
|
audio-codec = <&wm5110>, <&hdmi>;
|
||||||
i2s-controller = <&i2s0>;
|
i2s-controller = <&i2s0 0>, <&i2s1 0>;
|
||||||
audio-amplifier = <&max98504>;
|
audio-amplifier = <&max98504>;
|
||||||
mic-bias-gpios = <&gpr3 2 0>;
|
mic-bias-gpios = <&gpr3 2 0>;
|
||||||
model = "wm5110";
|
model = "wm5110";
|
||||||
|
|
|
@ -7,7 +7,7 @@ Required SoC Specific Properties:
|
||||||
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
|
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
|
||||||
secondary fifo, s/w reset control and internal mux for root clk src.
|
secondary fifo, s/w reset control and internal mux for root clk src.
|
||||||
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
|
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
|
||||||
playback, sterio channel capture, secondary fifo using internal
|
playback, stereo channel capture, secondary fifo using internal
|
||||||
or external dma, s/w reset control, internal mux for root clk src
|
or external dma, s/w reset control, internal mux for root clk src
|
||||||
and 7.1 channel TDM support for playback. TDM (Time division multiplexing)
|
and 7.1 channel TDM support for playback. TDM (Time division multiplexing)
|
||||||
is to allow transfer of multiple channel audio data on single data line.
|
is to allow transfer of multiple channel audio data on single data line.
|
||||||
|
@ -25,7 +25,7 @@ Required SoC Specific Properties:
|
||||||
These strings correspond 1:1 with the ordered pairs in dmas.
|
These strings correspond 1:1 with the ordered pairs in dmas.
|
||||||
- clocks: Handle to iis clock and RCLK source clk.
|
- clocks: Handle to iis clock and RCLK source clk.
|
||||||
- clock-names:
|
- clock-names:
|
||||||
i2s0 uses some base clks from CMU and some are from audio subsystem internal
|
i2s0 uses some base clocks from CMU and some are from audio subsystem internal
|
||||||
clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
|
clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
|
||||||
"i2s_opclk1" as shown in the example below.
|
"i2s_opclk1" as shown in the example below.
|
||||||
i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
|
i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
|
||||||
|
@ -36,9 +36,9 @@ Required SoC Specific Properties:
|
||||||
- #clock-cells: should be 1, this property must be present if the I2S device
|
- #clock-cells: should be 1, this property must be present if the I2S device
|
||||||
is a clock provider in terms of the common clock bindings, described in
|
is a clock provider in terms of the common clock bindings, described in
|
||||||
../clock/clock-bindings.txt.
|
../clock/clock-bindings.txt.
|
||||||
- clock-output-names: from the common clock bindings, names of the CDCLK
|
- clock-output-names (deprecated): from the common clock bindings, names of
|
||||||
I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",
|
the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",
|
||||||
"i2s_cdclk3" for the I2S0, I2S1, I2S2 devices recpectively.
|
"i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively.
|
||||||
|
|
||||||
There are following clocks available at the I2S device nodes:
|
There are following clocks available at the I2S device nodes:
|
||||||
CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock,
|
CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock,
|
||||||
|
@ -49,9 +49,10 @@ There are following clocks available at the I2S device nodes:
|
||||||
|
|
||||||
Refer to the SoC datasheet for availability of the above clocks.
|
Refer to the SoC datasheet for availability of the above clocks.
|
||||||
The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available
|
The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available
|
||||||
in the IIS Multi Audio Interface (I2S0).
|
in the IIS Multi Audio Interface.
|
||||||
Note: Old DTs may not have the #clock-cells, clock-output-names properties
|
|
||||||
and then not use the I2S node as a clock supplier.
|
Note: Old DTs may not have the #clock-cells property and then not use the I2S
|
||||||
|
node as a clock supplier.
|
||||||
|
|
||||||
Optional SoC Specific Properties:
|
Optional SoC Specific Properties:
|
||||||
|
|
||||||
|
@ -59,6 +60,7 @@ Optional SoC Specific Properties:
|
||||||
sub system(used in secondary sound source).
|
sub system(used in secondary sound source).
|
||||||
- pinctrl-0: Should specify pin control groups used for this controller.
|
- pinctrl-0: Should specify pin control groups used for this controller.
|
||||||
- pinctrl-names: Should contain only one value - "default".
|
- pinctrl-names: Should contain only one value - "default".
|
||||||
|
- #sound-dai-cells: should be 1.
|
||||||
|
|
||||||
|
|
||||||
Example:
|
Example:
|
||||||
|
@ -74,9 +76,9 @@ i2s0: i2s@3830000 {
|
||||||
<&clock_audss EXYNOS_I2S_BUS>,
|
<&clock_audss EXYNOS_I2S_BUS>,
|
||||||
<&clock_audss EXYNOS_SCLK_I2S>;
|
<&clock_audss EXYNOS_SCLK_I2S>;
|
||||||
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
|
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
|
||||||
#clock-cells;
|
#clock-cells = <1>;
|
||||||
clock-output-names = "i2s_cdclk0";
|
|
||||||
samsung,idma-addr = <0x03000000>;
|
samsung,idma-addr = <0x03000000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&i2s0_bus>;
|
pinctrl-0 = <&i2s0_bus>;
|
||||||
|
#sound-dai-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -5,6 +5,8 @@ Required properties:
|
||||||
|
|
||||||
- reg : the I2C address of the device
|
- reg : the I2C address of the device
|
||||||
|
|
||||||
|
- #sound-dai-cells: must be equal to 0
|
||||||
|
|
||||||
- clocks : the clock provider of SYS_MCLK
|
- clocks : the clock provider of SYS_MCLK
|
||||||
|
|
||||||
- VDDA-supply : the regulator provider of VDDA
|
- VDDA-supply : the regulator provider of VDDA
|
||||||
|
@ -40,6 +42,7 @@ Example:
|
||||||
codec: sgtl5000@a {
|
codec: sgtl5000@a {
|
||||||
compatible = "fsl,sgtl5000";
|
compatible = "fsl,sgtl5000";
|
||||||
reg = <0x0a>;
|
reg = <0x0a>;
|
||||||
|
#sound-dai-cells = <0>;
|
||||||
clocks = <&clks 150>;
|
clocks = <&clks 150>;
|
||||||
micbias-resistor-k-ohms = <2>;
|
micbias-resistor-k-ohms = <2>;
|
||||||
micbias-voltage-m-volts = <2250>;
|
micbias-voltage-m-volts = <2250>;
|
||||||
|
|
|
@ -5,8 +5,17 @@ Required properties:
|
||||||
"google,snow-audio-max98090" or
|
"google,snow-audio-max98090" or
|
||||||
"google,snow-audio-max98091" or
|
"google,snow-audio-max98091" or
|
||||||
"google,snow-audio-max98095"
|
"google,snow-audio-max98095"
|
||||||
- samsung,i2s-controller: The phandle of the Samsung I2S controller
|
- samsung,i2s-controller (deprecated): The phandle of the Samsung I2S controller
|
||||||
- samsung,audio-codec: The phandle of the audio codec
|
- samsung,audio-codec (deprecated): The phandle of the audio codec
|
||||||
|
|
||||||
|
Required sub-nodes:
|
||||||
|
|
||||||
|
- 'cpu' subnode with a 'sound-dai' property containing the phandle of the I2S
|
||||||
|
controller
|
||||||
|
- 'codec' subnode with a 'sound-dai' property containing list of phandles
|
||||||
|
to the CODEC nodes, first entry must be the phandle of the MAX98090,
|
||||||
|
MAX98091 or MAX98095 CODEC (exact device type is indicated by the compatible
|
||||||
|
string) and the second entry must be the phandle of the HDMI IP block node
|
||||||
|
|
||||||
Optional:
|
Optional:
|
||||||
- samsung,model: The name of the sound-card
|
- samsung,model: The name of the sound-card
|
||||||
|
|
|
@ -45,6 +45,12 @@ SAI subnodes Optional properties:
|
||||||
This property sets SAI sub-block as slave of another SAI sub-block.
|
This property sets SAI sub-block as slave of another SAI sub-block.
|
||||||
Must contain the phandle and index of the sai sub-block providing
|
Must contain the phandle and index of the sai sub-block providing
|
||||||
the synchronization.
|
the synchronization.
|
||||||
|
- st,iec60958: support S/PDIF IEC6958 protocol for playback
|
||||||
|
IEC60958 protocol is not available for capture.
|
||||||
|
By default, custom protocol is assumed, meaning that protocol is
|
||||||
|
configured according to protocol defined in related DAI link node,
|
||||||
|
such as i2s, left justified, right justified, dsp and pdm protocols.
|
||||||
|
Note: ac97 protocol is not supported by SAI driver
|
||||||
|
|
||||||
The device node should contain one 'port' child node with one child 'endpoint'
|
The device node should contain one 'port' child node with one child 'endpoint'
|
||||||
node, according to the bindings defined in Documentation/devicetree/bindings/
|
node, according to the bindings defined in Documentation/devicetree/bindings/
|
||||||
|
|
38
Documentation/devicetree/bindings/sound/tda7419.txt
Normal file
38
Documentation/devicetree/bindings/sound/tda7419.txt
Normal file
|
@ -0,0 +1,38 @@
|
||||||
|
TDA7419 audio processor
|
||||||
|
|
||||||
|
This device supports I2C only.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
|
||||||
|
- compatible : "st,tda7419"
|
||||||
|
- reg : the I2C address of the device.
|
||||||
|
- vdd-supply : a regulator spec for the common power supply (8-10V)
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
|
||||||
|
- st,mute-gpios : a GPIO spec for the MUTE pin.
|
||||||
|
|
||||||
|
Pins on the device (for linking into audio routes):
|
||||||
|
|
||||||
|
* SE3L
|
||||||
|
* SE3R
|
||||||
|
* SE2L
|
||||||
|
* SE2R
|
||||||
|
* SE1L
|
||||||
|
* SE1R
|
||||||
|
* DIFFL
|
||||||
|
* DIFFR
|
||||||
|
* MIX
|
||||||
|
* OUTLF
|
||||||
|
* OUTRF
|
||||||
|
* OUTLR
|
||||||
|
* OUTRR
|
||||||
|
* OUTSW
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
ap: tda7419@44 {
|
||||||
|
compatible = "st,tda7419";
|
||||||
|
reg = <0x44>;
|
||||||
|
vdd-supply = <&vdd_9v0_reg>;
|
||||||
|
};
|
45
Documentation/devicetree/bindings/sound/uniphier,aio.txt
Normal file
45
Documentation/devicetree/bindings/sound/uniphier,aio.txt
Normal file
|
@ -0,0 +1,45 @@
|
||||||
|
Socionext UniPhier SoC audio driver
|
||||||
|
|
||||||
|
The Socionext UniPhier audio subsystem consists of I2S and S/PDIF blocks in
|
||||||
|
the same register space.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : should be one of the following:
|
||||||
|
"socionext,uniphier-ld11-aio"
|
||||||
|
"socionext,uniphier-ld20-aio"
|
||||||
|
"socionext,uniphier-pxs2-aio"
|
||||||
|
- reg : offset and length of the register set for the device.
|
||||||
|
- interrupts : should contain I2S or S/PDIF interrupt.
|
||||||
|
- pinctrl-names : should be "default".
|
||||||
|
- pinctrl-0 : defined I2S signal pins for an external codec chip.
|
||||||
|
- clock-names : should include following entries:
|
||||||
|
"aio"
|
||||||
|
- clocks : a list of phandle, should contain an entry for each
|
||||||
|
entry in clock-names.
|
||||||
|
- reset-names : should include following entries:
|
||||||
|
"aio"
|
||||||
|
- resets : a list of phandle, should contain an entry for each
|
||||||
|
entry in reset-names.
|
||||||
|
- #sound-dai-cells: should be 1.
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- socionext,syscon: a phandle, should contain soc-glue.
|
||||||
|
The soc-glue is used for changing mode of S/PDIF signal pin
|
||||||
|
to Output from Hi-Z. This property is optional if you use
|
||||||
|
I2S signal pins only.
|
||||||
|
|
||||||
|
Example:
|
||||||
|
audio {
|
||||||
|
compatible = "socionext,uniphier-ld20-aio";
|
||||||
|
reg = <0x56000000 0x80000>;
|
||||||
|
interrupts = <0 144 4>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pinctrl_aout>;
|
||||||
|
clock-names = "aio";
|
||||||
|
clocks = <&sys_clk 40>;
|
||||||
|
reset-names = "aio";
|
||||||
|
resets = <&sys_rst 40>;
|
||||||
|
#sound-dai-cells = <1>;
|
||||||
|
|
||||||
|
socionext,syscon = <&sg>;
|
||||||
|
};
|
|
@ -10,7 +10,7 @@ Required properties:
|
||||||
|
|
||||||
Example:
|
Example:
|
||||||
|
|
||||||
codec: wm8524@0 {
|
codec: wm8524 {
|
||||||
compatible = "wlf,wm8524";
|
compatible = "wlf,wm8524";
|
||||||
wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -19,7 +19,7 @@ Required properties:
|
||||||
configured in FS mode;
|
configured in FS mode;
|
||||||
- "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
|
- "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
|
||||||
configured in HS mode;
|
configured in HS mode;
|
||||||
- "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs
|
- "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
|
||||||
configured in HS mode;
|
configured in HS mode;
|
||||||
- reg : Should contain 1 register range (address and length)
|
- reg : Should contain 1 register range (address and length)
|
||||||
- interrupts : Should contain 1 interrupt
|
- interrupts : Should contain 1 interrupt
|
||||||
|
|
|
@ -4,6 +4,7 @@ Required properties:
|
||||||
- compatible: Must contain one of the following:
|
- compatible: Must contain one of the following:
|
||||||
- "renesas,r8a7795-usb3-peri"
|
- "renesas,r8a7795-usb3-peri"
|
||||||
- "renesas,r8a7796-usb3-peri"
|
- "renesas,r8a7796-usb3-peri"
|
||||||
|
- "renesas,r8a77965-usb3-peri"
|
||||||
- "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 compatible
|
- "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 compatible
|
||||||
device
|
device
|
||||||
|
|
||||||
|
|
|
@ -12,6 +12,7 @@ Required properties:
|
||||||
- "renesas,usbhs-r8a7794" for r8a7794 (R-Car E2) compatible device
|
- "renesas,usbhs-r8a7794" for r8a7794 (R-Car E2) compatible device
|
||||||
- "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
|
- "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
|
||||||
- "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
|
- "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
|
||||||
|
- "renesas,usbhs-r8a77965" for r8a77965 (R-Car M3-N) compatible device
|
||||||
- "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
|
- "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
|
||||||
- "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device
|
- "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device
|
||||||
- "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices
|
- "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices
|
||||||
|
|
|
@ -13,6 +13,7 @@ Required properties:
|
||||||
- "renesas,xhci-r8a7793" for r8a7793 SoC
|
- "renesas,xhci-r8a7793" for r8a7793 SoC
|
||||||
- "renesas,xhci-r8a7795" for r8a7795 SoC
|
- "renesas,xhci-r8a7795" for r8a7795 SoC
|
||||||
- "renesas,xhci-r8a7796" for r8a7796 SoC
|
- "renesas,xhci-r8a7796" for r8a7796 SoC
|
||||||
|
- "renesas,xhci-r8a77965" for r8a77965 SoC
|
||||||
- "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible
|
- "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible
|
||||||
device
|
device
|
||||||
- "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
|
- "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
|
||||||
|
|
|
@ -20,8 +20,8 @@ TCP Segmentation Offload
|
||||||
|
|
||||||
TCP segmentation allows a device to segment a single frame into multiple
|
TCP segmentation allows a device to segment a single frame into multiple
|
||||||
frames with a data payload size specified in skb_shinfo()->gso_size.
|
frames with a data payload size specified in skb_shinfo()->gso_size.
|
||||||
When TCP segmentation requested the bit for either SKB_GSO_TCP or
|
When TCP segmentation requested the bit for either SKB_GSO_TCPV4 or
|
||||||
SKB_GSO_TCP6 should be set in skb_shinfo()->gso_type and
|
SKB_GSO_TCPV6 should be set in skb_shinfo()->gso_type and
|
||||||
skb_shinfo()->gso_size should be set to a non-zero value.
|
skb_shinfo()->gso_size should be set to a non-zero value.
|
||||||
|
|
||||||
TCP segmentation is dependent on support for the use of partial checksum
|
TCP segmentation is dependent on support for the use of partial checksum
|
||||||
|
@ -153,8 +153,18 @@ To signal this, gso_size is set to the special value GSO_BY_FRAGS.
|
||||||
|
|
||||||
Therefore, any code in the core networking stack must be aware of the
|
Therefore, any code in the core networking stack must be aware of the
|
||||||
possibility that gso_size will be GSO_BY_FRAGS and handle that case
|
possibility that gso_size will be GSO_BY_FRAGS and handle that case
|
||||||
appropriately. (For size checks, the skb_gso_validate_*_len family of
|
appropriately.
|
||||||
helpers do this automatically.)
|
|
||||||
|
There are some helpers to make this easier:
|
||||||
|
|
||||||
|
- skb_is_gso(skb) && skb_is_gso_sctp(skb) is the best way to see if
|
||||||
|
an skb is an SCTP GSO skb.
|
||||||
|
|
||||||
|
- For size checks, the skb_gso_validate_*_len family of helpers correctly
|
||||||
|
considers GSO_BY_FRAGS.
|
||||||
|
|
||||||
|
- For manipulating packets, skb_increase_gso_size and skb_decrease_gso_size
|
||||||
|
will check for GSO_BY_FRAGS and WARN if asked to manipulate these skbs.
|
||||||
|
|
||||||
This also affects drivers with the NETIF_F_FRAGLIST & NETIF_F_GSO_SCTP bits
|
This also affects drivers with the NETIF_F_FRAGLIST & NETIF_F_GSO_SCTP bits
|
||||||
set. Note also that NETIF_F_GSO_SCTP is included in NETIF_F_GSO_SOFTWARE.
|
set. Note also that NETIF_F_GSO_SCTP is included in NETIF_F_GSO_SOFTWARE.
|
||||||
|
|
10
MAINTAINERS
10
MAINTAINERS
|
@ -841,13 +841,6 @@ F: sound/soc/codecs/ad7*
|
||||||
F: sound/soc/codecs/ssm*
|
F: sound/soc/codecs/ssm*
|
||||||
F: sound/soc/codecs/sigmadsp.*
|
F: sound/soc/codecs/sigmadsp.*
|
||||||
|
|
||||||
ANALOG DEVICES INC ASOC DRIVERS
|
|
||||||
L: adi-buildroot-devel@lists.sourceforge.net (moderated for non-subscribers)
|
|
||||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
|
||||||
W: http://blackfin.uclinux.org/
|
|
||||||
S: Supported
|
|
||||||
F: sound/soc/blackfin/*
|
|
||||||
|
|
||||||
ANALOG DEVICES INC DMA DRIVERS
|
ANALOG DEVICES INC DMA DRIVERS
|
||||||
M: Lars-Peter Clausen <lars@metafoo.de>
|
M: Lars-Peter Clausen <lars@metafoo.de>
|
||||||
W: http://ez.analog.com/community/linux-device-drivers
|
W: http://ez.analog.com/community/linux-device-drivers
|
||||||
|
@ -10334,7 +10327,7 @@ F: drivers/oprofile/
|
||||||
F: include/linux/oprofile.h
|
F: include/linux/oprofile.h
|
||||||
|
|
||||||
ORACLE CLUSTER FILESYSTEM 2 (OCFS2)
|
ORACLE CLUSTER FILESYSTEM 2 (OCFS2)
|
||||||
M: Mark Fasheh <mfasheh@versity.com>
|
M: Mark Fasheh <mark@fasheh.com>
|
||||||
M: Joel Becker <jlbec@evilplan.org>
|
M: Joel Becker <jlbec@evilplan.org>
|
||||||
L: ocfs2-devel@oss.oracle.com (moderated for non-subscribers)
|
L: ocfs2-devel@oss.oracle.com (moderated for non-subscribers)
|
||||||
W: http://ocfs2.wiki.kernel.org
|
W: http://ocfs2.wiki.kernel.org
|
||||||
|
@ -10844,6 +10837,7 @@ F: drivers/platform/x86/peaq-wmi.c
|
||||||
PER-CPU MEMORY ALLOCATOR
|
PER-CPU MEMORY ALLOCATOR
|
||||||
M: Tejun Heo <tj@kernel.org>
|
M: Tejun Heo <tj@kernel.org>
|
||||||
M: Christoph Lameter <cl@linux.com>
|
M: Christoph Lameter <cl@linux.com>
|
||||||
|
M: Dennis Zhou <dennisszhou@gmail.com>
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: include/linux/percpu*.h
|
F: include/linux/percpu*.h
|
||||||
|
|
11
Makefile
11
Makefile
|
@ -2,7 +2,7 @@
|
||||||
VERSION = 4
|
VERSION = 4
|
||||||
PATCHLEVEL = 16
|
PATCHLEVEL = 16
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc5
|
EXTRAVERSION = -rc7
|
||||||
NAME = Fearless Coyote
|
NAME = Fearless Coyote
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
@ -826,6 +826,15 @@ KBUILD_CFLAGS += $(call cc-disable-warning, pointer-sign)
|
||||||
# disable invalid "can't wrap" optimizations for signed / pointers
|
# disable invalid "can't wrap" optimizations for signed / pointers
|
||||||
KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow)
|
KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow)
|
||||||
|
|
||||||
|
# clang sets -fmerge-all-constants by default as optimization, but this
|
||||||
|
# is non-conforming behavior for C and in fact breaks the kernel, so we
|
||||||
|
# need to disable it here generally.
|
||||||
|
KBUILD_CFLAGS += $(call cc-option,-fno-merge-all-constants)
|
||||||
|
|
||||||
|
# for gcc -fno-merge-all-constants disables everything, but it is fine
|
||||||
|
# to have actual conforming behavior enabled.
|
||||||
|
KBUILD_CFLAGS += $(call cc-option,-fmerge-constants)
|
||||||
|
|
||||||
# Make sure -fstack-check isn't enabled (like gentoo apparently did)
|
# Make sure -fstack-check isn't enabled (like gentoo apparently did)
|
||||||
KBUILD_CFLAGS += $(call cc-option,-fno-stack-check,)
|
KBUILD_CFLAGS += $(call cc-option,-fno-stack-check,)
|
||||||
|
|
||||||
|
|
|
@ -363,8 +363,6 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
vcpu_load(vcpu);
|
|
||||||
|
|
||||||
trace_kvm_set_guest_debug(vcpu, dbg->control);
|
trace_kvm_set_guest_debug(vcpu, dbg->control);
|
||||||
|
|
||||||
if (dbg->control & ~KVM_GUESTDBG_VALID_MASK) {
|
if (dbg->control & ~KVM_GUESTDBG_VALID_MASK) {
|
||||||
|
@ -386,7 +384,6 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
||||||
}
|
}
|
||||||
|
|
||||||
out:
|
out:
|
||||||
vcpu_put(vcpu);
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -972,3 +972,13 @@ int pmd_clear_huge(pmd_t *pmdp)
|
||||||
pmd_clear(pmdp);
|
pmd_clear(pmdp);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int pud_free_pmd_page(pud_t *pud)
|
||||||
|
{
|
||||||
|
return pud_none(*pud);
|
||||||
|
}
|
||||||
|
|
||||||
|
int pmd_free_pte_page(pmd_t *pmd)
|
||||||
|
{
|
||||||
|
return pmd_none(*pmd);
|
||||||
|
}
|
||||||
|
|
|
@ -2,7 +2,6 @@
|
||||||
#ifndef __H8300_BYTEORDER_H__
|
#ifndef __H8300_BYTEORDER_H__
|
||||||
#define __H8300_BYTEORDER_H__
|
#define __H8300_BYTEORDER_H__
|
||||||
|
|
||||||
#define __BIG_ENDIAN __ORDER_BIG_ENDIAN__
|
|
||||||
#include <linux/byteorder/big_endian.h>
|
#include <linux/byteorder/big_endian.h>
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -24,6 +24,7 @@ config MICROBLAZE
|
||||||
select HAVE_FTRACE_MCOUNT_RECORD
|
select HAVE_FTRACE_MCOUNT_RECORD
|
||||||
select HAVE_FUNCTION_GRAPH_TRACER
|
select HAVE_FUNCTION_GRAPH_TRACER
|
||||||
select HAVE_FUNCTION_TRACER
|
select HAVE_FUNCTION_TRACER
|
||||||
|
select NO_BOOTMEM
|
||||||
select HAVE_MEMBLOCK
|
select HAVE_MEMBLOCK
|
||||||
select HAVE_MEMBLOCK_NODE_MAP
|
select HAVE_MEMBLOCK_NODE_MAP
|
||||||
select HAVE_OPROFILE
|
select HAVE_OPROFILE
|
||||||
|
|
|
@ -8,7 +8,6 @@ menu "Platform options"
|
||||||
|
|
||||||
config OPT_LIB_FUNCTION
|
config OPT_LIB_FUNCTION
|
||||||
bool "Optimalized lib function"
|
bool "Optimalized lib function"
|
||||||
depends on CPU_LITTLE_ENDIAN
|
|
||||||
default y
|
default y
|
||||||
help
|
help
|
||||||
Allows turn on optimalized library function (memcpy and memmove).
|
Allows turn on optimalized library function (memcpy and memmove).
|
||||||
|
@ -21,6 +20,7 @@ config OPT_LIB_FUNCTION
|
||||||
config OPT_LIB_ASM
|
config OPT_LIB_ASM
|
||||||
bool "Optimalized lib function ASM"
|
bool "Optimalized lib function ASM"
|
||||||
depends on OPT_LIB_FUNCTION && (XILINX_MICROBLAZE0_USE_BARREL = 1)
|
depends on OPT_LIB_FUNCTION && (XILINX_MICROBLAZE0_USE_BARREL = 1)
|
||||||
|
depends on CPU_BIG_ENDIAN
|
||||||
default n
|
default n
|
||||||
help
|
help
|
||||||
Allows turn on optimalized library function (memcpy and memmove).
|
Allows turn on optimalized library function (memcpy and memmove).
|
||||||
|
|
|
@ -44,7 +44,6 @@ void machine_shutdown(void);
|
||||||
void machine_halt(void);
|
void machine_halt(void);
|
||||||
void machine_power_off(void);
|
void machine_power_off(void);
|
||||||
|
|
||||||
extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
|
|
||||||
extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
|
extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
|
||||||
|
|
||||||
# endif /* __ASSEMBLY__ */
|
# endif /* __ASSEMBLY__ */
|
||||||
|
|
|
@ -29,10 +29,6 @@
|
||||||
* between mem locations with size of xfer spec'd in bytes
|
* between mem locations with size of xfer spec'd in bytes
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef __MICROBLAZEEL__
|
|
||||||
#error Microblaze LE not support ASM optimized lib func. Disable OPT_LIB_ASM.
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
.text
|
.text
|
||||||
.globl memcpy
|
.globl memcpy
|
||||||
|
|
|
@ -32,9 +32,6 @@ int mem_init_done;
|
||||||
#ifndef CONFIG_MMU
|
#ifndef CONFIG_MMU
|
||||||
unsigned int __page_offset;
|
unsigned int __page_offset;
|
||||||
EXPORT_SYMBOL(__page_offset);
|
EXPORT_SYMBOL(__page_offset);
|
||||||
|
|
||||||
#else
|
|
||||||
static int init_bootmem_done;
|
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
|
|
||||||
char *klimit = _end;
|
char *klimit = _end;
|
||||||
|
@ -117,7 +114,6 @@ static void __init paging_init(void)
|
||||||
|
|
||||||
void __init setup_memory(void)
|
void __init setup_memory(void)
|
||||||
{
|
{
|
||||||
unsigned long map_size;
|
|
||||||
struct memblock_region *reg;
|
struct memblock_region *reg;
|
||||||
|
|
||||||
#ifndef CONFIG_MMU
|
#ifndef CONFIG_MMU
|
||||||
|
@ -174,17 +170,6 @@ void __init setup_memory(void)
|
||||||
pr_info("%s: max_low_pfn: %#lx\n", __func__, max_low_pfn);
|
pr_info("%s: max_low_pfn: %#lx\n", __func__, max_low_pfn);
|
||||||
pr_info("%s: max_pfn: %#lx\n", __func__, max_pfn);
|
pr_info("%s: max_pfn: %#lx\n", __func__, max_pfn);
|
||||||
|
|
||||||
/*
|
|
||||||
* Find an area to use for the bootmem bitmap.
|
|
||||||
* We look for the first area which is at least
|
|
||||||
* 128kB in length (128kB is enough for a bitmap
|
|
||||||
* for 4GB of memory, using 4kB pages), plus 1 page
|
|
||||||
* (in case the address isn't page-aligned).
|
|
||||||
*/
|
|
||||||
map_size = init_bootmem_node(NODE_DATA(0),
|
|
||||||
PFN_UP(TOPHYS((u32)klimit)), min_low_pfn, max_low_pfn);
|
|
||||||
memblock_reserve(PFN_UP(TOPHYS((u32)klimit)) << PAGE_SHIFT, map_size);
|
|
||||||
|
|
||||||
/* Add active regions with valid PFNs */
|
/* Add active regions with valid PFNs */
|
||||||
for_each_memblock(memory, reg) {
|
for_each_memblock(memory, reg) {
|
||||||
unsigned long start_pfn, end_pfn;
|
unsigned long start_pfn, end_pfn;
|
||||||
|
@ -196,32 +181,9 @@ void __init setup_memory(void)
|
||||||
&memblock.memory, 0);
|
&memblock.memory, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* free bootmem is whole main memory */
|
|
||||||
free_bootmem_with_active_regions(0, max_low_pfn);
|
|
||||||
|
|
||||||
/* reserve allocate blocks */
|
|
||||||
for_each_memblock(reserved, reg) {
|
|
||||||
unsigned long top = reg->base + reg->size - 1;
|
|
||||||
|
|
||||||
pr_debug("reserved - 0x%08x-0x%08x, %lx, %lx\n",
|
|
||||||
(u32) reg->base, (u32) reg->size, top,
|
|
||||||
memory_start + lowmem_size - 1);
|
|
||||||
|
|
||||||
if (top <= (memory_start + lowmem_size - 1)) {
|
|
||||||
reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
|
|
||||||
} else if (reg->base < (memory_start + lowmem_size - 1)) {
|
|
||||||
unsigned long trunc_size = memory_start + lowmem_size -
|
|
||||||
reg->base;
|
|
||||||
reserve_bootmem(reg->base, trunc_size, BOOTMEM_DEFAULT);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* XXX need to clip this if using highmem? */
|
/* XXX need to clip this if using highmem? */
|
||||||
sparse_memory_present_with_active_regions(0);
|
sparse_memory_present_with_active_regions(0);
|
||||||
|
|
||||||
#ifdef CONFIG_MMU
|
|
||||||
init_bootmem_done = 1;
|
|
||||||
#endif
|
|
||||||
paging_init();
|
paging_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -398,30 +360,16 @@ asmlinkage void __init mmu_init(void)
|
||||||
/* This is only called until mem_init is done. */
|
/* This is only called until mem_init is done. */
|
||||||
void __init *early_get_page(void)
|
void __init *early_get_page(void)
|
||||||
{
|
{
|
||||||
void *p;
|
/*
|
||||||
if (init_bootmem_done) {
|
* Mem start + kernel_tlb -> here is limit
|
||||||
p = alloc_bootmem_pages(PAGE_SIZE);
|
* because of mem mapping from head.S
|
||||||
} else {
|
*/
|
||||||
/*
|
return __va(memblock_alloc_base(PAGE_SIZE, PAGE_SIZE,
|
||||||
* Mem start + kernel_tlb -> here is limit
|
memory_start + kernel_tlb));
|
||||||
* because of mem mapping from head.S
|
|
||||||
*/
|
|
||||||
p = __va(memblock_alloc_base(PAGE_SIZE, PAGE_SIZE,
|
|
||||||
memory_start + kernel_tlb));
|
|
||||||
}
|
|
||||||
return p;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
|
|
||||||
void * __ref alloc_maybe_bootmem(size_t size, gfp_t mask)
|
|
||||||
{
|
|
||||||
if (mem_init_done)
|
|
||||||
return kmalloc(size, mask);
|
|
||||||
else
|
|
||||||
return alloc_bootmem(size);
|
|
||||||
}
|
|
||||||
|
|
||||||
void * __ref zalloc_maybe_bootmem(size_t size, gfp_t mask)
|
void * __ref zalloc_maybe_bootmem(size_t size, gfp_t mask)
|
||||||
{
|
{
|
||||||
void *p;
|
void *p;
|
||||||
|
|
|
@ -13,6 +13,8 @@ choice
|
||||||
config SOC_AMAZON_SE
|
config SOC_AMAZON_SE
|
||||||
bool "Amazon SE"
|
bool "Amazon SE"
|
||||||
select SOC_TYPE_XWAY
|
select SOC_TYPE_XWAY
|
||||||
|
select MFD_SYSCON
|
||||||
|
select MFD_CORE
|
||||||
|
|
||||||
config SOC_XWAY
|
config SOC_XWAY
|
||||||
bool "XWAY"
|
bool "XWAY"
|
||||||
|
|
|
@ -549,9 +549,9 @@ void __init ltq_soc_init(void)
|
||||||
clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
|
clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
|
||||||
ltq_ar9_fpi_hz(), CLOCK_250M);
|
ltq_ar9_fpi_hz(), CLOCK_250M);
|
||||||
clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
|
clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
|
||||||
clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
|
clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
|
||||||
clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P);
|
clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P);
|
||||||
clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
|
clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM);
|
||||||
clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH);
|
clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH);
|
||||||
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
|
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
|
||||||
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
||||||
|
@ -560,7 +560,7 @@ void __init ltq_soc_init(void)
|
||||||
} else {
|
} else {
|
||||||
clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),
|
clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),
|
||||||
ltq_danube_fpi_hz(), ltq_danube_pp32_hz());
|
ltq_danube_fpi_hz(), ltq_danube_pp32_hz());
|
||||||
clkdev_add_pmu("1f203018.usb2-phy", "ctrl", 1, 0, PMU_USB0);
|
clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
|
||||||
clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
|
clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
|
||||||
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
|
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
|
||||||
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
||||||
|
|
|
@ -170,6 +170,28 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
|
||||||
u32 n1;
|
u32 n1;
|
||||||
u32 rev;
|
u32 rev;
|
||||||
|
|
||||||
|
/* Early detection of CMP support */
|
||||||
|
mips_cm_probe();
|
||||||
|
mips_cpc_probe();
|
||||||
|
|
||||||
|
if (mips_cps_numiocu(0)) {
|
||||||
|
/*
|
||||||
|
* mips_cm_probe() wipes out bootloader
|
||||||
|
* config for CM regions and we have to configure them
|
||||||
|
* again. This SoC cannot talk to pamlbus devices
|
||||||
|
* witout proper iocu region set up.
|
||||||
|
*
|
||||||
|
* FIXME: it would be better to do this with values
|
||||||
|
* from DT, but we need this very early because
|
||||||
|
* without this we cannot talk to pretty much anything
|
||||||
|
* including serial.
|
||||||
|
*/
|
||||||
|
write_gcr_reg0_base(MT7621_PALMBUS_BASE);
|
||||||
|
write_gcr_reg0_mask(~MT7621_PALMBUS_SIZE |
|
||||||
|
CM_GCR_REGn_MASK_CMTGT_IOCU0);
|
||||||
|
__sync();
|
||||||
|
}
|
||||||
|
|
||||||
n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
|
n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
|
||||||
n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
|
n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
|
||||||
|
|
||||||
|
@ -194,26 +216,6 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
|
||||||
|
|
||||||
rt2880_pinmux_data = mt7621_pinmux_data;
|
rt2880_pinmux_data = mt7621_pinmux_data;
|
||||||
|
|
||||||
/* Early detection of CMP support */
|
|
||||||
mips_cm_probe();
|
|
||||||
mips_cpc_probe();
|
|
||||||
|
|
||||||
if (mips_cps_numiocu(0)) {
|
|
||||||
/*
|
|
||||||
* mips_cm_probe() wipes out bootloader
|
|
||||||
* config for CM regions and we have to configure them
|
|
||||||
* again. This SoC cannot talk to pamlbus devices
|
|
||||||
* witout proper iocu region set up.
|
|
||||||
*
|
|
||||||
* FIXME: it would be better to do this with values
|
|
||||||
* from DT, but we need this very early because
|
|
||||||
* without this we cannot talk to pretty much anything
|
|
||||||
* including serial.
|
|
||||||
*/
|
|
||||||
write_gcr_reg0_base(MT7621_PALMBUS_BASE);
|
|
||||||
write_gcr_reg0_mask(~MT7621_PALMBUS_SIZE |
|
|
||||||
CM_GCR_REGn_MASK_CMTGT_IOCU0);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!register_cps_smp_ops())
|
if (!register_cps_smp_ops())
|
||||||
return;
|
return;
|
||||||
|
|
|
@ -96,16 +96,9 @@ static void ralink_restart(char *command)
|
||||||
unreachable();
|
unreachable();
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ralink_halt(void)
|
|
||||||
{
|
|
||||||
local_irq_disable();
|
|
||||||
unreachable();
|
|
||||||
}
|
|
||||||
|
|
||||||
static int __init mips_reboot_setup(void)
|
static int __init mips_reboot_setup(void)
|
||||||
{
|
{
|
||||||
_machine_restart = ralink_restart;
|
_machine_restart = ralink_restart;
|
||||||
_machine_halt = ralink_halt;
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -543,7 +543,8 @@ void flush_cache_mm(struct mm_struct *mm)
|
||||||
rp3440, etc. So, avoid it if the mm isn't too big. */
|
rp3440, etc. So, avoid it if the mm isn't too big. */
|
||||||
if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
|
if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
|
||||||
mm_total_size(mm) >= parisc_cache_flush_threshold) {
|
mm_total_size(mm) >= parisc_cache_flush_threshold) {
|
||||||
flush_tlb_all();
|
if (mm->context)
|
||||||
|
flush_tlb_all();
|
||||||
flush_cache_all();
|
flush_cache_all();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -571,6 +572,8 @@ void flush_cache_mm(struct mm_struct *mm)
|
||||||
pfn = pte_pfn(*ptep);
|
pfn = pte_pfn(*ptep);
|
||||||
if (!pfn_valid(pfn))
|
if (!pfn_valid(pfn))
|
||||||
continue;
|
continue;
|
||||||
|
if (unlikely(mm->context))
|
||||||
|
flush_tlb_page(vma, addr);
|
||||||
__flush_cache_page(vma, addr, PFN_PHYS(pfn));
|
__flush_cache_page(vma, addr, PFN_PHYS(pfn));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -579,26 +582,46 @@ void flush_cache_mm(struct mm_struct *mm)
|
||||||
void flush_cache_range(struct vm_area_struct *vma,
|
void flush_cache_range(struct vm_area_struct *vma,
|
||||||
unsigned long start, unsigned long end)
|
unsigned long start, unsigned long end)
|
||||||
{
|
{
|
||||||
|
pgd_t *pgd;
|
||||||
|
unsigned long addr;
|
||||||
|
|
||||||
if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
|
if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
|
||||||
end - start >= parisc_cache_flush_threshold) {
|
end - start >= parisc_cache_flush_threshold) {
|
||||||
flush_tlb_range(vma, start, end);
|
if (vma->vm_mm->context)
|
||||||
|
flush_tlb_range(vma, start, end);
|
||||||
flush_cache_all();
|
flush_cache_all();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
flush_user_dcache_range_asm(start, end);
|
if (vma->vm_mm->context == mfsp(3)) {
|
||||||
if (vma->vm_flags & VM_EXEC)
|
flush_user_dcache_range_asm(start, end);
|
||||||
flush_user_icache_range_asm(start, end);
|
if (vma->vm_flags & VM_EXEC)
|
||||||
flush_tlb_range(vma, start, end);
|
flush_user_icache_range_asm(start, end);
|
||||||
|
flush_tlb_range(vma, start, end);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
pgd = vma->vm_mm->pgd;
|
||||||
|
for (addr = vma->vm_start; addr < vma->vm_end; addr += PAGE_SIZE) {
|
||||||
|
unsigned long pfn;
|
||||||
|
pte_t *ptep = get_ptep(pgd, addr);
|
||||||
|
if (!ptep)
|
||||||
|
continue;
|
||||||
|
pfn = pte_pfn(*ptep);
|
||||||
|
if (pfn_valid(pfn)) {
|
||||||
|
if (unlikely(vma->vm_mm->context))
|
||||||
|
flush_tlb_page(vma, addr);
|
||||||
|
__flush_cache_page(vma, addr, PFN_PHYS(pfn));
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
|
flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
|
||||||
{
|
{
|
||||||
BUG_ON(!vma->vm_mm->context);
|
|
||||||
|
|
||||||
if (pfn_valid(pfn)) {
|
if (pfn_valid(pfn)) {
|
||||||
flush_tlb_page(vma, vmaddr);
|
if (likely(vma->vm_mm->context))
|
||||||
|
flush_tlb_page(vma, vmaddr);
|
||||||
__flush_cache_page(vma, vmaddr, PFN_PHYS(pfn));
|
__flush_cache_page(vma, vmaddr, PFN_PHYS(pfn));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -320,7 +320,6 @@ kvm_novcpu_exit:
|
||||||
stw r12, STACK_SLOT_TRAP(r1)
|
stw r12, STACK_SLOT_TRAP(r1)
|
||||||
bl kvmhv_commence_exit
|
bl kvmhv_commence_exit
|
||||||
nop
|
nop
|
||||||
lwz r12, STACK_SLOT_TRAP(r1)
|
|
||||||
b kvmhv_switch_to_host
|
b kvmhv_switch_to_host
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -1220,6 +1219,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
|
||||||
|
|
||||||
secondary_too_late:
|
secondary_too_late:
|
||||||
li r12, 0
|
li r12, 0
|
||||||
|
stw r12, STACK_SLOT_TRAP(r1)
|
||||||
cmpdi r4, 0
|
cmpdi r4, 0
|
||||||
beq 11f
|
beq 11f
|
||||||
stw r12, VCPU_TRAP(r4)
|
stw r12, VCPU_TRAP(r4)
|
||||||
|
@ -1558,12 +1558,12 @@ mc_cont:
|
||||||
3: stw r5,VCPU_SLB_MAX(r9)
|
3: stw r5,VCPU_SLB_MAX(r9)
|
||||||
|
|
||||||
guest_bypass:
|
guest_bypass:
|
||||||
|
stw r12, STACK_SLOT_TRAP(r1)
|
||||||
mr r3, r12
|
mr r3, r12
|
||||||
/* Increment exit count, poke other threads to exit */
|
/* Increment exit count, poke other threads to exit */
|
||||||
bl kvmhv_commence_exit
|
bl kvmhv_commence_exit
|
||||||
nop
|
nop
|
||||||
ld r9, HSTATE_KVM_VCPU(r13)
|
ld r9, HSTATE_KVM_VCPU(r13)
|
||||||
lwz r12, VCPU_TRAP(r9)
|
|
||||||
|
|
||||||
/* Stop others sending VCPU interrupts to this physical CPU */
|
/* Stop others sending VCPU interrupts to this physical CPU */
|
||||||
li r0, -1
|
li r0, -1
|
||||||
|
@ -1898,6 +1898,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_POWER9_DD1)
|
||||||
* POWER7/POWER8 guest -> host partition switch code.
|
* POWER7/POWER8 guest -> host partition switch code.
|
||||||
* We don't have to lock against tlbies but we do
|
* We don't have to lock against tlbies but we do
|
||||||
* have to coordinate the hardware threads.
|
* have to coordinate the hardware threads.
|
||||||
|
* Here STACK_SLOT_TRAP(r1) contains the trap number.
|
||||||
*/
|
*/
|
||||||
kvmhv_switch_to_host:
|
kvmhv_switch_to_host:
|
||||||
/* Secondary threads wait for primary to do partition switch */
|
/* Secondary threads wait for primary to do partition switch */
|
||||||
|
@ -1950,12 +1951,12 @@ BEGIN_FTR_SECTION
|
||||||
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
|
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
|
||||||
|
|
||||||
/* If HMI, call kvmppc_realmode_hmi_handler() */
|
/* If HMI, call kvmppc_realmode_hmi_handler() */
|
||||||
|
lwz r12, STACK_SLOT_TRAP(r1)
|
||||||
cmpwi r12, BOOK3S_INTERRUPT_HMI
|
cmpwi r12, BOOK3S_INTERRUPT_HMI
|
||||||
bne 27f
|
bne 27f
|
||||||
bl kvmppc_realmode_hmi_handler
|
bl kvmppc_realmode_hmi_handler
|
||||||
nop
|
nop
|
||||||
cmpdi r3, 0
|
cmpdi r3, 0
|
||||||
li r12, BOOK3S_INTERRUPT_HMI
|
|
||||||
/*
|
/*
|
||||||
* At this point kvmppc_realmode_hmi_handler may have resync-ed
|
* At this point kvmppc_realmode_hmi_handler may have resync-ed
|
||||||
* the TB, and if it has, we must not subtract the guest timebase
|
* the TB, and if it has, we must not subtract the guest timebase
|
||||||
|
@ -2008,10 +2009,8 @@ BEGIN_FTR_SECTION
|
||||||
lwz r8, KVM_SPLIT_DO_RESTORE(r3)
|
lwz r8, KVM_SPLIT_DO_RESTORE(r3)
|
||||||
cmpwi r8, 0
|
cmpwi r8, 0
|
||||||
beq 47f
|
beq 47f
|
||||||
stw r12, STACK_SLOT_TRAP(r1)
|
|
||||||
bl kvmhv_p9_restore_lpcr
|
bl kvmhv_p9_restore_lpcr
|
||||||
nop
|
nop
|
||||||
lwz r12, STACK_SLOT_TRAP(r1)
|
|
||||||
b 48f
|
b 48f
|
||||||
47:
|
47:
|
||||||
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
|
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
|
||||||
|
@ -2049,6 +2048,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)
|
||||||
li r0, KVM_GUEST_MODE_NONE
|
li r0, KVM_GUEST_MODE_NONE
|
||||||
stb r0, HSTATE_IN_GUEST(r13)
|
stb r0, HSTATE_IN_GUEST(r13)
|
||||||
|
|
||||||
|
lwz r12, STACK_SLOT_TRAP(r1) /* return trap # in r12 */
|
||||||
ld r0, SFS+PPC_LR_STKOFF(r1)
|
ld r0, SFS+PPC_LR_STKOFF(r1)
|
||||||
addi r1, r1, SFS
|
addi r1, r1, SFS
|
||||||
mtlr r0
|
mtlr r0
|
||||||
|
|
|
@ -163,13 +163,10 @@ static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
|
||||||
pte_unmap(pte);
|
pte_unmap(pte);
|
||||||
}
|
}
|
||||||
|
|
||||||
void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|
||||||
pmd_t *pmdp, pmd_t pmd)
|
static void __set_pmd_acct(struct mm_struct *mm, unsigned long addr,
|
||||||
|
pmd_t orig, pmd_t pmd)
|
||||||
{
|
{
|
||||||
pmd_t orig = *pmdp;
|
|
||||||
|
|
||||||
*pmdp = pmd;
|
|
||||||
|
|
||||||
if (mm == &init_mm)
|
if (mm == &init_mm)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
@ -219,6 +216,15 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
||||||
|
pmd_t *pmdp, pmd_t pmd)
|
||||||
|
{
|
||||||
|
pmd_t orig = *pmdp;
|
||||||
|
|
||||||
|
*pmdp = pmd;
|
||||||
|
__set_pmd_acct(mm, addr, orig, pmd);
|
||||||
|
}
|
||||||
|
|
||||||
static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
|
static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
|
||||||
unsigned long address, pmd_t *pmdp, pmd_t pmd)
|
unsigned long address, pmd_t *pmdp, pmd_t pmd)
|
||||||
{
|
{
|
||||||
|
@ -227,6 +233,7 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
|
||||||
do {
|
do {
|
||||||
old = *pmdp;
|
old = *pmdp;
|
||||||
} while (cmpxchg64(&pmdp->pmd, old.pmd, pmd.pmd) != old.pmd);
|
} while (cmpxchg64(&pmdp->pmd, old.pmd, pmd.pmd) != old.pmd);
|
||||||
|
__set_pmd_acct(vma->vm_mm, address, old, pmd);
|
||||||
|
|
||||||
return old;
|
return old;
|
||||||
}
|
}
|
||||||
|
|
|
@ -315,19 +315,6 @@ config X86_L1_CACHE_SHIFT
|
||||||
default "4" if MELAN || M486 || MGEODEGX1
|
default "4" if MELAN || M486 || MGEODEGX1
|
||||||
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
||||||
|
|
||||||
config X86_PPRO_FENCE
|
|
||||||
bool "PentiumPro memory ordering errata workaround"
|
|
||||||
depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
|
|
||||||
---help---
|
|
||||||
Old PentiumPro multiprocessor systems had errata that could cause
|
|
||||||
memory operations to violate the x86 ordering standard in rare cases.
|
|
||||||
Enabling this option will attempt to work around some (but not all)
|
|
||||||
occurrences of this problem, at the cost of much heavier spinlock and
|
|
||||||
memory barrier operations.
|
|
||||||
|
|
||||||
If unsure, say n here. Even distro kernels should think twice before
|
|
||||||
enabling this: there are few systems, and an unlikely bug.
|
|
||||||
|
|
||||||
config X86_F00F_BUG
|
config X86_F00F_BUG
|
||||||
def_bool y
|
def_bool y
|
||||||
depends on M586MMX || M586TSC || M586 || M486
|
depends on M586MMX || M586TSC || M586 || M486
|
||||||
|
|
|
@ -223,6 +223,15 @@ KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr)
|
||||||
|
|
||||||
LDFLAGS := -m elf_$(UTS_MACHINE)
|
LDFLAGS := -m elf_$(UTS_MACHINE)
|
||||||
|
|
||||||
|
#
|
||||||
|
# The 64-bit kernel must be aligned to 2MB. Pass -z max-page-size=0x200000 to
|
||||||
|
# the linker to force 2MB page size regardless of the default page size used
|
||||||
|
# by the linker.
|
||||||
|
#
|
||||||
|
ifdef CONFIG_X86_64
|
||||||
|
LDFLAGS += $(call ld-option, -z max-page-size=0x200000)
|
||||||
|
endif
|
||||||
|
|
||||||
# Speed up the build
|
# Speed up the build
|
||||||
KBUILD_CFLAGS += -pipe
|
KBUILD_CFLAGS += -pipe
|
||||||
# Workaround for a gcc prelease that unfortunately was shipped in a suse release
|
# Workaround for a gcc prelease that unfortunately was shipped in a suse release
|
||||||
|
|
|
@ -309,6 +309,10 @@ static void parse_elf(void *output)
|
||||||
|
|
||||||
switch (phdr->p_type) {
|
switch (phdr->p_type) {
|
||||||
case PT_LOAD:
|
case PT_LOAD:
|
||||||
|
#ifdef CONFIG_X86_64
|
||||||
|
if ((phdr->p_align % 0x200000) != 0)
|
||||||
|
error("Alignment of LOAD segment isn't multiple of 2MB");
|
||||||
|
#endif
|
||||||
#ifdef CONFIG_RELOCATABLE
|
#ifdef CONFIG_RELOCATABLE
|
||||||
dest = output;
|
dest = output;
|
||||||
dest += (phdr->p_paddr - LOAD_PHYSICAL_ADDR);
|
dest += (phdr->p_paddr - LOAD_PHYSICAL_ADDR);
|
||||||
|
|
|
@ -1138,7 +1138,7 @@ apicinterrupt3 HYPERV_REENLIGHTENMENT_VECTOR \
|
||||||
#endif /* CONFIG_HYPERV */
|
#endif /* CONFIG_HYPERV */
|
||||||
|
|
||||||
idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
|
idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
|
||||||
idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
|
idtentry int3 do_int3 has_error_code=0
|
||||||
idtentry stack_segment do_stack_segment has_error_code=1
|
idtentry stack_segment do_stack_segment has_error_code=1
|
||||||
|
|
||||||
#ifdef CONFIG_XEN
|
#ifdef CONFIG_XEN
|
||||||
|
|
|
@ -5,8 +5,6 @@
|
||||||
#undef CONFIG_OPTIMIZE_INLINING
|
#undef CONFIG_OPTIMIZE_INLINING
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#undef CONFIG_X86_PPRO_FENCE
|
|
||||||
|
|
||||||
#ifdef CONFIG_X86_64
|
#ifdef CONFIG_X86_64
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -347,7 +347,7 @@ void __init set_vsyscall_pgtable_user_bits(pgd_t *root)
|
||||||
set_pgd(pgd, __pgd(pgd_val(*pgd) | _PAGE_USER));
|
set_pgd(pgd, __pgd(pgd_val(*pgd) | _PAGE_USER));
|
||||||
p4d = p4d_offset(pgd, VSYSCALL_ADDR);
|
p4d = p4d_offset(pgd, VSYSCALL_ADDR);
|
||||||
#if CONFIG_PGTABLE_LEVELS >= 5
|
#if CONFIG_PGTABLE_LEVELS >= 5
|
||||||
p4d->p4d |= _PAGE_USER;
|
set_p4d(p4d, __p4d(p4d_val(*p4d) | _PAGE_USER));
|
||||||
#endif
|
#endif
|
||||||
pud = pud_offset(p4d, VSYSCALL_ADDR);
|
pud = pud_offset(p4d, VSYSCALL_ADDR);
|
||||||
set_pud(pud, __pud(pud_val(*pud) | _PAGE_USER));
|
set_pud(pud, __pud(pud_val(*pud) | _PAGE_USER));
|
||||||
|
|
|
@ -2118,7 +2118,8 @@ static int x86_pmu_event_init(struct perf_event *event)
|
||||||
event->destroy(event);
|
event->destroy(event);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (READ_ONCE(x86_pmu.attr_rdpmc))
|
if (READ_ONCE(x86_pmu.attr_rdpmc) &&
|
||||||
|
!(event->hw.flags & PERF_X86_EVENT_LARGE_PEBS))
|
||||||
event->hw.flags |= PERF_X86_EVENT_RDPMC_ALLOWED;
|
event->hw.flags |= PERF_X86_EVENT_RDPMC_ALLOWED;
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -2952,9 +2952,9 @@ static void intel_pebs_aliases_skl(struct perf_event *event)
|
||||||
return intel_pebs_aliases_precdist(event);
|
return intel_pebs_aliases_precdist(event);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned long intel_pmu_free_running_flags(struct perf_event *event)
|
static unsigned long intel_pmu_large_pebs_flags(struct perf_event *event)
|
||||||
{
|
{
|
||||||
unsigned long flags = x86_pmu.free_running_flags;
|
unsigned long flags = x86_pmu.large_pebs_flags;
|
||||||
|
|
||||||
if (event->attr.use_clockid)
|
if (event->attr.use_clockid)
|
||||||
flags &= ~PERF_SAMPLE_TIME;
|
flags &= ~PERF_SAMPLE_TIME;
|
||||||
|
@ -2976,8 +2976,8 @@ static int intel_pmu_hw_config(struct perf_event *event)
|
||||||
if (!event->attr.freq) {
|
if (!event->attr.freq) {
|
||||||
event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
|
event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
|
||||||
if (!(event->attr.sample_type &
|
if (!(event->attr.sample_type &
|
||||||
~intel_pmu_free_running_flags(event)))
|
~intel_pmu_large_pebs_flags(event)))
|
||||||
event->hw.flags |= PERF_X86_EVENT_FREERUNNING;
|
event->hw.flags |= PERF_X86_EVENT_LARGE_PEBS;
|
||||||
}
|
}
|
||||||
if (x86_pmu.pebs_aliases)
|
if (x86_pmu.pebs_aliases)
|
||||||
x86_pmu.pebs_aliases(event);
|
x86_pmu.pebs_aliases(event);
|
||||||
|
@ -3194,7 +3194,7 @@ static unsigned bdw_limit_period(struct perf_event *event, unsigned left)
|
||||||
X86_CONFIG(.event=0xc0, .umask=0x01)) {
|
X86_CONFIG(.event=0xc0, .umask=0x01)) {
|
||||||
if (left < 128)
|
if (left < 128)
|
||||||
left = 128;
|
left = 128;
|
||||||
left &= ~0x3fu;
|
left &= ~0x3fULL;
|
||||||
}
|
}
|
||||||
return left;
|
return left;
|
||||||
}
|
}
|
||||||
|
@ -3460,7 +3460,7 @@ static __initconst const struct x86_pmu core_pmu = {
|
||||||
.event_map = intel_pmu_event_map,
|
.event_map = intel_pmu_event_map,
|
||||||
.max_events = ARRAY_SIZE(intel_perfmon_event_map),
|
.max_events = ARRAY_SIZE(intel_perfmon_event_map),
|
||||||
.apic = 1,
|
.apic = 1,
|
||||||
.free_running_flags = PEBS_FREERUNNING_FLAGS,
|
.large_pebs_flags = LARGE_PEBS_FLAGS,
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Intel PMCs cannot be accessed sanely above 32-bit width,
|
* Intel PMCs cannot be accessed sanely above 32-bit width,
|
||||||
|
@ -3502,7 +3502,7 @@ static __initconst const struct x86_pmu intel_pmu = {
|
||||||
.event_map = intel_pmu_event_map,
|
.event_map = intel_pmu_event_map,
|
||||||
.max_events = ARRAY_SIZE(intel_perfmon_event_map),
|
.max_events = ARRAY_SIZE(intel_perfmon_event_map),
|
||||||
.apic = 1,
|
.apic = 1,
|
||||||
.free_running_flags = PEBS_FREERUNNING_FLAGS,
|
.large_pebs_flags = LARGE_PEBS_FLAGS,
|
||||||
/*
|
/*
|
||||||
* Intel PMCs cannot be accessed sanely above 32 bit width,
|
* Intel PMCs cannot be accessed sanely above 32 bit width,
|
||||||
* so we install an artificial 1<<31 period regardless of
|
* so we install an artificial 1<<31 period regardless of
|
||||||
|
|
|
@ -935,7 +935,7 @@ void intel_pmu_pebs_add(struct perf_event *event)
|
||||||
bool needed_cb = pebs_needs_sched_cb(cpuc);
|
bool needed_cb = pebs_needs_sched_cb(cpuc);
|
||||||
|
|
||||||
cpuc->n_pebs++;
|
cpuc->n_pebs++;
|
||||||
if (hwc->flags & PERF_X86_EVENT_FREERUNNING)
|
if (hwc->flags & PERF_X86_EVENT_LARGE_PEBS)
|
||||||
cpuc->n_large_pebs++;
|
cpuc->n_large_pebs++;
|
||||||
|
|
||||||
pebs_update_state(needed_cb, cpuc, event->ctx->pmu);
|
pebs_update_state(needed_cb, cpuc, event->ctx->pmu);
|
||||||
|
@ -975,7 +975,7 @@ void intel_pmu_pebs_del(struct perf_event *event)
|
||||||
bool needed_cb = pebs_needs_sched_cb(cpuc);
|
bool needed_cb = pebs_needs_sched_cb(cpuc);
|
||||||
|
|
||||||
cpuc->n_pebs--;
|
cpuc->n_pebs--;
|
||||||
if (hwc->flags & PERF_X86_EVENT_FREERUNNING)
|
if (hwc->flags & PERF_X86_EVENT_LARGE_PEBS)
|
||||||
cpuc->n_large_pebs--;
|
cpuc->n_large_pebs--;
|
||||||
|
|
||||||
pebs_update_state(needed_cb, cpuc, event->ctx->pmu);
|
pebs_update_state(needed_cb, cpuc, event->ctx->pmu);
|
||||||
|
@ -1530,7 +1530,7 @@ void __init intel_ds_init(void)
|
||||||
x86_pmu.pebs_record_size =
|
x86_pmu.pebs_record_size =
|
||||||
sizeof(struct pebs_record_skl);
|
sizeof(struct pebs_record_skl);
|
||||||
x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
|
x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
|
||||||
x86_pmu.free_running_flags |= PERF_SAMPLE_TIME;
|
x86_pmu.large_pebs_flags |= PERF_SAMPLE_TIME;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -3343,6 +3343,7 @@ static struct extra_reg skx_uncore_cha_extra_regs[] = {
|
||||||
SNBEP_CBO_EVENT_EXTRA_REG(0x9134, 0xffff, 0x4),
|
SNBEP_CBO_EVENT_EXTRA_REG(0x9134, 0xffff, 0x4),
|
||||||
SNBEP_CBO_EVENT_EXTRA_REG(0x35, 0xff, 0x8),
|
SNBEP_CBO_EVENT_EXTRA_REG(0x35, 0xff, 0x8),
|
||||||
SNBEP_CBO_EVENT_EXTRA_REG(0x36, 0xff, 0x8),
|
SNBEP_CBO_EVENT_EXTRA_REG(0x36, 0xff, 0x8),
|
||||||
|
SNBEP_CBO_EVENT_EXTRA_REG(0x38, 0xff, 0x3),
|
||||||
EVENT_EXTRA_END
|
EVENT_EXTRA_END
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -3562,24 +3563,27 @@ static struct intel_uncore_type *skx_msr_uncores[] = {
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* To determine the number of CHAs, it should read bits 27:0 in the CAPID6
|
||||||
|
* register which located at Device 30, Function 3, Offset 0x9C. PCI ID 0x2083.
|
||||||
|
*/
|
||||||
|
#define SKX_CAPID6 0x9c
|
||||||
|
#define SKX_CHA_BIT_MASK GENMASK(27, 0)
|
||||||
|
|
||||||
static int skx_count_chabox(void)
|
static int skx_count_chabox(void)
|
||||||
{
|
{
|
||||||
struct pci_dev *chabox_dev = NULL;
|
struct pci_dev *dev = NULL;
|
||||||
int bus, count = 0;
|
u32 val = 0;
|
||||||
|
|
||||||
while (1) {
|
dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x2083, dev);
|
||||||
chabox_dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x208d, chabox_dev);
|
if (!dev)
|
||||||
if (!chabox_dev)
|
goto out;
|
||||||
break;
|
|
||||||
if (count == 0)
|
|
||||||
bus = chabox_dev->bus->number;
|
|
||||||
if (bus != chabox_dev->bus->number)
|
|
||||||
break;
|
|
||||||
count++;
|
|
||||||
}
|
|
||||||
|
|
||||||
pci_dev_put(chabox_dev);
|
pci_read_config_dword(dev, SKX_CAPID6, &val);
|
||||||
return count;
|
val &= SKX_CHA_BIT_MASK;
|
||||||
|
out:
|
||||||
|
pci_dev_put(dev);
|
||||||
|
return hweight32(val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void skx_uncore_cpu_init(void)
|
void skx_uncore_cpu_init(void)
|
||||||
|
|
|
@ -69,7 +69,7 @@ struct event_constraint {
|
||||||
#define PERF_X86_EVENT_RDPMC_ALLOWED 0x0100 /* grant rdpmc permission */
|
#define PERF_X86_EVENT_RDPMC_ALLOWED 0x0100 /* grant rdpmc permission */
|
||||||
#define PERF_X86_EVENT_EXCL_ACCT 0x0200 /* accounted EXCL event */
|
#define PERF_X86_EVENT_EXCL_ACCT 0x0200 /* accounted EXCL event */
|
||||||
#define PERF_X86_EVENT_AUTO_RELOAD 0x0400 /* use PEBS auto-reload */
|
#define PERF_X86_EVENT_AUTO_RELOAD 0x0400 /* use PEBS auto-reload */
|
||||||
#define PERF_X86_EVENT_FREERUNNING 0x0800 /* use freerunning PEBS */
|
#define PERF_X86_EVENT_LARGE_PEBS 0x0800 /* use large PEBS */
|
||||||
|
|
||||||
|
|
||||||
struct amd_nb {
|
struct amd_nb {
|
||||||
|
@ -88,7 +88,7 @@ struct amd_nb {
|
||||||
* REGS_USER can be handled for events limited to ring 3.
|
* REGS_USER can be handled for events limited to ring 3.
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
#define PEBS_FREERUNNING_FLAGS \
|
#define LARGE_PEBS_FLAGS \
|
||||||
(PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | \
|
(PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | \
|
||||||
PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | \
|
PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | \
|
||||||
PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | \
|
PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | \
|
||||||
|
@ -608,7 +608,7 @@ struct x86_pmu {
|
||||||
struct event_constraint *pebs_constraints;
|
struct event_constraint *pebs_constraints;
|
||||||
void (*pebs_aliases)(struct perf_event *event);
|
void (*pebs_aliases)(struct perf_event *event);
|
||||||
int max_pebs_events;
|
int max_pebs_events;
|
||||||
unsigned long free_running_flags;
|
unsigned long large_pebs_flags;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Intel LBR
|
* Intel LBR
|
||||||
|
|
|
@ -52,11 +52,7 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
|
||||||
#define barrier_nospec() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \
|
#define barrier_nospec() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \
|
||||||
"lfence", X86_FEATURE_LFENCE_RDTSC)
|
"lfence", X86_FEATURE_LFENCE_RDTSC)
|
||||||
|
|
||||||
#ifdef CONFIG_X86_PPRO_FENCE
|
|
||||||
#define dma_rmb() rmb()
|
|
||||||
#else
|
|
||||||
#define dma_rmb() barrier()
|
#define dma_rmb() barrier()
|
||||||
#endif
|
|
||||||
#define dma_wmb() barrier()
|
#define dma_wmb() barrier()
|
||||||
|
|
||||||
#ifdef CONFIG_X86_32
|
#ifdef CONFIG_X86_32
|
||||||
|
@ -68,30 +64,6 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
|
||||||
#define __smp_wmb() barrier()
|
#define __smp_wmb() barrier()
|
||||||
#define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)
|
#define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)
|
||||||
|
|
||||||
#if defined(CONFIG_X86_PPRO_FENCE)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* For this option x86 doesn't have a strong TSO memory
|
|
||||||
* model and we should fall back to full barriers.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define __smp_store_release(p, v) \
|
|
||||||
do { \
|
|
||||||
compiletime_assert_atomic_type(*p); \
|
|
||||||
__smp_mb(); \
|
|
||||||
WRITE_ONCE(*p, v); \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
#define __smp_load_acquire(p) \
|
|
||||||
({ \
|
|
||||||
typeof(*p) ___p1 = READ_ONCE(*p); \
|
|
||||||
compiletime_assert_atomic_type(*p); \
|
|
||||||
__smp_mb(); \
|
|
||||||
___p1; \
|
|
||||||
})
|
|
||||||
|
|
||||||
#else /* regular x86 TSO memory ordering */
|
|
||||||
|
|
||||||
#define __smp_store_release(p, v) \
|
#define __smp_store_release(p, v) \
|
||||||
do { \
|
do { \
|
||||||
compiletime_assert_atomic_type(*p); \
|
compiletime_assert_atomic_type(*p); \
|
||||||
|
@ -107,8 +79,6 @@ do { \
|
||||||
___p1; \
|
___p1; \
|
||||||
})
|
})
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Atomic operations are already serializing on x86 */
|
/* Atomic operations are already serializing on x86 */
|
||||||
#define __smp_mb__before_atomic() barrier()
|
#define __smp_mb__before_atomic() barrier()
|
||||||
#define __smp_mb__after_atomic() barrier()
|
#define __smp_mb__after_atomic() barrier()
|
||||||
|
|
|
@ -316,6 +316,7 @@
|
||||||
#define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */
|
#define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */
|
||||||
#define X86_FEATURE_AVX512_VNNI (16*32+11) /* Vector Neural Network Instructions */
|
#define X86_FEATURE_AVX512_VNNI (16*32+11) /* Vector Neural Network Instructions */
|
||||||
#define X86_FEATURE_AVX512_BITALG (16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB instructions */
|
#define X86_FEATURE_AVX512_BITALG (16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB instructions */
|
||||||
|
#define X86_FEATURE_TME (16*32+13) /* Intel Total Memory Encryption */
|
||||||
#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
|
#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
|
||||||
#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */
|
#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */
|
||||||
#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */
|
#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */
|
||||||
|
@ -328,6 +329,7 @@
|
||||||
/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
|
/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
|
||||||
#define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */
|
#define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */
|
||||||
#define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
|
#define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
|
||||||
|
#define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */
|
||||||
#define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
|
#define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
|
||||||
#define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */
|
#define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */
|
||||||
#define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
|
#define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
|
||||||
|
|
|
@ -232,21 +232,6 @@ extern void set_iounmap_nonlazy(void);
|
||||||
*/
|
*/
|
||||||
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
|
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
|
||||||
|
|
||||||
/*
|
|
||||||
* Cache management
|
|
||||||
*
|
|
||||||
* This needed for two cases
|
|
||||||
* 1. Out of order aware processors
|
|
||||||
* 2. Accidentally out of order processors (PPro errata #51)
|
|
||||||
*/
|
|
||||||
|
|
||||||
static inline void flush_write_buffers(void)
|
|
||||||
{
|
|
||||||
#if defined(CONFIG_X86_PPRO_FENCE)
|
|
||||||
asm volatile("lock; addl $0,0(%%esp)": : :"memory");
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* __KERNEL__ */
|
#endif /* __KERNEL__ */
|
||||||
|
|
||||||
extern void native_io_delay(void);
|
extern void native_io_delay(void);
|
||||||
|
|
|
@ -39,6 +39,7 @@ struct device;
|
||||||
|
|
||||||
enum ucode_state {
|
enum ucode_state {
|
||||||
UCODE_OK = 0,
|
UCODE_OK = 0,
|
||||||
|
UCODE_NEW,
|
||||||
UCODE_UPDATED,
|
UCODE_UPDATED,
|
||||||
UCODE_NFOUND,
|
UCODE_NFOUND,
|
||||||
UCODE_ERROR,
|
UCODE_ERROR,
|
||||||
|
|
|
@ -183,7 +183,10 @@
|
||||||
* otherwise we'll run out of registers. We don't care about CET
|
* otherwise we'll run out of registers. We don't care about CET
|
||||||
* here, anyway.
|
* here, anyway.
|
||||||
*/
|
*/
|
||||||
# define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n", \
|
# define CALL_NOSPEC \
|
||||||
|
ALTERNATIVE( \
|
||||||
|
ANNOTATE_RETPOLINE_SAFE \
|
||||||
|
"call *%[thunk_target]\n", \
|
||||||
" jmp 904f;\n" \
|
" jmp 904f;\n" \
|
||||||
" .align 16\n" \
|
" .align 16\n" \
|
||||||
"901: call 903f;\n" \
|
"901: call 903f;\n" \
|
||||||
|
|
|
@ -135,6 +135,7 @@ struct sst_platform_info {
|
||||||
const struct sst_res_info *res_info;
|
const struct sst_res_info *res_info;
|
||||||
const struct sst_lib_dnld_info *lib_info;
|
const struct sst_lib_dnld_info *lib_info;
|
||||||
const char *platform;
|
const char *platform;
|
||||||
|
bool streams_lost_on_suspend;
|
||||||
};
|
};
|
||||||
int add_sst_platform_device(void);
|
int add_sst_platform_device(void);
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -352,6 +352,7 @@ enum vmcs_field {
|
||||||
#define INTR_TYPE_NMI_INTR (2 << 8) /* NMI */
|
#define INTR_TYPE_NMI_INTR (2 << 8) /* NMI */
|
||||||
#define INTR_TYPE_HARD_EXCEPTION (3 << 8) /* processor exception */
|
#define INTR_TYPE_HARD_EXCEPTION (3 << 8) /* processor exception */
|
||||||
#define INTR_TYPE_SOFT_INTR (4 << 8) /* software interrupt */
|
#define INTR_TYPE_SOFT_INTR (4 << 8) /* software interrupt */
|
||||||
|
#define INTR_TYPE_PRIV_SW_EXCEPTION (5 << 8) /* ICE breakpoint - undocumented */
|
||||||
#define INTR_TYPE_SOFT_EXCEPTION (6 << 8) /* software exception */
|
#define INTR_TYPE_SOFT_EXCEPTION (6 << 8) /* software exception */
|
||||||
|
|
||||||
/* GUEST_INTERRUPTIBILITY_INFO flags. */
|
/* GUEST_INTERRUPTIBILITY_INFO flags. */
|
||||||
|
|
|
@ -105,7 +105,7 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
|
||||||
/*
|
/*
|
||||||
* Early microcode releases for the Spectre v2 mitigation were broken.
|
* Early microcode releases for the Spectre v2 mitigation were broken.
|
||||||
* Information taken from;
|
* Information taken from;
|
||||||
* - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
|
* - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
|
||||||
* - https://kb.vmware.com/s/article/52345
|
* - https://kb.vmware.com/s/article/52345
|
||||||
* - Microcode revisions observed in the wild
|
* - Microcode revisions observed in the wild
|
||||||
* - Release note from 20180108 microcode release
|
* - Release note from 20180108 microcode release
|
||||||
|
@ -123,7 +123,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
|
||||||
{ INTEL_FAM6_KABYLAKE_MOBILE, 0x09, 0x80 },
|
{ INTEL_FAM6_KABYLAKE_MOBILE, 0x09, 0x80 },
|
||||||
{ INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e },
|
{ INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e },
|
||||||
{ INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c },
|
{ INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c },
|
||||||
{ INTEL_FAM6_SKYLAKE_DESKTOP, 0x03, 0xc2 },
|
|
||||||
{ INTEL_FAM6_BROADWELL_CORE, 0x04, 0x28 },
|
{ INTEL_FAM6_BROADWELL_CORE, 0x04, 0x28 },
|
||||||
{ INTEL_FAM6_BROADWELL_GT3E, 0x01, 0x1b },
|
{ INTEL_FAM6_BROADWELL_GT3E, 0x01, 0x1b },
|
||||||
{ INTEL_FAM6_BROADWELL_XEON_D, 0x02, 0x14 },
|
{ INTEL_FAM6_BROADWELL_XEON_D, 0x02, 0x14 },
|
||||||
|
|
|
@ -339,7 +339,7 @@ int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size);
|
ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size);
|
||||||
if (ret != UCODE_OK)
|
if (ret > UCODE_UPDATED)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -683,27 +683,35 @@ static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
|
||||||
static enum ucode_state
|
static enum ucode_state
|
||||||
load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
|
load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
|
||||||
{
|
{
|
||||||
|
struct ucode_patch *p;
|
||||||
enum ucode_state ret;
|
enum ucode_state ret;
|
||||||
|
|
||||||
/* free old equiv table */
|
/* free old equiv table */
|
||||||
free_equiv_cpu_table();
|
free_equiv_cpu_table();
|
||||||
|
|
||||||
ret = __load_microcode_amd(family, data, size);
|
ret = __load_microcode_amd(family, data, size);
|
||||||
|
if (ret != UCODE_OK) {
|
||||||
if (ret != UCODE_OK)
|
|
||||||
cleanup();
|
cleanup();
|
||||||
|
return ret;
|
||||||
#ifdef CONFIG_X86_32
|
|
||||||
/* save BSP's matching patch for early load */
|
|
||||||
if (save) {
|
|
||||||
struct ucode_patch *p = find_patch(0);
|
|
||||||
if (p) {
|
|
||||||
memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
|
|
||||||
memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data),
|
|
||||||
PATCH_MAX_SIZE));
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
p = find_patch(0);
|
||||||
|
if (!p) {
|
||||||
|
return ret;
|
||||||
|
} else {
|
||||||
|
if (boot_cpu_data.microcode == p->patch_id)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = UCODE_NEW;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* save BSP's matching patch for early load */
|
||||||
|
if (!save)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
|
||||||
|
memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), PATCH_MAX_SIZE));
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -517,7 +517,29 @@ static int check_online_cpus(void)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
static atomic_t late_cpus;
|
static atomic_t late_cpus_in;
|
||||||
|
static atomic_t late_cpus_out;
|
||||||
|
|
||||||
|
static int __wait_for_cpus(atomic_t *t, long long timeout)
|
||||||
|
{
|
||||||
|
int all_cpus = num_online_cpus();
|
||||||
|
|
||||||
|
atomic_inc(t);
|
||||||
|
|
||||||
|
while (atomic_read(t) < all_cpus) {
|
||||||
|
if (timeout < SPINUNIT) {
|
||||||
|
pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
|
||||||
|
all_cpus - atomic_read(t));
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
ndelay(SPINUNIT);
|
||||||
|
timeout -= SPINUNIT;
|
||||||
|
|
||||||
|
touch_nmi_watchdog();
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Returns:
|
* Returns:
|
||||||
|
@ -527,30 +549,16 @@ static atomic_t late_cpus;
|
||||||
*/
|
*/
|
||||||
static int __reload_late(void *info)
|
static int __reload_late(void *info)
|
||||||
{
|
{
|
||||||
unsigned int timeout = NSEC_PER_SEC;
|
|
||||||
int all_cpus = num_online_cpus();
|
|
||||||
int cpu = smp_processor_id();
|
int cpu = smp_processor_id();
|
||||||
enum ucode_state err;
|
enum ucode_state err;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
atomic_dec(&late_cpus);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Wait for all CPUs to arrive. A load will not be attempted unless all
|
* Wait for all CPUs to arrive. A load will not be attempted unless all
|
||||||
* CPUs show up.
|
* CPUs show up.
|
||||||
* */
|
* */
|
||||||
while (atomic_read(&late_cpus)) {
|
if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC))
|
||||||
if (timeout < SPINUNIT) {
|
return -1;
|
||||||
pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
|
|
||||||
atomic_read(&late_cpus));
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
ndelay(SPINUNIT);
|
|
||||||
timeout -= SPINUNIT;
|
|
||||||
|
|
||||||
touch_nmi_watchdog();
|
|
||||||
}
|
|
||||||
|
|
||||||
spin_lock(&update_lock);
|
spin_lock(&update_lock);
|
||||||
apply_microcode_local(&err);
|
apply_microcode_local(&err);
|
||||||
|
@ -558,15 +566,22 @@ static int __reload_late(void *info)
|
||||||
|
|
||||||
if (err > UCODE_NFOUND) {
|
if (err > UCODE_NFOUND) {
|
||||||
pr_warn("Error reloading microcode on CPU %d\n", cpu);
|
pr_warn("Error reloading microcode on CPU %d\n", cpu);
|
||||||
ret = -1;
|
return -1;
|
||||||
} else if (err == UCODE_UPDATED) {
|
/* siblings return UCODE_OK because their engine got updated already */
|
||||||
|
} else if (err == UCODE_UPDATED || err == UCODE_OK) {
|
||||||
ret = 1;
|
ret = 1;
|
||||||
|
} else {
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
atomic_inc(&late_cpus);
|
/*
|
||||||
|
* Increase the wait timeout to a safe value here since we're
|
||||||
while (atomic_read(&late_cpus) != all_cpus)
|
* serializing the microcode update and that could take a while on a
|
||||||
cpu_relax();
|
* large number of CPUs. And that is fine as the *actual* timeout will
|
||||||
|
* be determined by the last CPU finished updating and thus cut short.
|
||||||
|
*/
|
||||||
|
if (__wait_for_cpus(&late_cpus_out, NSEC_PER_SEC * num_online_cpus()))
|
||||||
|
panic("Timeout during microcode update!\n");
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -579,12 +594,11 @@ static int microcode_reload_late(void)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
atomic_set(&late_cpus, num_online_cpus());
|
atomic_set(&late_cpus_in, 0);
|
||||||
|
atomic_set(&late_cpus_out, 0);
|
||||||
|
|
||||||
ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);
|
ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);
|
||||||
if (ret < 0)
|
if (ret > 0)
|
||||||
return ret;
|
|
||||||
else if (ret > 0)
|
|
||||||
microcode_check();
|
microcode_check();
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -607,7 +621,7 @@ static ssize_t reload_store(struct device *dev,
|
||||||
return size;
|
return size;
|
||||||
|
|
||||||
tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev, true);
|
tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev, true);
|
||||||
if (tmp_ret != UCODE_OK)
|
if (tmp_ret != UCODE_NEW)
|
||||||
return size;
|
return size;
|
||||||
|
|
||||||
get_online_cpus();
|
get_online_cpus();
|
||||||
|
@ -691,10 +705,8 @@ static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
|
||||||
if (system_state != SYSTEM_RUNNING)
|
if (system_state != SYSTEM_RUNNING)
|
||||||
return UCODE_NFOUND;
|
return UCODE_NFOUND;
|
||||||
|
|
||||||
ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev,
|
ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev, refresh_fw);
|
||||||
refresh_fw);
|
if (ustate == UCODE_NEW) {
|
||||||
|
|
||||||
if (ustate == UCODE_OK) {
|
|
||||||
pr_debug("CPU%d updated upon init\n", cpu);
|
pr_debug("CPU%d updated upon init\n", cpu);
|
||||||
apply_microcode_on_target(cpu);
|
apply_microcode_on_target(cpu);
|
||||||
}
|
}
|
||||||
|
|
|
@ -862,6 +862,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
|
||||||
unsigned int leftover = size;
|
unsigned int leftover = size;
|
||||||
unsigned int curr_mc_size = 0, new_mc_size = 0;
|
unsigned int curr_mc_size = 0, new_mc_size = 0;
|
||||||
unsigned int csig, cpf;
|
unsigned int csig, cpf;
|
||||||
|
enum ucode_state ret = UCODE_OK;
|
||||||
|
|
||||||
while (leftover) {
|
while (leftover) {
|
||||||
struct microcode_header_intel mc_header;
|
struct microcode_header_intel mc_header;
|
||||||
|
@ -903,6 +904,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
|
||||||
new_mc = mc;
|
new_mc = mc;
|
||||||
new_mc_size = mc_size;
|
new_mc_size = mc_size;
|
||||||
mc = NULL; /* trigger new vmalloc */
|
mc = NULL; /* trigger new vmalloc */
|
||||||
|
ret = UCODE_NEW;
|
||||||
}
|
}
|
||||||
|
|
||||||
ucode_ptr += mc_size;
|
ucode_ptr += mc_size;
|
||||||
|
@ -932,7 +934,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
|
||||||
pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
|
pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
|
||||||
cpu, new_rev, uci->cpu_sig.rev);
|
cpu, new_rev, uci->cpu_sig.rev);
|
||||||
|
|
||||||
return UCODE_OK;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int get_ucode_fw(void *to, const void *from, size_t n)
|
static int get_ucode_fw(void *to, const void *from, size_t n)
|
||||||
|
|
|
@ -160,7 +160,6 @@ static const __initconst struct idt_data early_pf_idts[] = {
|
||||||
*/
|
*/
|
||||||
static const __initconst struct idt_data dbg_idts[] = {
|
static const __initconst struct idt_data dbg_idts[] = {
|
||||||
INTG(X86_TRAP_DB, debug),
|
INTG(X86_TRAP_DB, debug),
|
||||||
INTG(X86_TRAP_BP, int3),
|
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -183,7 +182,6 @@ gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss;
|
||||||
static const __initconst struct idt_data ist_idts[] = {
|
static const __initconst struct idt_data ist_idts[] = {
|
||||||
ISTG(X86_TRAP_DB, debug, DEBUG_STACK),
|
ISTG(X86_TRAP_DB, debug, DEBUG_STACK),
|
||||||
ISTG(X86_TRAP_NMI, nmi, NMI_STACK),
|
ISTG(X86_TRAP_NMI, nmi, NMI_STACK),
|
||||||
SISTG(X86_TRAP_BP, int3, DEBUG_STACK),
|
|
||||||
ISTG(X86_TRAP_DF, double_fault, DOUBLEFAULT_STACK),
|
ISTG(X86_TRAP_DF, double_fault, DOUBLEFAULT_STACK),
|
||||||
#ifdef CONFIG_X86_MCE
|
#ifdef CONFIG_X86_MCE
|
||||||
ISTG(X86_TRAP_MC, &machine_check, MCE_STACK),
|
ISTG(X86_TRAP_MC, &machine_check, MCE_STACK),
|
||||||
|
|
|
@ -37,7 +37,6 @@ static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
|
||||||
WARN_ON(size == 0);
|
WARN_ON(size == 0);
|
||||||
if (!check_addr("map_single", dev, bus, size))
|
if (!check_addr("map_single", dev, bus, size))
|
||||||
return NOMMU_MAPPING_ERROR;
|
return NOMMU_MAPPING_ERROR;
|
||||||
flush_write_buffers();
|
|
||||||
return bus;
|
return bus;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -72,25 +71,9 @@ static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
|
||||||
return 0;
|
return 0;
|
||||||
s->dma_length = s->length;
|
s->dma_length = s->length;
|
||||||
}
|
}
|
||||||
flush_write_buffers();
|
|
||||||
return nents;
|
return nents;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void nommu_sync_single_for_device(struct device *dev,
|
|
||||||
dma_addr_t addr, size_t size,
|
|
||||||
enum dma_data_direction dir)
|
|
||||||
{
|
|
||||||
flush_write_buffers();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void nommu_sync_sg_for_device(struct device *dev,
|
|
||||||
struct scatterlist *sg, int nelems,
|
|
||||||
enum dma_data_direction dir)
|
|
||||||
{
|
|
||||||
flush_write_buffers();
|
|
||||||
}
|
|
||||||
|
|
||||||
static int nommu_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
static int nommu_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
||||||
{
|
{
|
||||||
return dma_addr == NOMMU_MAPPING_ERROR;
|
return dma_addr == NOMMU_MAPPING_ERROR;
|
||||||
|
@ -101,8 +84,6 @@ const struct dma_map_ops nommu_dma_ops = {
|
||||||
.free = dma_generic_free_coherent,
|
.free = dma_generic_free_coherent,
|
||||||
.map_sg = nommu_map_sg,
|
.map_sg = nommu_map_sg,
|
||||||
.map_page = nommu_map_page,
|
.map_page = nommu_map_page,
|
||||||
.sync_single_for_device = nommu_sync_single_for_device,
|
|
||||||
.sync_sg_for_device = nommu_sync_sg_for_device,
|
|
||||||
.is_phys = 1,
|
.is_phys = 1,
|
||||||
.mapping_error = nommu_mapping_error,
|
.mapping_error = nommu_mapping_error,
|
||||||
.dma_supported = x86_dma_supported,
|
.dma_supported = x86_dma_supported,
|
||||||
|
|
|
@ -577,7 +577,6 @@ do_general_protection(struct pt_regs *regs, long error_code)
|
||||||
}
|
}
|
||||||
NOKPROBE_SYMBOL(do_general_protection);
|
NOKPROBE_SYMBOL(do_general_protection);
|
||||||
|
|
||||||
/* May run on IST stack. */
|
|
||||||
dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
|
dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_DYNAMIC_FTRACE
|
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||||
|
@ -592,6 +591,13 @@ dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
|
||||||
if (poke_int3_handler(regs))
|
if (poke_int3_handler(regs))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Use ist_enter despite the fact that we don't use an IST stack.
|
||||||
|
* We can be called from a kprobe in non-CONTEXT_KERNEL kernel
|
||||||
|
* mode or even during context tracking state changes.
|
||||||
|
*
|
||||||
|
* This means that we can't schedule. That's okay.
|
||||||
|
*/
|
||||||
ist_enter(regs);
|
ist_enter(regs);
|
||||||
RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
|
RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
|
||||||
#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
|
#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
|
||||||
|
@ -609,15 +615,10 @@ dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
|
||||||
SIGTRAP) == NOTIFY_STOP)
|
SIGTRAP) == NOTIFY_STOP)
|
||||||
goto exit;
|
goto exit;
|
||||||
|
|
||||||
/*
|
|
||||||
* Let others (NMI) know that the debug stack is in use
|
|
||||||
* as we may switch to the interrupt stack.
|
|
||||||
*/
|
|
||||||
debug_stack_usage_inc();
|
|
||||||
cond_local_irq_enable(regs);
|
cond_local_irq_enable(regs);
|
||||||
do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
|
do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
|
||||||
cond_local_irq_disable(regs);
|
cond_local_irq_disable(regs);
|
||||||
debug_stack_usage_dec();
|
|
||||||
exit:
|
exit:
|
||||||
ist_exit(regs);
|
ist_exit(regs);
|
||||||
}
|
}
|
||||||
|
|
|
@ -727,7 +727,8 @@ void handle_vm86_fault(struct kernel_vm86_regs *regs, long error_code)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
check_vip:
|
check_vip:
|
||||||
if (VEFLAGS & X86_EFLAGS_VIP) {
|
if ((VEFLAGS & (X86_EFLAGS_VIP | X86_EFLAGS_VIF)) ==
|
||||||
|
(X86_EFLAGS_VIP | X86_EFLAGS_VIF)) {
|
||||||
save_v86_state(regs, VM86_STI);
|
save_v86_state(regs, VM86_STI);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
|
@ -2770,8 +2770,10 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
|
||||||
else
|
else
|
||||||
pte_access &= ~ACC_WRITE_MASK;
|
pte_access &= ~ACC_WRITE_MASK;
|
||||||
|
|
||||||
|
if (!kvm_is_mmio_pfn(pfn))
|
||||||
|
spte |= shadow_me_mask;
|
||||||
|
|
||||||
spte |= (u64)pfn << PAGE_SHIFT;
|
spte |= (u64)pfn << PAGE_SHIFT;
|
||||||
spte |= shadow_me_mask;
|
|
||||||
|
|
||||||
if (pte_access & ACC_WRITE_MASK) {
|
if (pte_access & ACC_WRITE_MASK) {
|
||||||
|
|
||||||
|
|
|
@ -1045,6 +1045,13 @@ static inline bool is_machine_check(u32 intr_info)
|
||||||
(INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
|
(INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Undocumented: icebp/int1 */
|
||||||
|
static inline bool is_icebp(u32 intr_info)
|
||||||
|
{
|
||||||
|
return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
|
||||||
|
== (INTR_TYPE_PRIV_SW_EXCEPTION | INTR_INFO_VALID_MASK);
|
||||||
|
}
|
||||||
|
|
||||||
static inline bool cpu_has_vmx_msr_bitmap(void)
|
static inline bool cpu_has_vmx_msr_bitmap(void)
|
||||||
{
|
{
|
||||||
return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
|
return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
|
||||||
|
@ -6179,7 +6186,7 @@ static int handle_exception(struct kvm_vcpu *vcpu)
|
||||||
(KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
|
(KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
|
||||||
vcpu->arch.dr6 &= ~15;
|
vcpu->arch.dr6 &= ~15;
|
||||||
vcpu->arch.dr6 |= dr6 | DR6_RTM;
|
vcpu->arch.dr6 |= dr6 | DR6_RTM;
|
||||||
if (!(dr6 & ~DR6_RESERVED)) /* icebp */
|
if (is_icebp(intr_info))
|
||||||
skip_emulated_instruction(vcpu);
|
skip_emulated_instruction(vcpu);
|
||||||
|
|
||||||
kvm_queue_exception(vcpu, DB_VECTOR);
|
kvm_queue_exception(vcpu, DB_VECTOR);
|
||||||
|
|
|
@ -330,7 +330,7 @@ static noinline int vmalloc_fault(unsigned long address)
|
||||||
if (!pmd_k)
|
if (!pmd_k)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
if (pmd_huge(*pmd_k))
|
if (pmd_large(*pmd_k))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
pte_k = pte_offset_kernel(pmd_k, address);
|
pte_k = pte_offset_kernel(pmd_k, address);
|
||||||
|
@ -475,7 +475,7 @@ static noinline int vmalloc_fault(unsigned long address)
|
||||||
if (pud_none(*pud) || pud_pfn(*pud) != pud_pfn(*pud_ref))
|
if (pud_none(*pud) || pud_pfn(*pud) != pud_pfn(*pud_ref))
|
||||||
BUG();
|
BUG();
|
||||||
|
|
||||||
if (pud_huge(*pud))
|
if (pud_large(*pud))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
pmd = pmd_offset(pud, address);
|
pmd = pmd_offset(pud, address);
|
||||||
|
@ -486,7 +486,7 @@ static noinline int vmalloc_fault(unsigned long address)
|
||||||
if (pmd_none(*pmd) || pmd_pfn(*pmd) != pmd_pfn(*pmd_ref))
|
if (pmd_none(*pmd) || pmd_pfn(*pmd) != pmd_pfn(*pmd_ref))
|
||||||
BUG();
|
BUG();
|
||||||
|
|
||||||
if (pmd_huge(*pmd))
|
if (pmd_large(*pmd))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
pte_ref = pte_offset_kernel(pmd_ref, address);
|
pte_ref = pte_offset_kernel(pmd_ref, address);
|
||||||
|
|
|
@ -800,17 +800,11 @@ int arch_add_memory(int nid, u64 start, u64 size, struct vmem_altmap *altmap,
|
||||||
|
|
||||||
#define PAGE_INUSE 0xFD
|
#define PAGE_INUSE 0xFD
|
||||||
|
|
||||||
static void __meminit free_pagetable(struct page *page, int order,
|
static void __meminit free_pagetable(struct page *page, int order)
|
||||||
struct vmem_altmap *altmap)
|
|
||||||
{
|
{
|
||||||
unsigned long magic;
|
unsigned long magic;
|
||||||
unsigned int nr_pages = 1 << order;
|
unsigned int nr_pages = 1 << order;
|
||||||
|
|
||||||
if (altmap) {
|
|
||||||
vmem_altmap_free(altmap, nr_pages);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* bootmem page has reserved flag */
|
/* bootmem page has reserved flag */
|
||||||
if (PageReserved(page)) {
|
if (PageReserved(page)) {
|
||||||
__ClearPageReserved(page);
|
__ClearPageReserved(page);
|
||||||
|
@ -826,8 +820,16 @@ static void __meminit free_pagetable(struct page *page, int order,
|
||||||
free_pages((unsigned long)page_address(page), order);
|
free_pages((unsigned long)page_address(page), order);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd,
|
static void __meminit free_hugepage_table(struct page *page,
|
||||||
struct vmem_altmap *altmap)
|
struct vmem_altmap *altmap)
|
||||||
|
{
|
||||||
|
if (altmap)
|
||||||
|
vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE);
|
||||||
|
else
|
||||||
|
free_pagetable(page, get_order(PMD_SIZE));
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
|
||||||
{
|
{
|
||||||
pte_t *pte;
|
pte_t *pte;
|
||||||
int i;
|
int i;
|
||||||
|
@ -839,14 +841,13 @@ static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* free a pte talbe */
|
/* free a pte talbe */
|
||||||
free_pagetable(pmd_page(*pmd), 0, altmap);
|
free_pagetable(pmd_page(*pmd), 0);
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pmd_clear(pmd);
|
pmd_clear(pmd);
|
||||||
spin_unlock(&init_mm.page_table_lock);
|
spin_unlock(&init_mm.page_table_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud,
|
static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
|
||||||
struct vmem_altmap *altmap)
|
|
||||||
{
|
{
|
||||||
pmd_t *pmd;
|
pmd_t *pmd;
|
||||||
int i;
|
int i;
|
||||||
|
@ -858,14 +859,13 @@ static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* free a pmd talbe */
|
/* free a pmd talbe */
|
||||||
free_pagetable(pud_page(*pud), 0, altmap);
|
free_pagetable(pud_page(*pud), 0);
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pud_clear(pud);
|
pud_clear(pud);
|
||||||
spin_unlock(&init_mm.page_table_lock);
|
spin_unlock(&init_mm.page_table_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d,
|
static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
|
||||||
struct vmem_altmap *altmap)
|
|
||||||
{
|
{
|
||||||
pud_t *pud;
|
pud_t *pud;
|
||||||
int i;
|
int i;
|
||||||
|
@ -877,7 +877,7 @@ static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* free a pud talbe */
|
/* free a pud talbe */
|
||||||
free_pagetable(p4d_page(*p4d), 0, altmap);
|
free_pagetable(p4d_page(*p4d), 0);
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
p4d_clear(p4d);
|
p4d_clear(p4d);
|
||||||
spin_unlock(&init_mm.page_table_lock);
|
spin_unlock(&init_mm.page_table_lock);
|
||||||
|
@ -885,7 +885,7 @@ static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d,
|
||||||
|
|
||||||
static void __meminit
|
static void __meminit
|
||||||
remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
|
remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
|
||||||
struct vmem_altmap *altmap, bool direct)
|
bool direct)
|
||||||
{
|
{
|
||||||
unsigned long next, pages = 0;
|
unsigned long next, pages = 0;
|
||||||
pte_t *pte;
|
pte_t *pte;
|
||||||
|
@ -916,7 +916,7 @@ remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
|
||||||
* freed when offlining, or simplely not in use.
|
* freed when offlining, or simplely not in use.
|
||||||
*/
|
*/
|
||||||
if (!direct)
|
if (!direct)
|
||||||
free_pagetable(pte_page(*pte), 0, altmap);
|
free_pagetable(pte_page(*pte), 0);
|
||||||
|
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pte_clear(&init_mm, addr, pte);
|
pte_clear(&init_mm, addr, pte);
|
||||||
|
@ -939,7 +939,7 @@ remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
|
||||||
|
|
||||||
page_addr = page_address(pte_page(*pte));
|
page_addr = page_address(pte_page(*pte));
|
||||||
if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
|
if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
|
||||||
free_pagetable(pte_page(*pte), 0, altmap);
|
free_pagetable(pte_page(*pte), 0);
|
||||||
|
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pte_clear(&init_mm, addr, pte);
|
pte_clear(&init_mm, addr, pte);
|
||||||
|
@ -974,9 +974,8 @@ remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
|
||||||
if (IS_ALIGNED(addr, PMD_SIZE) &&
|
if (IS_ALIGNED(addr, PMD_SIZE) &&
|
||||||
IS_ALIGNED(next, PMD_SIZE)) {
|
IS_ALIGNED(next, PMD_SIZE)) {
|
||||||
if (!direct)
|
if (!direct)
|
||||||
free_pagetable(pmd_page(*pmd),
|
free_hugepage_table(pmd_page(*pmd),
|
||||||
get_order(PMD_SIZE),
|
altmap);
|
||||||
altmap);
|
|
||||||
|
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pmd_clear(pmd);
|
pmd_clear(pmd);
|
||||||
|
@ -989,9 +988,8 @@ remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
|
||||||
page_addr = page_address(pmd_page(*pmd));
|
page_addr = page_address(pmd_page(*pmd));
|
||||||
if (!memchr_inv(page_addr, PAGE_INUSE,
|
if (!memchr_inv(page_addr, PAGE_INUSE,
|
||||||
PMD_SIZE)) {
|
PMD_SIZE)) {
|
||||||
free_pagetable(pmd_page(*pmd),
|
free_hugepage_table(pmd_page(*pmd),
|
||||||
get_order(PMD_SIZE),
|
altmap);
|
||||||
altmap);
|
|
||||||
|
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pmd_clear(pmd);
|
pmd_clear(pmd);
|
||||||
|
@ -1003,8 +1001,8 @@ remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
|
||||||
}
|
}
|
||||||
|
|
||||||
pte_base = (pte_t *)pmd_page_vaddr(*pmd);
|
pte_base = (pte_t *)pmd_page_vaddr(*pmd);
|
||||||
remove_pte_table(pte_base, addr, next, altmap, direct);
|
remove_pte_table(pte_base, addr, next, direct);
|
||||||
free_pte_table(pte_base, pmd, altmap);
|
free_pte_table(pte_base, pmd);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Call free_pmd_table() in remove_pud_table(). */
|
/* Call free_pmd_table() in remove_pud_table(). */
|
||||||
|
@ -1033,8 +1031,7 @@ remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
|
||||||
IS_ALIGNED(next, PUD_SIZE)) {
|
IS_ALIGNED(next, PUD_SIZE)) {
|
||||||
if (!direct)
|
if (!direct)
|
||||||
free_pagetable(pud_page(*pud),
|
free_pagetable(pud_page(*pud),
|
||||||
get_order(PUD_SIZE),
|
get_order(PUD_SIZE));
|
||||||
altmap);
|
|
||||||
|
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pud_clear(pud);
|
pud_clear(pud);
|
||||||
|
@ -1048,8 +1045,7 @@ remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
|
||||||
if (!memchr_inv(page_addr, PAGE_INUSE,
|
if (!memchr_inv(page_addr, PAGE_INUSE,
|
||||||
PUD_SIZE)) {
|
PUD_SIZE)) {
|
||||||
free_pagetable(pud_page(*pud),
|
free_pagetable(pud_page(*pud),
|
||||||
get_order(PUD_SIZE),
|
get_order(PUD_SIZE));
|
||||||
altmap);
|
|
||||||
|
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
pud_clear(pud);
|
pud_clear(pud);
|
||||||
|
@ -1062,7 +1058,7 @@ remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
|
||||||
|
|
||||||
pmd_base = pmd_offset(pud, 0);
|
pmd_base = pmd_offset(pud, 0);
|
||||||
remove_pmd_table(pmd_base, addr, next, direct, altmap);
|
remove_pmd_table(pmd_base, addr, next, direct, altmap);
|
||||||
free_pmd_table(pmd_base, pud, altmap);
|
free_pmd_table(pmd_base, pud);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (direct)
|
if (direct)
|
||||||
|
@ -1094,7 +1090,7 @@ remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end,
|
||||||
* to adapt for boot-time switching between 4 and 5 level page tables.
|
* to adapt for boot-time switching between 4 and 5 level page tables.
|
||||||
*/
|
*/
|
||||||
if (CONFIG_PGTABLE_LEVELS == 5)
|
if (CONFIG_PGTABLE_LEVELS == 5)
|
||||||
free_pud_table(pud_base, p4d, altmap);
|
free_pud_table(pud_base, p4d);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (direct)
|
if (direct)
|
||||||
|
|
|
@ -702,4 +702,52 @@ int pmd_clear_huge(pmd_t *pmd)
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pud_free_pmd_page - Clear pud entry and free pmd page.
|
||||||
|
* @pud: Pointer to a PUD.
|
||||||
|
*
|
||||||
|
* Context: The pud range has been unmaped and TLB purged.
|
||||||
|
* Return: 1 if clearing the entry succeeded. 0 otherwise.
|
||||||
|
*/
|
||||||
|
int pud_free_pmd_page(pud_t *pud)
|
||||||
|
{
|
||||||
|
pmd_t *pmd;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
if (pud_none(*pud))
|
||||||
|
return 1;
|
||||||
|
|
||||||
|
pmd = (pmd_t *)pud_page_vaddr(*pud);
|
||||||
|
|
||||||
|
for (i = 0; i < PTRS_PER_PMD; i++)
|
||||||
|
if (!pmd_free_pte_page(&pmd[i]))
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
pud_clear(pud);
|
||||||
|
free_page((unsigned long)pmd);
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pmd_free_pte_page - Clear pmd entry and free pte page.
|
||||||
|
* @pmd: Pointer to a PMD.
|
||||||
|
*
|
||||||
|
* Context: The pmd range has been unmaped and TLB purged.
|
||||||
|
* Return: 1 if clearing the entry succeeded. 0 otherwise.
|
||||||
|
*/
|
||||||
|
int pmd_free_pte_page(pmd_t *pmd)
|
||||||
|
{
|
||||||
|
pte_t *pte;
|
||||||
|
|
||||||
|
if (pmd_none(*pmd))
|
||||||
|
return 1;
|
||||||
|
|
||||||
|
pte = (pte_t *)pmd_page_vaddr(*pmd);
|
||||||
|
pmd_clear(pmd);
|
||||||
|
free_page((unsigned long)pte);
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
|
#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
|
||||||
|
|
|
@ -1188,7 +1188,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||||
* may converge on the last pass. In such case do one more
|
* may converge on the last pass. In such case do one more
|
||||||
* pass to emit the final image
|
* pass to emit the final image
|
||||||
*/
|
*/
|
||||||
for (pass = 0; pass < 10 || image; pass++) {
|
for (pass = 0; pass < 20 || image; pass++) {
|
||||||
proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
|
proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
|
||||||
if (proglen <= 0) {
|
if (proglen <= 0) {
|
||||||
image = NULL;
|
image = NULL;
|
||||||
|
@ -1215,6 +1215,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
oldproglen = proglen;
|
oldproglen = proglen;
|
||||||
|
cond_resched();
|
||||||
}
|
}
|
||||||
|
|
||||||
if (bpf_jit_enable > 1)
|
if (bpf_jit_enable > 1)
|
||||||
|
|
|
@ -227,7 +227,7 @@ int __init efi_alloc_page_tables(void)
|
||||||
if (!pud) {
|
if (!pud) {
|
||||||
if (CONFIG_PGTABLE_LEVELS > 4)
|
if (CONFIG_PGTABLE_LEVELS > 4)
|
||||||
free_page((unsigned long) pgd_page_vaddr(*pgd));
|
free_page((unsigned long) pgd_page_vaddr(*pgd));
|
||||||
free_page((unsigned long)efi_pgd);
|
free_pages((unsigned long)efi_pgd, PGD_ALLOCATION_ORDER);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -30,11 +30,7 @@
|
||||||
|
|
||||||
#endif /* CONFIG_X86_32 */
|
#endif /* CONFIG_X86_32 */
|
||||||
|
|
||||||
#ifdef CONFIG_X86_PPRO_FENCE
|
|
||||||
#define dma_rmb() rmb()
|
|
||||||
#else /* CONFIG_X86_PPRO_FENCE */
|
|
||||||
#define dma_rmb() barrier()
|
#define dma_rmb() barrier()
|
||||||
#endif /* CONFIG_X86_PPRO_FENCE */
|
|
||||||
#define dma_wmb() barrier()
|
#define dma_wmb() barrier()
|
||||||
|
|
||||||
#include <asm-generic/barrier.h>
|
#include <asm-generic/barrier.h>
|
||||||
|
|
|
@ -74,10 +74,10 @@ void __init acpi_watchdog_init(void)
|
||||||
res.start = gas->address;
|
res.start = gas->address;
|
||||||
if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
|
if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
|
||||||
res.flags = IORESOURCE_MEM;
|
res.flags = IORESOURCE_MEM;
|
||||||
res.end = res.start + ALIGN(gas->access_width, 4);
|
res.end = res.start + ALIGN(gas->access_width, 4) - 1;
|
||||||
} else if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
|
} else if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
|
||||||
res.flags = IORESOURCE_IO;
|
res.flags = IORESOURCE_IO;
|
||||||
res.end = res.start + gas->access_width;
|
res.end = res.start + gas->access_width - 1;
|
||||||
} else {
|
} else {
|
||||||
pr_warn("Unsupported address space: %u\n",
|
pr_warn("Unsupported address space: %u\n",
|
||||||
gas->space_id);
|
gas->space_id);
|
||||||
|
|
|
@ -70,7 +70,6 @@ static async_cookie_t async_cookie;
|
||||||
static bool battery_driver_registered;
|
static bool battery_driver_registered;
|
||||||
static int battery_bix_broken_package;
|
static int battery_bix_broken_package;
|
||||||
static int battery_notification_delay_ms;
|
static int battery_notification_delay_ms;
|
||||||
static int battery_full_discharging;
|
|
||||||
static unsigned int cache_time = 1000;
|
static unsigned int cache_time = 1000;
|
||||||
module_param(cache_time, uint, 0644);
|
module_param(cache_time, uint, 0644);
|
||||||
MODULE_PARM_DESC(cache_time, "cache time in milliseconds");
|
MODULE_PARM_DESC(cache_time, "cache time in milliseconds");
|
||||||
|
@ -215,12 +214,9 @@ static int acpi_battery_get_property(struct power_supply *psy,
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
switch (psp) {
|
switch (psp) {
|
||||||
case POWER_SUPPLY_PROP_STATUS:
|
case POWER_SUPPLY_PROP_STATUS:
|
||||||
if (battery->state & ACPI_BATTERY_STATE_DISCHARGING) {
|
if (battery->state & ACPI_BATTERY_STATE_DISCHARGING)
|
||||||
if (battery_full_discharging && battery->rate_now == 0)
|
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
|
||||||
val->intval = POWER_SUPPLY_STATUS_FULL;
|
else if (battery->state & ACPI_BATTERY_STATE_CHARGING)
|
||||||
else
|
|
||||||
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
|
|
||||||
} else if (battery->state & ACPI_BATTERY_STATE_CHARGING)
|
|
||||||
val->intval = POWER_SUPPLY_STATUS_CHARGING;
|
val->intval = POWER_SUPPLY_STATUS_CHARGING;
|
||||||
else if (acpi_battery_is_charged(battery))
|
else if (acpi_battery_is_charged(battery))
|
||||||
val->intval = POWER_SUPPLY_STATUS_FULL;
|
val->intval = POWER_SUPPLY_STATUS_FULL;
|
||||||
|
@ -1170,12 +1166,6 @@ battery_notification_delay_quirk(const struct dmi_system_id *d)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init battery_full_discharging_quirk(const struct dmi_system_id *d)
|
|
||||||
{
|
|
||||||
battery_full_discharging = 1;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct dmi_system_id bat_dmi_table[] __initconst = {
|
static const struct dmi_system_id bat_dmi_table[] __initconst = {
|
||||||
{
|
{
|
||||||
.callback = battery_bix_broken_package_quirk,
|
.callback = battery_bix_broken_package_quirk,
|
||||||
|
@ -1193,38 +1183,6 @@ static const struct dmi_system_id bat_dmi_table[] __initconst = {
|
||||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire V5-573G"),
|
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire V5-573G"),
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
{
|
|
||||||
.callback = battery_full_discharging_quirk,
|
|
||||||
.ident = "ASUS GL502VSK",
|
|
||||||
.matches = {
|
|
||||||
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
|
||||||
DMI_MATCH(DMI_PRODUCT_NAME, "GL502VSK"),
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.callback = battery_full_discharging_quirk,
|
|
||||||
.ident = "ASUS UX305LA",
|
|
||||||
.matches = {
|
|
||||||
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
|
||||||
DMI_MATCH(DMI_PRODUCT_NAME, "UX305LA"),
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.callback = battery_full_discharging_quirk,
|
|
||||||
.ident = "ASUS UX360UA",
|
|
||||||
.matches = {
|
|
||||||
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
|
||||||
DMI_MATCH(DMI_PRODUCT_NAME, "UX360UA"),
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.callback = battery_full_discharging_quirk,
|
|
||||||
.ident = "ASUS UX410UAK",
|
|
||||||
.matches = {
|
|
||||||
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
|
||||||
DMI_MATCH(DMI_PRODUCT_NAME, "UX410UAK"),
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{},
|
{},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -2675,10 +2675,14 @@ static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
|
||||||
else
|
else
|
||||||
ndr_desc->numa_node = NUMA_NO_NODE;
|
ndr_desc->numa_node = NUMA_NO_NODE;
|
||||||
|
|
||||||
if(acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH)
|
/*
|
||||||
|
* Persistence domain bits are hierarchical, if
|
||||||
|
* ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then
|
||||||
|
* ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied.
|
||||||
|
*/
|
||||||
|
if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH)
|
||||||
set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags);
|
set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags);
|
||||||
|
else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH)
|
||||||
if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH)
|
|
||||||
set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags);
|
set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags);
|
||||||
|
|
||||||
list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
|
list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
|
||||||
|
|
|
@ -103,25 +103,27 @@ int acpi_map_pxm_to_node(int pxm)
|
||||||
*/
|
*/
|
||||||
int acpi_map_pxm_to_online_node(int pxm)
|
int acpi_map_pxm_to_online_node(int pxm)
|
||||||
{
|
{
|
||||||
int node, n, dist, min_dist;
|
int node, min_node;
|
||||||
|
|
||||||
node = acpi_map_pxm_to_node(pxm);
|
node = acpi_map_pxm_to_node(pxm);
|
||||||
|
|
||||||
if (node == NUMA_NO_NODE)
|
if (node == NUMA_NO_NODE)
|
||||||
node = 0;
|
node = 0;
|
||||||
|
|
||||||
|
min_node = node;
|
||||||
if (!node_online(node)) {
|
if (!node_online(node)) {
|
||||||
min_dist = INT_MAX;
|
int min_dist = INT_MAX, dist, n;
|
||||||
|
|
||||||
for_each_online_node(n) {
|
for_each_online_node(n) {
|
||||||
dist = node_distance(node, n);
|
dist = node_distance(node, n);
|
||||||
if (dist < min_dist) {
|
if (dist < min_dist) {
|
||||||
min_dist = dist;
|
min_dist = dist;
|
||||||
node = n;
|
min_node = n;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return node;
|
return min_node;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(acpi_map_pxm_to_online_node);
|
EXPORT_SYMBOL(acpi_map_pxm_to_online_node);
|
||||||
|
|
||||||
|
|
|
@ -550,7 +550,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
|
||||||
.driver_data = board_ahci_yes_fbs },
|
.driver_data = board_ahci_yes_fbs },
|
||||||
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9230),
|
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9230),
|
||||||
.driver_data = board_ahci_yes_fbs },
|
.driver_data = board_ahci_yes_fbs },
|
||||||
{ PCI_DEVICE(PCI_VENDOR_ID_TTI, 0x0642),
|
{ PCI_DEVICE(PCI_VENDOR_ID_TTI, 0x0642), /* highpoint rocketraid 642L */
|
||||||
|
.driver_data = board_ahci_yes_fbs },
|
||||||
|
{ PCI_DEVICE(PCI_VENDOR_ID_TTI, 0x0645), /* highpoint rocketraid 644L */
|
||||||
.driver_data = board_ahci_yes_fbs },
|
.driver_data = board_ahci_yes_fbs },
|
||||||
|
|
||||||
/* Promise */
|
/* Promise */
|
||||||
|
|
|
@ -665,6 +665,16 @@ int ahci_stop_engine(struct ata_port *ap)
|
||||||
if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)
|
if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Don't try to issue commands but return with ENODEV if the
|
||||||
|
* AHCI controller not available anymore (e.g. due to PCIe hot
|
||||||
|
* unplugging). Otherwise a 500ms delay for each port is added.
|
||||||
|
*/
|
||||||
|
if (tmp == 0xffffffff) {
|
||||||
|
dev_err(ap->host->dev, "AHCI controller unavailable!\n");
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
/* setting HBA to idle */
|
/* setting HBA to idle */
|
||||||
tmp &= ~PORT_CMD_START;
|
tmp &= ~PORT_CMD_START;
|
||||||
writel(tmp, port_mmio + PORT_CMD);
|
writel(tmp, port_mmio + PORT_CMD);
|
||||||
|
|
|
@ -340,7 +340,7 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
|
||||||
* 2) regulator for controlling the targets power (optional)
|
* 2) regulator for controlling the targets power (optional)
|
||||||
* 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
|
* 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
|
||||||
* or for non devicetree enabled platforms a single clock
|
* or for non devicetree enabled platforms a single clock
|
||||||
* 4) phys (optional)
|
* 4) phys (optional)
|
||||||
*
|
*
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* The allocated ahci_host_priv on success, otherwise an ERR_PTR value
|
* The allocated ahci_host_priv on success, otherwise an ERR_PTR value
|
||||||
|
|
|
@ -4530,6 +4530,25 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
||||||
{ "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
|
{ "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
|
||||||
{ "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
|
{ "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
|
||||||
|
|
||||||
|
/* Crucial BX100 SSD 500GB has broken LPM support */
|
||||||
|
{ "CT500BX100SSD1", NULL, ATA_HORKAGE_NOLPM },
|
||||||
|
|
||||||
|
/* 512GB MX100 with MU01 firmware has both queued TRIM and LPM issues */
|
||||||
|
{ "Crucial_CT512MX100*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
|
ATA_HORKAGE_ZERO_AFTER_TRIM |
|
||||||
|
ATA_HORKAGE_NOLPM, },
|
||||||
|
/* 512GB MX100 with newer firmware has only LPM issues */
|
||||||
|
{ "Crucial_CT512MX100*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM |
|
||||||
|
ATA_HORKAGE_NOLPM, },
|
||||||
|
|
||||||
|
/* 480GB+ M500 SSDs have both queued TRIM and LPM issues */
|
||||||
|
{ "Crucial_CT480M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
|
ATA_HORKAGE_ZERO_AFTER_TRIM |
|
||||||
|
ATA_HORKAGE_NOLPM, },
|
||||||
|
{ "Crucial_CT960M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
|
ATA_HORKAGE_ZERO_AFTER_TRIM |
|
||||||
|
ATA_HORKAGE_NOLPM, },
|
||||||
|
|
||||||
/* devices that don't properly handle queued TRIM commands */
|
/* devices that don't properly handle queued TRIM commands */
|
||||||
{ "Micron_M500_*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
{ "Micron_M500_*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||||
|
@ -4541,7 +4560,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
||||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||||
{ "Crucial_CT*MX100*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
|
{ "Crucial_CT*MX100*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||||
{ "Samsung SSD 8*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
{ "Samsung SSD 840*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
|
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||||
|
{ "Samsung SSD 850*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||||
{ "FCCT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
{ "FCCT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
|
||||||
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
ATA_HORKAGE_ZERO_AFTER_TRIM, },
|
||||||
|
@ -5401,8 +5422,7 @@ void ata_qc_issue(struct ata_queued_cmd *qc)
|
||||||
* We guarantee to LLDs that they will have at least one
|
* We guarantee to LLDs that they will have at least one
|
||||||
* non-zero sg if the command is a data command.
|
* non-zero sg if the command is a data command.
|
||||||
*/
|
*/
|
||||||
if (WARN_ON_ONCE(ata_is_data(prot) &&
|
if (ata_is_data(prot) && (!qc->sg || !qc->n_elem || !qc->nbytes))
|
||||||
(!qc->sg || !qc->n_elem || !qc->nbytes)))
|
|
||||||
goto sys_err;
|
goto sys_err;
|
||||||
|
|
||||||
if (ata_is_dma(prot) || (ata_is_pio(prot) &&
|
if (ata_is_dma(prot) || (ata_is_pio(prot) &&
|
||||||
|
|
|
@ -815,7 +815,8 @@ void ata_scsi_port_error_handler(struct Scsi_Host *host, struct ata_port *ap)
|
||||||
|
|
||||||
if (ap->pflags & ATA_PFLAG_LOADING)
|
if (ap->pflags & ATA_PFLAG_LOADING)
|
||||||
ap->pflags &= ~ATA_PFLAG_LOADING;
|
ap->pflags &= ~ATA_PFLAG_LOADING;
|
||||||
else if (ap->pflags & ATA_PFLAG_SCSI_HOTPLUG)
|
else if ((ap->pflags & ATA_PFLAG_SCSI_HOTPLUG) &&
|
||||||
|
!(ap->flags & ATA_FLAG_SAS_HOST))
|
||||||
schedule_delayed_work(&ap->hotplug_task, 0);
|
schedule_delayed_work(&ap->hotplug_task, 0);
|
||||||
|
|
||||||
if (ap->pflags & ATA_PFLAG_RECOVERED)
|
if (ap->pflags & ATA_PFLAG_RECOVERED)
|
||||||
|
|
|
@ -3316,6 +3316,12 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
|
||||||
goto invalid_fld;
|
goto invalid_fld;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* We may not issue NCQ commands to devices not supporting NCQ */
|
||||||
|
if (ata_is_ncq(tf->protocol) && !ata_ncq_enabled(dev)) {
|
||||||
|
fp = 1;
|
||||||
|
goto invalid_fld;
|
||||||
|
}
|
||||||
|
|
||||||
/* sanity check for pio multi commands */
|
/* sanity check for pio multi commands */
|
||||||
if ((cdb[1] & 0xe0) && !is_multi_taskfile(tf)) {
|
if ((cdb[1] & 0xe0) && !is_multi_taskfile(tf)) {
|
||||||
fp = 1;
|
fp = 1;
|
||||||
|
@ -4282,7 +4288,7 @@ static inline void ata_scsi_dump_cdb(struct ata_port *ap,
|
||||||
#ifdef ATA_DEBUG
|
#ifdef ATA_DEBUG
|
||||||
struct scsi_device *scsidev = cmd->device;
|
struct scsi_device *scsidev = cmd->device;
|
||||||
|
|
||||||
DPRINTK("CDB (%u:%d,%d,%d) %9ph\n",
|
DPRINTK("CDB (%u:%d,%d,%lld) %9ph\n",
|
||||||
ap->print_id,
|
ap->print_id,
|
||||||
scsidev->channel, scsidev->id, scsidev->lun,
|
scsidev->channel, scsidev->id, scsidev->lun,
|
||||||
cmd->cmnd);
|
cmd->cmnd);
|
||||||
|
@ -4309,7 +4315,9 @@ static inline int __ata_scsi_queuecmd(struct scsi_cmnd *scmd,
|
||||||
if (likely((scsi_op != ATA_16) || !atapi_passthru16)) {
|
if (likely((scsi_op != ATA_16) || !atapi_passthru16)) {
|
||||||
/* relay SCSI command to ATAPI device */
|
/* relay SCSI command to ATAPI device */
|
||||||
int len = COMMAND_SIZE(scsi_op);
|
int len = COMMAND_SIZE(scsi_op);
|
||||||
if (unlikely(len > scmd->cmd_len || len > dev->cdb_len))
|
if (unlikely(len > scmd->cmd_len ||
|
||||||
|
len > dev->cdb_len ||
|
||||||
|
scmd->cmd_len > ATAPI_CDB_LEN))
|
||||||
goto bad_cdb_len;
|
goto bad_cdb_len;
|
||||||
|
|
||||||
xlat_func = atapi_xlat;
|
xlat_func = atapi_xlat;
|
||||||
|
|
|
@ -146,6 +146,7 @@
|
||||||
enum sata_rcar_type {
|
enum sata_rcar_type {
|
||||||
RCAR_GEN1_SATA,
|
RCAR_GEN1_SATA,
|
||||||
RCAR_GEN2_SATA,
|
RCAR_GEN2_SATA,
|
||||||
|
RCAR_GEN3_SATA,
|
||||||
RCAR_R8A7790_ES1_SATA,
|
RCAR_R8A7790_ES1_SATA,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -784,26 +785,11 @@ static void sata_rcar_setup_port(struct ata_host *host)
|
||||||
ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2);
|
ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sata_rcar_init_controller(struct ata_host *host)
|
static void sata_rcar_init_module(struct sata_rcar_priv *priv)
|
||||||
{
|
{
|
||||||
struct sata_rcar_priv *priv = host->private_data;
|
|
||||||
void __iomem *base = priv->base;
|
void __iomem *base = priv->base;
|
||||||
u32 val;
|
u32 val;
|
||||||
|
|
||||||
/* reset and setup phy */
|
|
||||||
switch (priv->type) {
|
|
||||||
case RCAR_GEN1_SATA:
|
|
||||||
sata_rcar_gen1_phy_init(priv);
|
|
||||||
break;
|
|
||||||
case RCAR_GEN2_SATA:
|
|
||||||
case RCAR_R8A7790_ES1_SATA:
|
|
||||||
sata_rcar_gen2_phy_init(priv);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
dev_warn(host->dev, "SATA phy is not initialized\n");
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* SATA-IP reset state */
|
/* SATA-IP reset state */
|
||||||
val = ioread32(base + ATAPI_CONTROL1_REG);
|
val = ioread32(base + ATAPI_CONTROL1_REG);
|
||||||
val |= ATAPI_CONTROL1_RESET;
|
val |= ATAPI_CONTROL1_RESET;
|
||||||
|
@ -824,10 +810,33 @@ static void sata_rcar_init_controller(struct ata_host *host)
|
||||||
/* ack and mask */
|
/* ack and mask */
|
||||||
iowrite32(0, base + SATAINTSTAT_REG);
|
iowrite32(0, base + SATAINTSTAT_REG);
|
||||||
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
||||||
|
|
||||||
/* enable interrupts */
|
/* enable interrupts */
|
||||||
iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
|
iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void sata_rcar_init_controller(struct ata_host *host)
|
||||||
|
{
|
||||||
|
struct sata_rcar_priv *priv = host->private_data;
|
||||||
|
|
||||||
|
/* reset and setup phy */
|
||||||
|
switch (priv->type) {
|
||||||
|
case RCAR_GEN1_SATA:
|
||||||
|
sata_rcar_gen1_phy_init(priv);
|
||||||
|
break;
|
||||||
|
case RCAR_GEN2_SATA:
|
||||||
|
case RCAR_GEN3_SATA:
|
||||||
|
case RCAR_R8A7790_ES1_SATA:
|
||||||
|
sata_rcar_gen2_phy_init(priv);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
dev_warn(host->dev, "SATA phy is not initialized\n");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
sata_rcar_init_module(priv);
|
||||||
|
}
|
||||||
|
|
||||||
static const struct of_device_id sata_rcar_match[] = {
|
static const struct of_device_id sata_rcar_match[] = {
|
||||||
{
|
{
|
||||||
/* Deprecated by "renesas,sata-r8a7779" */
|
/* Deprecated by "renesas,sata-r8a7779" */
|
||||||
|
@ -856,7 +865,7 @@ static const struct of_device_id sata_rcar_match[] = {
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.compatible = "renesas,sata-r8a7795",
|
.compatible = "renesas,sata-r8a7795",
|
||||||
.data = (void *)RCAR_GEN2_SATA
|
.data = (void *)RCAR_GEN3_SATA
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.compatible = "renesas,rcar-gen2-sata",
|
.compatible = "renesas,rcar-gen2-sata",
|
||||||
|
@ -864,7 +873,7 @@ static const struct of_device_id sata_rcar_match[] = {
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.compatible = "renesas,rcar-gen3-sata",
|
.compatible = "renesas,rcar-gen3-sata",
|
||||||
.data = (void *)RCAR_GEN2_SATA
|
.data = (void *)RCAR_GEN3_SATA
|
||||||
},
|
},
|
||||||
{ },
|
{ },
|
||||||
};
|
};
|
||||||
|
@ -982,11 +991,18 @@ static int sata_rcar_resume(struct device *dev)
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
/* ack and mask */
|
if (priv->type == RCAR_GEN3_SATA) {
|
||||||
iowrite32(0, base + SATAINTSTAT_REG);
|
sata_rcar_gen2_phy_init(priv);
|
||||||
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
sata_rcar_init_module(priv);
|
||||||
/* enable interrupts */
|
} else {
|
||||||
iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
|
/* ack and mask */
|
||||||
|
iowrite32(0, base + SATAINTSTAT_REG);
|
||||||
|
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
||||||
|
|
||||||
|
/* enable interrupts */
|
||||||
|
iowrite32(ATAPI_INT_ENABLE_SATAINT,
|
||||||
|
base + ATAPI_INT_ENABLE_REG);
|
||||||
|
}
|
||||||
|
|
||||||
ata_host_resume(host);
|
ata_host_resume(host);
|
||||||
|
|
||||||
|
|
|
@ -97,7 +97,7 @@ static struct img_ascii_lcd_config boston_config = {
|
||||||
static void malta_update(struct img_ascii_lcd_ctx *ctx)
|
static void malta_update(struct img_ascii_lcd_ctx *ctx)
|
||||||
{
|
{
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
int err;
|
int err = 0;
|
||||||
|
|
||||||
for (i = 0; i < ctx->cfg->num_chars; i++) {
|
for (i = 0; i < ctx->cfg->num_chars; i++) {
|
||||||
err = regmap_write(ctx->regmap,
|
err = regmap_write(ctx->regmap,
|
||||||
|
@ -180,7 +180,7 @@ static int sead3_wait_lcd_idle(struct img_ascii_lcd_ctx *ctx)
|
||||||
static void sead3_update(struct img_ascii_lcd_ctx *ctx)
|
static void sead3_update(struct img_ascii_lcd_ctx *ctx)
|
||||||
{
|
{
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
int err;
|
int err = 0;
|
||||||
|
|
||||||
for (i = 0; i < ctx->cfg->num_chars; i++) {
|
for (i = 0; i < ctx->cfg->num_chars; i++) {
|
||||||
err = sead3_wait_lcd_idle(ctx);
|
err = sead3_wait_lcd_idle(ctx);
|
||||||
|
@ -224,7 +224,7 @@ MODULE_DEVICE_TABLE(of, img_ascii_lcd_matches);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* img_ascii_lcd_scroll() - scroll the display by a character
|
* img_ascii_lcd_scroll() - scroll the display by a character
|
||||||
* @arg: really a pointer to the private data structure
|
* @t: really a pointer to the private data structure
|
||||||
*
|
*
|
||||||
* Scroll the current message along the LCD by one character, rearming the
|
* Scroll the current message along the LCD by one character, rearming the
|
||||||
* timer if required.
|
* timer if required.
|
||||||
|
|
|
@ -1372,7 +1372,7 @@ static void panel_process_inputs(void)
|
||||||
break;
|
break;
|
||||||
input->rise_timer = 0;
|
input->rise_timer = 0;
|
||||||
input->state = INPUT_ST_RISING;
|
input->state = INPUT_ST_RISING;
|
||||||
/* no break here, fall through */
|
/* fall through */
|
||||||
case INPUT_ST_RISING:
|
case INPUT_ST_RISING:
|
||||||
if ((phys_curr & input->mask) != input->value) {
|
if ((phys_curr & input->mask) != input->value) {
|
||||||
input->state = INPUT_ST_LOW;
|
input->state = INPUT_ST_LOW;
|
||||||
|
@ -1385,11 +1385,11 @@ static void panel_process_inputs(void)
|
||||||
}
|
}
|
||||||
input->high_timer = 0;
|
input->high_timer = 0;
|
||||||
input->state = INPUT_ST_HIGH;
|
input->state = INPUT_ST_HIGH;
|
||||||
/* no break here, fall through */
|
/* fall through */
|
||||||
case INPUT_ST_HIGH:
|
case INPUT_ST_HIGH:
|
||||||
if (input_state_high(input))
|
if (input_state_high(input))
|
||||||
break;
|
break;
|
||||||
/* no break here, fall through */
|
/* fall through */
|
||||||
case INPUT_ST_FALLING:
|
case INPUT_ST_FALLING:
|
||||||
input_state_falling(input);
|
input_state_falling(input);
|
||||||
}
|
}
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue