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sh: add support FLCTL for ap325rxa board
This patch adds platform_device for sh_flctl driver, NAND Flash simple partition, and GPIO setting. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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parent
5501093784
commit
908978acbe
1 changed files with 55 additions and 6 deletions
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@ -15,6 +15,7 @@
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/sh_flctl.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/smc911x.h>
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@ -108,10 +109,50 @@ static struct platform_device ap325rxa_nor_flash_device = {
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},
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};
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static struct mtd_partition nand_partition_info[] = {
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{
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.name = "nand_data",
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.offset = 0,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct resource nand_flash_resources[] = {
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[0] = {
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.start = 0xa4530000,
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.end = 0xa45300ff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct sh_flctl_platform_data nand_flash_data = {
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.parts = nand_partition_info,
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.nr_parts = ARRAY_SIZE(nand_partition_info),
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.flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
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.has_hwecc = 1,
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};
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static struct platform_device nand_flash_device = {
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.name = "sh_flctl",
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.resource = nand_flash_resources,
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.num_resources = ARRAY_SIZE(nand_flash_resources),
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.dev = {
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.platform_data = &nand_flash_data,
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},
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};
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#define FPGA_LCDREG 0xB4100180
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#define FPGA_BKLREG 0xB4100212
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#define FPGA_LCDREG_VAL 0x0018
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#define PORT_MSELCRB 0xA4050182
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#define PORT_PUCR 0xA4050142
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#define PORT_PVCR 0xA4050144
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#define PORT_PXCR 0xA4050148
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#define PORT_HIZCRC 0xA405015C
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#define PORT_DRVCRA 0xA405018A
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#define PORT_DRVCRB 0xA405018C
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#define PORT_PXDR 0xA4050168
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#define PORT_PSELC 0xA4050152
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static void ap320_wvga_power_on(void *board_data)
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{
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@ -282,6 +323,7 @@ static struct platform_device *ap325rxa_devices[] __initdata = {
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#ifdef CONFIG_I2C
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&camera_device,
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#endif
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&nand_flash_device,
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};
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static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
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@ -364,21 +406,28 @@ static int __init ap325rxa_devices_setup(void)
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ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
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/* FLCTL */
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ctrl_outw(0, PORT_PUCR);
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ctrl_outw(0, PORT_PVCR);
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ctrl_outw(0, PORT_PSELC);
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ctrl_outw(0, PORT_HIZCRC);
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ctrl_outw(0xFFFF, PORT_DRVCRA);
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ctrl_outw(0xFFFF, PORT_DRVCRB);
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ctrl_outw((ctrl_inw(PORT_PXCR) & 0x3fff) | 0x4000, PORT_PXCR);
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ctrl_outb(0x80, PORT_PXDR);
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platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
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i2c_register_board_info(0, ap325rxa_i2c_devices,
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ARRAY_SIZE(ap325rxa_i2c_devices));
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return platform_add_devices(ap325rxa_devices,
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ARRAY_SIZE(ap325rxa_devices));
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}
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device_initcall(ap325rxa_devices_setup);
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static void __init ap325rxa_setup(char **cmdline_p)
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{
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}
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static struct sh_machine_vector mv_ap325rxa __initmv = {
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.mv_name = "AP-325RXA",
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.mv_setup = ap325rxa_setup,
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};
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