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ARM: OMAP: Sync clocks with linux-omap tree
Mostly clean up CONFIG_OMAP_RESET_CLOCKS. Also includes a patch from Imre Deak to make McSPI clocks use id. Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
1630b52ddf
commit
90afd5cb2a
6 changed files with 121 additions and 91 deletions
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@ -20,6 +20,7 @@
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#include <linux/clk.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/usb.h>
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@ -586,77 +587,53 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
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*-------------------------------------------------------------------------*/
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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/*
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* Resets some clocks that may be left on from bootloader,
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* but leaves serial clocks on. See also omap_late_clk_reset().
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*/
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static inline void omap1_early_clk_reset(void)
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{
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//omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
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}
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static int __init omap1_late_clk_reset(void)
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static void __init omap1_clk_disable_unused(struct clk *clk)
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{
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/* Turn off all unused clocks */
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struct clk *p;
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__u32 regval32;
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/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
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regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
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omap_writew(regval32, SOFT_REQ_REG);
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omap_writew(0, SOFT_REQ_REG2);
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list_for_each_entry(p, &clocks, node) {
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if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
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p->enable_reg == 0)
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continue;
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/* Clocks in the DSP domain need api_ck. Just assume bootloader
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* has not enabled any DSP clocks */
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if ((u32)p->enable_reg == DSP_IDLECT2) {
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printk(KERN_INFO "Skipping reset check for DSP domain "
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"clock \"%s\"\n", p->name);
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continue;
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}
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/* Is the clock already disabled? */
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if (p->flags & ENABLE_REG_32BIT) {
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if (p->flags & VIRTUAL_IO_ADDRESS)
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regval32 = __raw_readl(p->enable_reg);
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else
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regval32 = omap_readl(p->enable_reg);
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} else {
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if (p->flags & VIRTUAL_IO_ADDRESS)
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regval32 = __raw_readw(p->enable_reg);
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else
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regval32 = omap_readw(p->enable_reg);
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}
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if ((regval32 & (1 << p->enable_bit)) == 0)
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continue;
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/* FIXME: This clock seems to be necessary but no-one
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* has asked for its activation. */
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if (p == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
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|| p == &ck_dpll1out.clk // FIX: SoSSI, SSR
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|| p == &arm_gpio_ck // FIX: GPIO code for 1510
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) {
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printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
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p->name);
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continue;
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}
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printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
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p->disable(p);
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printk(" done\n");
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/* Clocks in the DSP domain need api_ck. Just assume bootloader
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* has not enabled any DSP clocks */
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if ((u32)clk->enable_reg == DSP_IDLECT2) {
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printk(KERN_INFO "Skipping reset check for DSP domain "
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"clock \"%s\"\n", clk->name);
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return;
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}
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return 0;
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/* Is the clock already disabled? */
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if (clk->flags & ENABLE_REG_32BIT) {
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if (clk->flags & VIRTUAL_IO_ADDRESS)
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regval32 = __raw_readl(clk->enable_reg);
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else
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regval32 = omap_readl(clk->enable_reg);
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} else {
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if (clk->flags & VIRTUAL_IO_ADDRESS)
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regval32 = __raw_readw(clk->enable_reg);
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else
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regval32 = omap_readw(clk->enable_reg);
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}
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if ((regval32 & (1 << clk->enable_bit)) == 0)
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return;
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/* FIXME: This clock seems to be necessary but no-one
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* has asked for its activation. */
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if (clk == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
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|| clk == &ck_dpll1out.clk // FIX: SoSSI, SSR
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|| clk == &arm_gpio_ck // FIX: GPIO code for 1510
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) {
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printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
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clk->name);
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return;
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}
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printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
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clk->disable(clk);
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printk(" done\n");
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}
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late_initcall(omap1_late_clk_reset);
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#else
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#define omap1_early_clk_reset() {}
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#define omap1_clk_disable_unused NULL
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#endif
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static struct clk_functions omap1_clk_functions = {
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@ -664,6 +641,7 @@ static struct clk_functions omap1_clk_functions = {
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.clk_disable = omap1_clk_disable,
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.clk_round_rate = omap1_clk_round_rate,
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.clk_set_rate = omap1_clk_set_rate,
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.clk_disable_unused = omap1_clk_disable_unused,
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};
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int __init omap1_clk_init(void)
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@ -671,8 +649,13 @@ int __init omap1_clk_init(void)
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struct clk ** clkp;
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const struct omap_clock_config *info;
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int crystal_type = 0; /* Default 12 MHz */
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u32 reg;
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/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
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reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
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omap_writew(reg, SOFT_REQ_REG);
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omap_writew(0, SOFT_REQ_REG2);
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omap1_early_clk_reset();
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clk_init(&omap1_clk_functions);
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/* By default all idlect1 clocks are allowed to idle */
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@ -772,6 +755,12 @@ int __init omap1_clk_init(void)
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omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
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#endif
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/* Amstrad Delta wants BCLK high when inactive */
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if (machine_is_ams_delta())
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omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
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(1 << SDW_MCLK_INV_BIT),
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ULPD_CLOCK_CTRL);
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/* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
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/* (on 730, bit 13 must not be cleared) */
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if (cpu_is_omap730())
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@ -89,6 +89,7 @@ struct arm_idlect1_clk {
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#define EN_DSPTIMCK 5
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/* Various register defines for clock controls scattered around OMAP chip */
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#define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */
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#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
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#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
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#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
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@ -741,6 +742,18 @@ static struct clk i2c_fck = {
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.disable = &omap1_clk_disable_generic,
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};
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static struct clk i2c_ick = {
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.name = "i2c_ick",
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.id = 1,
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.flags = CLOCK_IN_OMAP16XX |
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VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT |
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ALWAYS_ENABLED,
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.parent = &armper_ck.clk,
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.recalc = &followparent_recalc,
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.enable = &omap1_clk_enable_generic,
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.disable = &omap1_clk_disable_generic,
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};
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static struct clk * onchip_clks[] = {
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/* non-ULPD clocks */
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&ck_ref,
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@ -790,6 +803,7 @@ static struct clk * onchip_clks[] = {
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/* Virtual clocks */
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&virtual_ck_mpu,
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&i2c_fck,
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&i2c_ick,
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};
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#endif
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@ -1025,12 +1025,29 @@ static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
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* Omap2 clock reset and init functions
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*-------------------------------------------------------------------------*/
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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static void __init omap2_clk_disable_unused(struct clk *clk)
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{
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u32 regval32;
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regval32 = __raw_readl(clk->enable_reg);
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if ((regval32 & (1 << clk->enable_bit)) == 0)
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return;
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printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name);
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_omap2_clk_disable(clk);
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}
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#else
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#define omap2_clk_disable_unused NULL
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#endif
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static struct clk_functions omap2_clk_functions = {
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.clk_enable = omap2_clk_enable,
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.clk_disable = omap2_clk_disable,
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.clk_round_rate = omap2_clk_round_rate,
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.clk_set_rate = omap2_clk_set_rate,
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.clk_set_parent = omap2_clk_set_parent,
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.clk_disable_unused = omap2_clk_disable_unused,
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};
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static void __init omap2_get_crystal_rate(struct clk *osc, struct clk *sys)
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clk_set_rate(vclk, rate);
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}
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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static void __init omap2_disable_unused_clocks(void)
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{
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struct clk *ck;
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u32 regval32;
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list_for_each_entry(ck, &clocks, node) {
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if (ck->usecount > 0 || (ck->flags & ALWAYS_ENABLED) ||
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ck->enable_reg == 0)
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continue;
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regval32 = __raw_readl(ck->enable_reg);
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if ((regval32 & (1 << ck->enable_bit)) == 0)
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continue;
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printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name);
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_omap2_clk_disable(ck);
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}
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}
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late_initcall(omap2_disable_unused_clocks);
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#endif
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/*
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* Switch the MPU rate if specified on cmdline.
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* We cannot do this early until cmdline is parsed.
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@ -1368,7 +1368,8 @@ static struct clk mcbsp5_fck = {
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};
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static struct clk mcspi1_ick = {
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.name = "mcspi1_ick",
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.name = "mcspi_ick",
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.id = 1,
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.parent = &l4_ck,
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.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
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.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
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@ -1377,7 +1378,8 @@ static struct clk mcspi1_ick = {
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};
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static struct clk mcspi1_fck = {
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.name = "mcspi1_fck",
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.name = "mcspi_fck",
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.id = 1,
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.parent = &func_48m_ck,
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.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
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.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
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@ -1386,7 +1388,8 @@ static struct clk mcspi1_fck = {
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};
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static struct clk mcspi2_ick = {
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.name = "mcspi2_ick",
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.name = "mcspi_ick",
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.id = 2,
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.parent = &l4_ck,
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.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
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.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
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@ -1395,7 +1398,8 @@ static struct clk mcspi2_ick = {
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};
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static struct clk mcspi2_fck = {
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.name = "mcspi2_fck",
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.name = "mcspi_fck",
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.id = 2,
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.parent = &func_48m_ck,
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.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
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.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
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};
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static struct clk mcspi3_ick = {
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.name = "mcspi3_ick",
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.name = "mcspi_ick",
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.id = 3,
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.parent = &l4_ck,
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.flags = CLOCK_IN_OMAP243X,
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.enable_reg = (void __iomem *)&CM_ICLKEN2_CORE,
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};
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static struct clk mcspi3_fck = {
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.name = "mcspi3_fck",
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.name = "mcspi_fck",
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.id = 3,
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.parent = &func_48m_ck,
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.flags = CLOCK_IN_OMAP243X,
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.enable_reg = (void __iomem *)&CM_FCLKEN2_CORE,
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@ -323,6 +323,31 @@ EXPORT_SYMBOL(clk_allow_idle);
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/*-------------------------------------------------------------------------*/
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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/*
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* Disable any unused clocks left on by the bootloader
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*/
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static int __init clk_disable_unused(void)
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{
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struct clk *ck;
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unsigned long flags;
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list_for_each_entry(ck, &clocks, node) {
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if (ck->usecount > 0 || (ck->flags & ALWAYS_ENABLED) ||
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ck->enable_reg == 0)
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continue;
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spin_lock_irqsave(&clockfw_lock, flags);
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if (arch_clock->clk_disable_unused)
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arch_clock->clk_disable_unused(ck);
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spin_unlock_irqrestore(&clockfw_lock, flags);
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}
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return 0;
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}
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late_initcall(clk_disable_unused);
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#endif
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int __init clk_init(struct clk_functions * custom_clocks)
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{
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if (!custom_clocks) {
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@ -45,6 +45,7 @@ struct clk_functions {
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struct clk * (*clk_get_parent)(struct clk *clk);
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void (*clk_allow_idle)(struct clk *clk);
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void (*clk_deny_idle)(struct clk *clk);
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void (*clk_disable_unused)(struct clk *clk);
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};
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extern unsigned int mpurate;
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