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mtd: nand: ecc-hamming: Rename the exported functions
Prefix by ecc_sw_hamming_ the functions which should be internal only but are exported for "raw" operations. Prefix by nand_ecc_sw_hamming_ the other functions which will be used in the context of the declaration of an Hamming proper ECC engine object. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-16-miquel.raynal@bootlin.com
This commit is contained in:
parent
b551fa3059
commit
90ccf0a019
13 changed files with 115 additions and 99 deletions
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@ -75,7 +75,7 @@ static const char bitsperbyte[256] = {
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* addressbits is a lookup table to filter out the bits from the xor-ed
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* ECC data that identify the faulty location.
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* this is only used for repairing parity
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* see the comments in nand_correct_data for more details
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* see the comments in nand_ecc_sw_hamming_correct for more details
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*/
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static const char addressbits[256] = {
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0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01,
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@ -112,11 +112,11 @@ static const char addressbits[256] = {
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0x0e, 0x0e, 0x0f, 0x0f, 0x0e, 0x0e, 0x0f, 0x0f
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};
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void __nand_calculate_ecc(const unsigned char *buf, unsigned int eccsize,
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unsigned char *code, bool sm_order)
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int ecc_sw_hamming_calculate(const unsigned char *buf, unsigned int step_size,
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unsigned char *code, bool sm_order)
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{
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const u32 *bp = (uint32_t *)buf;
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const u32 eccsize_mult = eccsize >> 8;
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const u32 eccsize_mult = step_size >> 8;
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/* current value in buffer */
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u32 cur;
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/* rp0..rp17 are the various accumulated parities (per byte) */
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@ -347,31 +347,32 @@ void __nand_calculate_ecc(const unsigned char *buf, unsigned int eccsize,
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(invparity[par & 0x55] << 2) |
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(invparity[rp17] << 1) |
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(invparity[rp16] << 0);
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}
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EXPORT_SYMBOL(__nand_calculate_ecc);
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/**
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* nand_calculate_ecc - Calculate 3-byte ECC for 256/512-byte block
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* @chip: NAND chip object
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* @buf: Input buffer with raw data
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* @code: Output buffer with ECC
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*/
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int nand_calculate_ecc(struct nand_chip *chip, const unsigned char *buf,
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unsigned char *code)
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{
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bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER;
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__nand_calculate_ecc(buf, chip->ecc.size, code, sm_order);
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return 0;
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}
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EXPORT_SYMBOL(nand_calculate_ecc);
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EXPORT_SYMBOL(ecc_sw_hamming_calculate);
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int __nand_correct_data(unsigned char *buf,
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unsigned char *read_ecc, unsigned char *calc_ecc,
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unsigned int eccsize, bool sm_order)
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/**
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* nand_ecc_sw_hamming_calculate - Calculate 3-byte ECC for 256/512-byte block
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* @nand: NAND device
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* @buf: Input buffer with raw data
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* @code: Output buffer with ECC
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*/
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int nand_ecc_sw_hamming_calculate(struct nand_device *nand,
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const unsigned char *buf, unsigned char *code)
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{
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const u32 eccsize_mult = eccsize >> 8;
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struct nand_chip *chip = mtd_to_nand(nanddev_to_mtd(nand));
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bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER;
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return ecc_sw_hamming_calculate(buf, chip->ecc.size, code, sm_order);
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}
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EXPORT_SYMBOL(nand_ecc_sw_hamming_calculate);
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int ecc_sw_hamming_correct(unsigned char *buf, unsigned char *read_ecc,
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unsigned char *calc_ecc, unsigned int step_size,
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bool sm_order)
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{
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const u32 eccsize_mult = step_size >> 8;
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unsigned char b0, b1, b2, bit_addr;
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unsigned int byte_addr;
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@ -437,26 +438,28 @@ int __nand_correct_data(unsigned char *buf,
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pr_err("%s: uncorrectable ECC error\n", __func__);
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return -EBADMSG;
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}
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EXPORT_SYMBOL(__nand_correct_data);
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EXPORT_SYMBOL(ecc_sw_hamming_correct);
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/**
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* nand_correct_data - Detect and correct bit error(s)
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* @chip: NAND chip object
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* nand_ecc_sw_hamming_correct - Detect and correct bit error(s)
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* @nand: NAND device
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* @buf: Raw data read from the chip
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* @read_ecc: ECC bytes read from the chip
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* @calc_ecc: ECC calculated from the raw data
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*
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* Detect and correct up to 1 bit error per 256/512-byte block.
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*/
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int nand_correct_data(struct nand_chip *chip, unsigned char *buf,
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unsigned char *read_ecc, unsigned char *calc_ecc)
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int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf,
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unsigned char *read_ecc,
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unsigned char *calc_ecc)
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{
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struct nand_chip *chip = mtd_to_nand(nanddev_to_mtd(nand));
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bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER;
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return __nand_correct_data(buf, read_ecc, calc_ecc, chip->ecc.size,
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sm_order);
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return ecc_sw_hamming_correct(buf, read_ecc, calc_ecc, chip->ecc.size,
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sm_order);
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}
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EXPORT_SYMBOL(nand_correct_data);
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EXPORT_SYMBOL(nand_ecc_sw_hamming_correct);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Frans Meulenbroeks <fransmeulenbroeks@gmail.com>");
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@ -19,7 +19,6 @@
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand-ecc-sw-hamming.h>
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#include <linux/mtd/partitions.h>
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#include <linux/iopoll.h>
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@ -252,7 +251,7 @@ static int cs553x_attach_chip(struct nand_chip *chip)
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chip->ecc.bytes = 3;
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chip->ecc.hwctl = cs_enable_hwecc;
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chip->ecc.calculate = cs_calculate_ecc;
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chip->ecc.correct = nand_correct_data;
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chip->ecc.correct = rawnand_sw_hamming_correct;
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chip->ecc.strength = 1;
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return 0;
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@ -918,7 +918,7 @@ static int fsmc_nand_attach_chip(struct nand_chip *nand)
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case NAND_ECC_ENGINE_TYPE_ON_HOST:
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dev_info(host->dev, "Using 1-bit HW ECC scheme\n");
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nand->ecc.calculate = fsmc_read_hwecc_ecc1;
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nand->ecc.correct = nand_correct_data;
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nand->ecc.correct = rawnand_sw_hamming_correct;
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nand->ecc.hwctl = fsmc_enable_hwecc;
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nand->ecc.bytes = 3;
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nand->ecc.strength = 1;
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@ -803,7 +803,7 @@ static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
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chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome;
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chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome;
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chip->ecc.calculate = lpc32xx_nand_ecc_calculate;
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chip->ecc.correct = nand_correct_data;
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chip->ecc.correct = rawnand_sw_hamming_correct;
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chip->ecc.hwctl = lpc32xx_nand_ecc_enable;
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/*
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@ -5139,6 +5139,27 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
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kfree(chip->parameters.onfi);
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}
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int rawnand_sw_hamming_calculate(struct nand_chip *chip,
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const unsigned char *buf,
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unsigned char *code)
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{
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struct nand_device *base = &chip->base;
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return nand_ecc_sw_hamming_calculate(base, buf, code);
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}
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EXPORT_SYMBOL(rawnand_sw_hamming_calculate);
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int rawnand_sw_hamming_correct(struct nand_chip *chip,
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unsigned char *buf,
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unsigned char *read_ecc,
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unsigned char *calc_ecc)
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{
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struct nand_device *base = &chip->base;
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return nand_ecc_sw_hamming_correct(base, buf, read_ecc, calc_ecc);
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}
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EXPORT_SYMBOL(rawnand_sw_hamming_correct);
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int rawnand_sw_bch_init(struct nand_chip *chip)
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{
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struct nand_device *base = &chip->base;
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@ -5263,8 +5284,8 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
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switch (ecc->algo) {
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case NAND_ECC_ALGO_HAMMING:
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ecc->calculate = nand_calculate_ecc;
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ecc->correct = nand_correct_data;
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ecc->calculate = rawnand_sw_hamming_calculate;
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ecc->correct = rawnand_sw_hamming_correct;
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ecc->read_page = nand_read_page_swecc;
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ecc->read_subpage = nand_read_subpage;
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ecc->write_page = nand_write_page_swecc;
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@ -18,7 +18,6 @@
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*/
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#include <linux/module.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand-ecc-sw-hamming.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/ndfc.h>
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#include <linux/slab.h>
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@ -146,7 +145,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
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chip->controller = &ndfc->ndfc_control;
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chip->legacy.read_buf = ndfc_read_buf;
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chip->legacy.write_buf = ndfc_write_buf;
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chip->ecc.correct = nand_correct_data;
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chip->ecc.correct = rawnand_sw_hamming_correct;
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chip->ecc.hwctl = ndfc_enable_hwecc;
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chip->ecc.calculate = ndfc_calculate_ecc;
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chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
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@ -107,7 +107,7 @@ static int sharpsl_attach_chip(struct nand_chip *chip)
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chip->ecc.strength = 1;
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chip->ecc.hwctl = sharpsl_nand_enable_hwecc;
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chip->ecc.calculate = sharpsl_nand_calculate_ecc;
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chip->ecc.correct = nand_correct_data;
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chip->ecc.correct = rawnand_sw_hamming_correct;
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return 0;
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}
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@ -293,11 +293,11 @@ static int tmio_nand_correct_data(struct nand_chip *chip, unsigned char *buf,
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int r0, r1;
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/* assume ecc.size = 512 and ecc.bytes = 6 */
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r0 = __nand_correct_data(buf, read_ecc, calc_ecc, 256, false);
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r0 = rawnand_sw_hamming_correct(chip, buf, read_ecc, calc_ecc);
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if (r0 < 0)
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return r0;
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r1 = __nand_correct_data(buf + 256, read_ecc + 3, calc_ecc + 3, 256,
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false);
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r1 = rawnand_sw_hamming_correct(chip, buf + 256, read_ecc + 3,
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calc_ecc + 3);
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if (r1 < 0)
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return r1;
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return r0 + r1;
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@ -194,8 +194,8 @@ static int txx9ndfmc_correct_data(struct nand_chip *chip, unsigned char *buf,
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int stat;
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for (eccsize = chip->ecc.size; eccsize > 0; eccsize -= 256) {
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stat = __nand_correct_data(buf, read_ecc, calc_ecc, 256,
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false);
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stat = rawnand_sw_hamming_correct(chip, buf, read_ecc,
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calc_ecc);
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if (stat < 0)
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return stat;
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corrected += stat;
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@ -216,20 +216,19 @@ static void sm_break_offset(struct sm_ftl *ftl, loff_t loffset,
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static int sm_correct_sector(uint8_t *buffer, struct sm_oob *oob)
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{
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bool sm_order = IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC);
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uint8_t ecc[3];
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__nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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if (__nand_correct_data(buffer, ecc, oob->ecc1, SM_SMALL_PAGE,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)) < 0)
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ecc_sw_hamming_calculate(buffer, SM_SMALL_PAGE, ecc, sm_order);
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if (ecc_sw_hamming_correct(buffer, ecc, oob->ecc1, SM_SMALL_PAGE,
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sm_order) < 0)
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return -EIO;
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buffer += SM_SMALL_PAGE;
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__nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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if (__nand_correct_data(buffer, ecc, oob->ecc2, SM_SMALL_PAGE,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)) < 0)
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ecc_sw_hamming_calculate(buffer, SM_SMALL_PAGE, ecc, sm_order);
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if (ecc_sw_hamming_correct(buffer, ecc, oob->ecc2, SM_SMALL_PAGE,
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sm_order) < 0)
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return -EIO;
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return 0;
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}
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@ -369,6 +368,7 @@ static int sm_write_block(struct sm_ftl *ftl, uint8_t *buf,
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int zone, int block, int lba,
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unsigned long invalid_bitmap)
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{
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bool sm_order = IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC);
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struct sm_oob oob;
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int boffset;
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int retry = 0;
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@ -395,13 +395,13 @@ static int sm_write_block(struct sm_ftl *ftl, uint8_t *buf,
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}
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if (ftl->smallpagenand) {
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__nand_calculate_ecc(buf + boffset, SM_SMALL_PAGE,
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oob.ecc1,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ecc_sw_hamming_calculate(buf + boffset,
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SM_SMALL_PAGE, oob.ecc1,
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sm_order);
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__nand_calculate_ecc(buf + boffset + SM_SMALL_PAGE,
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SM_SMALL_PAGE, oob.ecc2,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ecc_sw_hamming_calculate(buf + boffset + SM_SMALL_PAGE,
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SM_SMALL_PAGE, oob.ecc2,
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sm_order);
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}
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if (!sm_write_sector(ftl, zone, block, boffset,
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buf + boffset, &oob))
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@ -119,13 +119,13 @@ static void no_bit_error(void *error_data, void *error_ecc,
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static int no_bit_error_verify(void *error_data, void *error_ecc,
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void *correct_data, const size_t size)
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{
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bool sm_order = IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC);
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unsigned char calc_ecc[3];
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int ret;
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__nand_calculate_ecc(error_data, size, calc_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ecc_sw_hamming_calculate(error_data, size, calc_ecc, sm_order);
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ret = ecc_sw_hamming_correct(error_data, error_ecc, calc_ecc, size,
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sm_order);
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if (ret == 0 && !memcmp(correct_data, error_data, size))
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return 0;
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@ -149,13 +149,13 @@ static void single_bit_error_in_ecc(void *error_data, void *error_ecc,
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static int single_bit_error_correct(void *error_data, void *error_ecc,
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void *correct_data, const size_t size)
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{
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bool sm_order = IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC);
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unsigned char calc_ecc[3];
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int ret;
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__nand_calculate_ecc(error_data, size, calc_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ecc_sw_hamming_calculate(error_data, size, calc_ecc, sm_order);
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ret = ecc_sw_hamming_correct(error_data, error_ecc, calc_ecc, size,
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sm_order);
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if (ret == 1 && !memcmp(correct_data, error_data, size))
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return 0;
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@ -186,13 +186,13 @@ static void double_bit_error_in_ecc(void *error_data, void *error_ecc,
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static int double_bit_error_detect(void *error_data, void *error_ecc,
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void *correct_data, const size_t size)
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{
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bool sm_order = IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC);
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unsigned char calc_ecc[3];
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int ret;
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__nand_calculate_ecc(error_data, size, calc_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ecc_sw_hamming_calculate(error_data, size, calc_ecc, sm_order);
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ret = ecc_sw_hamming_correct(error_data, error_ecc, calc_ecc, size,
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sm_order);
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return (ret == -EBADMSG) ? 0 : -EINVAL;
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}
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@ -248,6 +248,7 @@ static void dump_data_ecc(void *error_data, void *error_ecc, void *correct_data,
|
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|
||||
static int nand_ecc_test_run(const size_t size)
|
||||
{
|
||||
bool sm_order = IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC);
|
||||
int i;
|
||||
int err = 0;
|
||||
void *error_data;
|
||||
|
@ -266,9 +267,7 @@ static int nand_ecc_test_run(const size_t size)
|
|||
}
|
||||
|
||||
prandom_bytes(correct_data, size);
|
||||
__nand_calculate_ecc(correct_data, size, correct_ecc,
|
||||
IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
|
||||
|
||||
ecc_sw_hamming_calculate(correct_data, size, correct_ecc, sm_order);
|
||||
for (i = 0; i < ARRAY_SIZE(nand_ecc_test); i++) {
|
||||
nand_ecc_test[i].prepare(error_data, error_ecc,
|
||||
correct_data, correct_ecc, size);
|
||||
|
|
|
@ -10,30 +10,18 @@
|
|||
#ifndef __MTD_NAND_ECC_SW_HAMMING_H__
|
||||
#define __MTD_NAND_ECC_SW_HAMMING_H__
|
||||
|
||||
struct nand_chip;
|
||||
#include <linux/mtd/nand.h>
|
||||
|
||||
/*
|
||||
* Calculate 3 byte ECC code for eccsize byte block
|
||||
*/
|
||||
void __nand_calculate_ecc(const u_char *dat, unsigned int eccsize,
|
||||
u_char *ecc_code, bool sm_order);
|
||||
|
||||
/*
|
||||
* Calculate 3 byte ECC code for 256/512 byte block
|
||||
*/
|
||||
int nand_calculate_ecc(struct nand_chip *chip, const u_char *dat,
|
||||
u_char *ecc_code);
|
||||
|
||||
/*
|
||||
* Detect and correct a 1 bit error for eccsize byte block
|
||||
*/
|
||||
int __nand_correct_data(u_char *dat, u_char *read_ecc, u_char *calc_ecc,
|
||||
unsigned int eccsize, bool sm_order);
|
||||
|
||||
/*
|
||||
* Detect and correct a 1 bit error for 256/512 byte block
|
||||
*/
|
||||
int nand_correct_data(struct nand_chip *chip, u_char *dat, u_char *read_ecc,
|
||||
u_char *calc_ecc);
|
||||
int ecc_sw_hamming_calculate(const unsigned char *buf, unsigned int step_size,
|
||||
unsigned char *code, bool sm_order);
|
||||
int nand_ecc_sw_hamming_calculate(struct nand_device *nand,
|
||||
const unsigned char *buf,
|
||||
unsigned char *code);
|
||||
int ecc_sw_hamming_correct(unsigned char *buf, unsigned char *read_ecc,
|
||||
unsigned char *calc_ecc, unsigned int step_size,
|
||||
bool sm_order);
|
||||
int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf,
|
||||
unsigned char *read_ecc,
|
||||
unsigned char *calc_ecc);
|
||||
|
||||
#endif /* __MTD_NAND_ECC_SW_HAMMING_H__ */
|
||||
|
|
|
@ -1301,6 +1301,13 @@ static inline int nand_opcode_8bits(unsigned int command)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int rawnand_sw_hamming_calculate(struct nand_chip *chip,
|
||||
const unsigned char *buf,
|
||||
unsigned char *code);
|
||||
int rawnand_sw_hamming_correct(struct nand_chip *chip,
|
||||
unsigned char *buf,
|
||||
unsigned char *read_ecc,
|
||||
unsigned char *calc_ecc);
|
||||
int rawnand_sw_bch_init(struct nand_chip *chip);
|
||||
int rawnand_sw_bch_correct(struct nand_chip *chip, unsigned char *buf,
|
||||
unsigned char *read_ecc, unsigned char *calc_ecc);
|
||||
|
|
Loading…
Reference in a new issue