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perf/x86/regs: Check reserved bits
The perf fuzzer triggers a warning which map to:
if (WARN_ON_ONCE(idx >= ARRAY_SIZE(pt_regs_offset)))
return 0;
The bits between XMM registers and generic registers are reserved.
But perf_reg_validate() doesn't check these bits.
Add PERF_REG_X86_RESERVED for reserved bits on X86.
Check the reserved bits in perf_reg_validate().
Reported-by: Vince Weaver <vincent.weaver@maine.edu>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: 878068ea27
("perf/x86: Support outputting XMM registers")
Link: https://lkml.kernel.org/r/1559081314-9714-2-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
parent
e321d02db8
commit
90d424915a
1 changed files with 5 additions and 2 deletions
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@ -74,6 +74,9 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
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return regs_get_register(regs, pt_regs_offset[idx]);
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}
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#define PERF_REG_X86_RESERVED (((1ULL << PERF_REG_X86_XMM0) - 1) & \
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~((1ULL << PERF_REG_X86_MAX) - 1))
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#ifdef CONFIG_X86_32
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#define REG_NOSUPPORT ((1ULL << PERF_REG_X86_R8) | \
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(1ULL << PERF_REG_X86_R9) | \
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@ -86,7 +89,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
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int perf_reg_validate(u64 mask)
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{
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if (!mask || (mask & REG_NOSUPPORT))
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if (!mask || (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED)))
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return -EINVAL;
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return 0;
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@ -112,7 +115,7 @@ void perf_get_regs_user(struct perf_regs *regs_user,
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int perf_reg_validate(u64 mask)
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{
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if (!mask || (mask & REG_NOSUPPORT))
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if (!mask || (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED)))
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return -EINVAL;
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return 0;
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