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powerpc/40x: Refactor exception entry macros by using head_32.h
Refactor exception entry macros by using the ones defined in head_32.h Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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7271fc9604
commit
90f204b9a1
2 changed files with 6 additions and 86 deletions
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@ -59,8 +59,12 @@
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stw r1,GPR1(r11)
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stw r1,0(r11)
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tovirt(r1,r11) /* set new kernel sp */
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#ifdef CONFIG_40x
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rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
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#else
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li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR) /* can take exceptions */
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MTMSRD(r10) /* (except for mach check in rtas) */
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#endif
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stw r0,GPR0(r11)
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lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
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addi r10,r10,STACK_FRAME_REGS_MARKER@l
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@ -44,6 +44,8 @@
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#include <asm/export.h>
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#include <asm/asm-405.h>
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#include "head_32.h"
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/* As with the other PowerPC ports, it is expected that when code
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* execution begins here, the following registers contain valid, yet
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* optional, information:
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@ -98,52 +100,6 @@ _ENTRY(crit_srr1)
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_ENTRY(saved_ksp_limit)
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.space 4
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/*
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* Exception vector entry code. This code runs with address translation
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* turned off (i.e. using physical addresses). We assume SPRG_THREAD has
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* the physical address of the current task thread_struct.
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*/
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#define EXCEPTION_PROLOG \
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mtspr SPRN_SPRG_SCRATCH0,r10; /* save two registers to work with */\
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mtspr SPRN_SPRG_SCRATCH1,r11; \
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mfcr r10; /* save CR in r10 for now */\
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EXCEPTION_PROLOG_1; \
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EXCEPTION_PROLOG_2
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#define EXCEPTION_PROLOG_1 \
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mfspr r11,SPRN_SRR1; /* check whether user or kernel */\
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andi. r11,r11,MSR_PR; \
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tophys(r11,r1); \
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beq 1f; \
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mfspr r11,SPRN_SPRG_THREAD; /* if from user, start at top of */\
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lwz r11,TASK_STACK-THREAD(r11); /* this thread's kernel stack */\
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addi r11,r11,THREAD_SIZE; \
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tophys(r11,r11); \
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1: subi r11,r11,INT_FRAME_SIZE /* Allocate an exception frame */
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#define EXCEPTION_PROLOG_2 \
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stw r10,_CCR(r11); /* save various registers */\
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stw r12,GPR12(r11); \
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stw r9,GPR9(r11); \
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mfspr r10,SPRN_SPRG_SCRATCH0; \
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stw r10,GPR10(r11); \
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mfspr r12,SPRN_SPRG_SCRATCH1; \
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stw r12,GPR11(r11); \
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mflr r10; \
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stw r10,_LINK(r11); \
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mfspr r12,SPRN_SRR0; \
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stw r1,GPR1(r11); \
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mfspr r9,SPRN_SRR1; \
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stw r1,0(r11); \
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tovirt(r1,r11); /* set new kernel sp */ \
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rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
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stw r0,GPR0(r11); \
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lis r10, STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */\
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addi r10, r10, STACK_FRAME_REGS_MARKER@l; \
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stw r10, 8(r11); \
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SAVE_4GPRS(3, r11); \
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SAVE_2GPRS(7, r11)
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/*
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* Exception prolog for critical exceptions. This is a little different
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* from the normal exception prolog above since a critical exception
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@ -205,16 +161,6 @@ _ENTRY(saved_ksp_limit)
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/*
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* Exception vectors.
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*/
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#define START_EXCEPTION(n, label) \
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. = n; \
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label:
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#define EXCEPTION(n, label, hdlr, xfer) \
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START_EXCEPTION(n, label); \
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EXCEPTION_PROLOG; \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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xfer(n, hdlr)
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#define CRITICAL_EXCEPTION(n, label, hdlr) \
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START_EXCEPTION(n, label); \
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CRITICAL_EXCEPTION_PROLOG; \
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@ -223,36 +169,6 @@ label:
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NOCOPY, crit_transfer_to_handler, \
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ret_from_crit_exc)
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#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \
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li r10,trap; \
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stw r10,_TRAP(r11); \
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lis r10,msr@h; \
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ori r10,r10,msr@l; \
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copyee(r10, r9); \
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bl tfer; \
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.long hdlr; \
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.long ret
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#define COPY_EE(d, s) rlwimi d,s,0,16,16
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#define NOCOPY(d, s)
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#define EXC_XFER_STD(n, hdlr) \
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EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
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ret_from_except_full)
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#define EXC_XFER_LITE(n, hdlr) \
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EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
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ret_from_except)
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#define EXC_XFER_EE(n, hdlr) \
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EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
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ret_from_except_full)
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#define EXC_XFER_EE_LITE(n, hdlr) \
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EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
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ret_from_except)
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/*
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* 0x0100 - Critical Interrupt Exception
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*/
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