qlcnic: Fix mailbox response handling.
o Fix mailbox response poll time to maximum 5 seconds which includes mailbox response time as well as time required for processing AEN if any. o Driver need to read firmware control mailbox register instead of host control mailbox register. Signed-off-by: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com> Signed-off-by: Rajesh Borundia <rajesh.borundia@qlogic.com> Signed-off-by: Shahed Shaikh <shahed.shaikh@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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13a82b44fd
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9106e5db83
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@ -696,15 +696,14 @@ u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *adapter)
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return 1;
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return 1;
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}
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}
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u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *adapter)
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u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *adapter, u32 *wait_time)
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{
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{
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u32 data;
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u32 data;
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unsigned long wait_time = 0;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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/* wait for mailbox completion */
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/* wait for mailbox completion */
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do {
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do {
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data = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
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data = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
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if (++wait_time > QLCNIC_MBX_TIMEOUT) {
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if (++(*wait_time) > QLCNIC_MBX_TIMEOUT) {
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data = QLCNIC_RCODE_TIMEOUT;
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data = QLCNIC_RCODE_TIMEOUT;
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break;
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break;
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}
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}
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@ -720,8 +719,8 @@ int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
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u16 opcode;
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u16 opcode;
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u8 mbx_err_code;
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u8 mbx_err_code;
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unsigned long flags;
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unsigned long flags;
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u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, wait_time = 0;
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opcode = LSW(cmd->req.arg[0]);
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opcode = LSW(cmd->req.arg[0]);
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if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
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if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
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@ -754,15 +753,13 @@ int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
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/* Signal FW about the impending command */
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/* Signal FW about the impending command */
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QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
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QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
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poll:
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poll:
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rsp = qlcnic_83xx_mbx_poll(adapter);
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rsp = qlcnic_83xx_mbx_poll(adapter, &wait_time);
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if (rsp != QLCNIC_RCODE_TIMEOUT) {
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if (rsp != QLCNIC_RCODE_TIMEOUT) {
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/* Get the FW response data */
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/* Get the FW response data */
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fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
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fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
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if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
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if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
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__qlcnic_83xx_process_aen(adapter);
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__qlcnic_83xx_process_aen(adapter);
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mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
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goto poll;
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if (mbx_val)
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goto poll;
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}
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}
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mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
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mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
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rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
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rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
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@ -620,7 +620,7 @@ int qlcnic_83xx_flash_test(struct qlcnic_adapter *);
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int qlcnic_83xx_enable_flash_write(struct qlcnic_adapter *);
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int qlcnic_83xx_enable_flash_write(struct qlcnic_adapter *);
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int qlcnic_83xx_disable_flash_write(struct qlcnic_adapter *);
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int qlcnic_83xx_disable_flash_write(struct qlcnic_adapter *);
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u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *);
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u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *);
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u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *);
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u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *, u32 *);
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void qlcnic_83xx_enable_mbx_poll(struct qlcnic_adapter *);
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void qlcnic_83xx_enable_mbx_poll(struct qlcnic_adapter *);
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void qlcnic_83xx_disable_mbx_poll(struct qlcnic_adapter *);
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void qlcnic_83xx_disable_mbx_poll(struct qlcnic_adapter *);
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#endif
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#endif
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@ -134,7 +134,7 @@ struct qlcnic_mailbox_metadata {
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#define QLCNIC_SET_OWNER 1
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#define QLCNIC_SET_OWNER 1
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#define QLCNIC_CLR_OWNER 0
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#define QLCNIC_CLR_OWNER 0
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#define QLCNIC_MBX_TIMEOUT 10000
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#define QLCNIC_MBX_TIMEOUT 5000
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#define QLCNIC_MBX_RSP_OK 1
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#define QLCNIC_MBX_RSP_OK 1
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#define QLCNIC_MBX_PORT_RSP_OK 0x1a
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#define QLCNIC_MBX_PORT_RSP_OK 0x1a
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@ -280,9 +280,9 @@ void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
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static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
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static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
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u32 *pay, u8 pci_func, u8 size)
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u32 *pay, u8 pci_func, u8 size)
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{
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{
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u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, val, wait_time = 0;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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unsigned long flags;
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unsigned long flags;
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u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, val;
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u16 opcode;
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u16 opcode;
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u8 mbx_err_code;
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u8 mbx_err_code;
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int i, j;
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int i, j;
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@ -330,15 +330,13 @@ static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
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* assume something is wrong.
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* assume something is wrong.
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*/
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*/
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poll:
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poll:
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rsp = qlcnic_83xx_mbx_poll(adapter);
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rsp = qlcnic_83xx_mbx_poll(adapter, &wait_time);
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if (rsp != QLCNIC_RCODE_TIMEOUT) {
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if (rsp != QLCNIC_RCODE_TIMEOUT) {
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/* Get the FW response data */
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/* Get the FW response data */
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fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
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fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
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if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
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if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
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__qlcnic_83xx_process_aen(adapter);
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__qlcnic_83xx_process_aen(adapter);
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mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
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goto poll;
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if (mbx_val)
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goto poll;
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}
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}
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mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
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mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
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rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
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rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
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