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powerpc/82xx: mgcoge - updates for 2.6.32
- add I2C support - add FCC1 and FCC2 support - fix bogus gpio numbering in plattform code Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Heiko Schocher
Benjamin Herrenschmidt
parent
8640d3bf71
commit
9239c89bc9
2 changed files with 113 additions and 9 deletions
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@ -162,6 +162,59 @@ eth0: ethernet@11a60 {
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fixed-link = <0 0 10 0 0>;
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};
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i2c@11860 {
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compatible = "fsl,mpc8272-i2c",
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"fsl,cpm2-i2c";
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reg = <0x11860 0x20 0x8afc 0x2>;
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interrupts = <1 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-command = <0x29600000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mdio@10d40 {
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compatible = "fsl,cpm2-mdio-bitbang";
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reg = <0x10d00 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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fsl,mdio-pin = <12>;
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fsl,mdc-pin = <13>;
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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};
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/* FCC1 management to switch */
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ethernet@11300 {
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device_type = "network";
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compatible = "fsl,cpm2-fcc-enet";
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reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
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local-mac-address = [ 00 01 02 03 04 07 ];
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interrupts = <32 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&phy0>;
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linux,network-index = <1>;
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fsl,cpm-command = <0x12000300>;
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};
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/* FCC2 to redundant core unit over backplane */
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ethernet@11320 {
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device_type = "network";
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compatible = "fsl,cpm2-fcc-enet";
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reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
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local-mac-address = [ 00 01 02 03 04 08 ];
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interrupts = <33 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&phy1>;
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linux,network-index = <2>;
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fsl,cpm-command = <0x16200300>;
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};
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};
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PIC: interrupt-controller@10c00 {
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@ -50,16 +50,63 @@ struct cpm_pin {
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static __initdata struct cpm_pin mgcoge_pins[] = {
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/* SMC2 */
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{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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/* SCC4 */
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{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{4, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{4, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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/* FCC1 */
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{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC2 */
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{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* MDC */
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{0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
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#if defined(CONFIG_I2C_CPM)
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/* I2C */
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{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
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{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
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#endif
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};
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static void __init init_ioports(void)
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@ -68,12 +115,16 @@ static void __init init_ioports(void)
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for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) {
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const struct cpm_pin *pin = &mgcoge_pins[i];
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cpm2_set_pin(pin->port - 1, pin->pin, pin->flags);
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cpm2_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
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cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
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}
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static void __init mgcoge_setup_arch(void)
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