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drm/i2c: tda998x: correct PLL divider calculation
The serializer PLL divider is a power-of-two divider, so our calculation which assumes that it's a numerical divider is incorrect. Replace it with one that results in a power-of-two divider value instead. Tested with all supported modes with a Samsung S24C750. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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1 changed files with 14 additions and 6 deletions
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@ -1343,6 +1343,7 @@ static void tda998x_bridge_mode_set(struct drm_bridge *bridge,
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struct drm_display_mode *adjusted_mode)
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{
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struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge);
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unsigned long tmds_clock;
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u16 ref_pix, ref_line, n_pix, n_line;
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u16 hs_pix_s, hs_pix_e;
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u16 vs1_pix_s, vs1_pix_e, vs1_line_s, vs1_line_e;
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@ -1413,12 +1414,19 @@ static void tda998x_bridge_mode_set(struct drm_bridge *bridge,
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(mode->vsync_end - mode->vsync_start)/2;
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}
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div = 148500 / mode->clock;
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if (div != 0) {
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div--;
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if (div > 3)
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div = 3;
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}
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tmds_clock = mode->clock;
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/*
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* The divisor is power-of-2. The TDA9983B datasheet gives
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* this as ranges of Msample/s, which is 10x the TMDS clock:
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* 0 - 800 to 1500 Msample/s
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* 1 - 400 to 800 Msample/s
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* 2 - 200 to 400 Msample/s
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* 3 - as 2 above
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*/
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for (div = 0; div < 3; div++)
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if (80000 >> div <= tmds_clock)
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break;
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mutex_lock(&priv->audio_mutex);
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