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drm/i915: Calculate watermark related members in the crtc_state, v4.
This removes pre/post_wm_update from intel_crtc->atomic, and creates atomic state for it in intel_crtc. Changes since v1: - Rebase on top of wm changes. Changes since v2: - Split disable_cxsr into a separate patch. Changes since v3: - Move some of the changes to intel_wm_need_update. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/56603A49.5000507@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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ab1d3a0e5a
commit
92826fcdfc
3 changed files with 21 additions and 21 deletions
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@ -96,6 +96,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
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crtc_state->update_pipe = false;
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crtc_state->disable_lp_wm = false;
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crtc_state->disable_cxsr = false;
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crtc_state->wm_changed = false;
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return &crtc_state->base;
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}
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@ -4793,6 +4793,8 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
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static void intel_post_plane_update(struct intel_crtc *crtc)
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{
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struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
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struct intel_crtc_state *pipe_config =
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to_intel_crtc_state(crtc->base.state);
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struct drm_device *dev = crtc->base.dev;
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if (atomic->wait_vblank)
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@ -4802,7 +4804,7 @@ static void intel_post_plane_update(struct intel_crtc *crtc)
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crtc->wm.cxsr_allowed = true;
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if (crtc->atomic.update_wm_post)
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if (pipe_config->wm_changed)
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intel_update_watermarks(&crtc->base);
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if (atomic->update_fbc)
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@ -4835,6 +4837,9 @@ static void intel_pre_plane_update(struct intel_crtc *crtc)
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crtc->wm.cxsr_allowed = false;
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intel_set_memory_cxsr(dev_priv, false);
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}
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if (!needs_modeset(&pipe_config->base) && pipe_config->wm_changed)
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intel_update_watermarks(&crtc->base);
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}
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static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask)
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@ -11696,9 +11701,14 @@ static bool intel_wm_need_update(struct drm_plane *plane,
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struct intel_plane_state *cur = to_intel_plane_state(plane->state);
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/* Update watermarks on tiling or size changes. */
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if (!plane->state->fb || !state->fb ||
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plane->state->fb->modifier[0] != state->fb->modifier[0] ||
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plane->state->rotation != state->rotation ||
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if (new->visible != cur->visible)
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return true;
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if (!cur->base.fb || !new->base.fb)
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return false;
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if (cur->base.fb->modifier[0] != new->base.fb->modifier[0] ||
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cur->base.rotation != new->base.rotation ||
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drm_rect_width(&new->src) != drm_rect_width(&cur->src) ||
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drm_rect_height(&new->src) != drm_rect_height(&cur->src) ||
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drm_rect_width(&new->dst) != drm_rect_width(&cur->dst) ||
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@ -11768,17 +11778,9 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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plane->base.id, was_visible, visible,
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turn_off, turn_on, mode_changed);
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if (turn_on) {
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intel_crtc->atomic.update_wm_pre = true;
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/* must disable cxsr around plane enable/disable */
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if (plane->type != DRM_PLANE_TYPE_CURSOR) {
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pipe_config->disable_cxsr = true;
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/* to potentially re-enable cxsr */
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intel_crtc->atomic.wait_vblank = true;
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intel_crtc->atomic.update_wm_post = true;
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}
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} else if (turn_off) {
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intel_crtc->atomic.update_wm_post = true;
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if (turn_on || turn_off) {
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pipe_config->wm_changed = true;
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/* must disable cxsr around plane enable/disable */
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if (plane->type != DRM_PLANE_TYPE_CURSOR) {
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if (is_crtc_enabled)
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@ -11786,7 +11788,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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pipe_config->disable_cxsr = true;
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}
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} else if (intel_wm_need_update(plane, plane_state)) {
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intel_crtc->atomic.update_wm_pre = true;
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pipe_config->wm_changed = true;
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}
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if (visible || was_visible)
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@ -11931,7 +11933,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
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}
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if (mode_changed && !crtc_state->active)
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intel_crtc->atomic.update_wm_post = true;
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pipe_config->wm_changed = true;
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if (mode_changed && crtc_state->enable &&
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dev_priv->display.crtc_compute_clock &&
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@ -13854,9 +13856,6 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
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to_intel_crtc_state(old_crtc_state);
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bool modeset = needs_modeset(crtc->state);
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if (intel_crtc->atomic.update_wm_pre)
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intel_update_watermarks(crtc);
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/* Perform vblank evasion around commit operation */
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intel_pipe_update_start(intel_crtc);
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@ -369,6 +369,7 @@ struct intel_crtc_state {
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bool update_pipe; /* can a fast modeset be performed? */
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bool disable_cxsr;
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bool wm_changed; /* watermarks are updated */
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/* Pipe source size (ie. panel fitter input size)
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* All planes will be positioned inside this space,
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@ -535,7 +536,6 @@ struct intel_crtc_atomic_commit {
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bool disable_fbc;
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bool disable_ips;
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bool pre_disable_primary;
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bool update_wm_pre, update_wm_post;
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/* Sleepable operations to perform after commit */
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unsigned fb_bits;
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