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ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc.

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The nodes have been split to allow as much commonality as possible.
The stih407 has a silicon bug with eMMC UHS modes (with top regs)
and as such doesn't have any of the uhs dt properties.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This commit is contained in:
Peter Griffin 2015-04-10 11:40:00 +02:00 committed by Maxime Coquelin
parent b0bb2bae19
commit 9286ac4829
3 changed files with 48 additions and 0 deletions
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30
arch/arm/boot/dts/stih407-family.dtsi
View file

@ -421,5 +421,35 @@ spi@9542000 {
status = "disabled";
};
mmc0: sdhci@09060000 {
compatible = "st,sdhci-stih407", "st,sdhci";
status = "disabled";
reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
reg-names = "mmc", "top-mmc-delay";
interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
interrupt-names = "mmcirq";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0>;
clock-names = "mmc";
clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
bus-width = <8>;
non-removable;
};
mmc1: sdhci@09080000 {
compatible = "st,sdhci-stih407", "st,sdhci";
status = "disabled";
reg = <0x09080000 0x7ff>;
reg-names = "mmc";
interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
interrupt-names = "mmcirq";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1>;
clock-names = "mmc";
clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
resets = <&softreset STIH407_MMC1_SOFTRESET>;
bus-width = <4>;
};
};
};

10
arch/arm/boot/dts/stih410-b2120.dts
View file

@ -26,4 +26,14 @@ memory {
aliases {
ttyAS0 = &sbc_serial0;
};
soc {
mmc0: sdhci@09060000 {
max-frequency = <200000000>;
sd-uhs-sdr50;
sd-uhs-sdr104;
sd-uhs-ddr50;
};
};
};

8
arch/arm/boot/dts/stihxxx-b2120.dtsi
View file

@ -47,6 +47,14 @@ i2c@9540000 {
status = "okay";
};
mmc0: sdhci@09060000 {
status = "okay";
};
mmc1: sdhci@09080000 {
status = "okay";
};
/* SSC11 to HDMI */
hdmiddc: i2c@9541000 {
status = "okay";