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ARM: OMAP1: Move UART defines to prepare for sparse IRQ
These have been indirectly included via asm/irqs.h that has included mach/hardware.h unless SPARSE_IRQ is specified. Let's move them to where the other OMAP serial defines for 8250 are. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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2 changed files with 3 additions and 5 deletions
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@ -27,11 +27,6 @@
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*/
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*/
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#define OMAP_UART_INFO_OFS 0x3ffc
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#define OMAP_UART_INFO_OFS 0x3ffc
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/* OMAP1 serial ports */
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#define OMAP1_UART1_BASE 0xfffb0000
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#define OMAP1_UART2_BASE 0xfffb0800
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#define OMAP1_UART3_BASE 0xfffb9800
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#define OMAP_PORT_SHIFT 2
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#define OMAP_PORT_SHIFT 2
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#define OMAP7XX_PORT_SHIFT 0
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#define OMAP7XX_PORT_SHIFT 0
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@ -331,6 +331,9 @@
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* Extra serial register definitions for the internal UARTs
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* Extra serial register definitions for the internal UARTs
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* in TI OMAP processors.
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* in TI OMAP processors.
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*/
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*/
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#define OMAP1_UART1_BASE 0xfffb0000
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#define OMAP1_UART2_BASE 0xfffb0800
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#define OMAP1_UART3_BASE 0xfffb9800
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#define UART_OMAP_MDR1 0x08 /* Mode definition register */
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#define UART_OMAP_MDR1 0x08 /* Mode definition register */
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#define UART_OMAP_MDR2 0x09 /* Mode definition register 2 */
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#define UART_OMAP_MDR2 0x09 /* Mode definition register 2 */
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#define UART_OMAP_SCR 0x10 /* Supplementary control register */
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#define UART_OMAP_SCR 0x10 /* Supplementary control register */
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