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drm/i915: Disable FDI after the CRT port on LPT-H
Bspec modeset sequence tells us to disable the PCH transcoder and FDI after the CRT port on LPT-H, so let's do that. And the CRT port should be disabled after the pipe, as we do on other PCH platforms too since commit1ea56e269e
("drm/i915: Disable CRT port after pipe on PCH platforms") commit00490c22b1
("drm/i915: Consider SPLL as another shared pll, v2.") moved the SPLL disable from the .post_disable() hook to some upper level code, so we can just move the CRT port disabling into the .post_disable() hook. If we still had the non-shared SPLL, it would have needed to be moved into the .post_pll_disable() hook. v2: Actually move the CRT port disable to the .post_disable() hook, and amend the commit message with more details (Paulo) v3: Fix typos in commit message (Paulo) Cc: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1449583548-11896-1-git-send-email-ville.syrjala@linux.intel.com
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parent
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commit
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2 changed files with 6 additions and 7 deletions
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@ -844,7 +844,7 @@ void intel_crt_init(struct drm_device *dev)
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crt->adpa_reg = adpa_reg;
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crt->base.compute_config = intel_crt_compute_config;
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if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev)) {
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if (HAS_PCH_SPLIT(dev)) {
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crt->base.disable = pch_disable_crt;
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crt->base.post_disable = pch_post_disable_crt;
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} else {
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@ -5164,18 +5164,17 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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if (!intel_crtc->config->has_dsi_encoder)
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intel_ddi_disable_pipe_clock(intel_crtc);
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if (intel_crtc->config->has_pch_encoder) {
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lpt_disable_pch_transcoder(dev_priv);
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intel_ddi_fdi_disable(crtc);
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}
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for_each_encoder_on_crtc(dev, crtc, encoder)
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if (encoder->post_disable)
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encoder->post_disable(encoder);
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if (intel_crtc->config->has_pch_encoder)
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if (intel_crtc->config->has_pch_encoder) {
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lpt_disable_pch_transcoder(dev_priv);
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intel_ddi_fdi_disable(crtc);
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intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
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true);
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}
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intel_fbc_disable_crtc(intel_crtc);
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}
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