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Code Issues Releases Wiki Activity

radeon/audio: moved VBI packet programming to separate functions

Browse source 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2015-01-20 19:20:52 -05:00
parent 64424d6e45
commit 930a978512
5 changed files with 45 additions and 21 deletions
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9
drivers/gpu/drm/radeon/dce3_1_afmt.c
View file

@ -226,9 +226,7 @@ void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *m
radeon_audio_enable(rdev, dig->afmt->pin, 0);
radeon_audio_set_dto(encoder, mode->clock);
WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
HDMI0_NULL_SEND); /* send null packets when required */
radeon_audio_set_vbi_packet(encoder);
WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000);
@ -252,11 +250,6 @@ void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *m
radeon_audio_write_sad_regs(encoder);
}
WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
HDMI0_NULL_SEND | /* send null packets when required */
HDMI0_GC_SEND | /* send general control packets */
HDMI0_GC_CONT); /* send general control packets every frame */
/* TODO: HDMI0_AUDIO_INFO_UPDATE */
WREG32(HDMI0_INFOFRAME_CONTROL0 + offset,
HDMI0_AVI_INFO_SEND | /* enable AVI info frames */

20
drivers/gpu/drm/radeon/evergreen_hdmi.c
View file

@ -289,6 +289,17 @@ void dce4_dp_audio_set_dto(struct radeon_device *rdev,
WREG32(DCCG_AUDIO_DTO1_MODULE, rdev->clock.max_pixel_clock * 10);
}
void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset)
{
struct drm_device *dev = encoder->dev;
struct radeon_device *rdev = dev->dev_private;
WREG32(HDMI_VBI_PACKET_CONTROL + offset,
HDMI_NULL_SEND | /* send null packets when required */
HDMI_GC_SEND | /* send general control packets */
HDMI_GC_CONT); /* send general control packets every frame */
}
/*
* update the info frames with the data from the current display mode
*/
@ -325,9 +336,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
radeon_audio_enable(rdev, dig->afmt->pin, 0);
radeon_audio_set_dto(encoder, mode->clock);
WREG32(HDMI_VBI_PACKET_CONTROL + offset,
HDMI_NULL_SEND); /* send null packets when required */
radeon_audio_set_vbi_packet(encoder);
WREG32(AFMT_AUDIO_CRC_CONTROL + offset, 0x1000);
@ -360,11 +369,6 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
WREG32(HDMI_CONTROL + offset, val);
WREG32(HDMI_VBI_PACKET_CONTROL + offset,
HDMI_NULL_SEND | /* send null packets when required */
HDMI_GC_SEND | /* send general control packets */
HDMI_GC_CONT); /* send general control packets every frame */
WREG32(HDMI_INFOFRAME_CONTROL0 + offset,
HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */

17
drivers/gpu/drm/radeon/r600_hdmi.c
View file

@ -329,6 +329,17 @@ void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
}
}
void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset)
{
struct drm_device *dev = encoder->dev;
struct radeon_device *rdev = dev->dev_private;
WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset,
HDMI0_NULL_SEND | /* send null packets when required */
HDMI0_GC_SEND | /* send general control packets */
HDMI0_GC_CONT); /* send general control packets every frame */
}
/*
* update the info frames with the data from the current display mode
*/
@ -356,6 +367,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
radeon_audio_enable(rdev, dig->afmt->pin, 0);
radeon_audio_set_dto(encoder, mode->clock);
radeon_audio_set_vbi_packet(encoder);
WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,
HDMI0_AUDIO_SAMPLE_SEND | /* send audio packets */
@ -367,11 +379,6 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
HDMI0_AUDIO_PACKETS_PER_LINE_MASK |
HDMI0_60958_CS_UPDATE));
WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset,
HDMI0_NULL_SEND | /* send null packets when required */
HDMI0_GC_SEND | /* send general control packets */
HDMI0_GC_CONT); /* send general control packets every frame */
WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,
HDMI0_AVI_INFO_SEND | /* enable AVI info frames */
HDMI0_AVI_INFO_CONT | /* send AVI info frames every frame/field */

18
drivers/gpu/drm/radeon/radeon_audio.c
View file

@ -85,6 +85,8 @@ void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
const struct radeon_hdmi_acr *acr);
void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
const struct radeon_hdmi_acr *acr);
void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
static const u32 pin_offsets[7] =
{
@ -140,6 +142,7 @@ static struct radeon_audio_funcs r600_hdmi_funcs = {
.get_pin = r600_audio_get_pin,
.set_dto = r600_hdmi_audio_set_dto,
.update_acr = r600_hdmi_update_acr,
.set_vbi_packet = r600_set_vbi_packet,
};
static struct radeon_audio_funcs dce32_hdmi_funcs = {
@ -148,6 +151,7 @@ static struct radeon_audio_funcs dce32_hdmi_funcs = {
.write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
.set_dto = dce3_2_audio_set_dto,
.update_acr = dce3_2_hdmi_update_acr,
.set_vbi_packet = r600_set_vbi_packet,
};
static struct radeon_audio_funcs dce32_dp_funcs = {
@ -164,6 +168,7 @@ static struct radeon_audio_funcs dce4_hdmi_funcs = {
.write_latency_fields = dce4_afmt_write_latency_fields,
.set_dto = dce4_hdmi_audio_set_dto,
.update_acr = evergreen_hdmi_update_acr,
.set_vbi_packet = dce4_set_vbi_packet,
};
static struct radeon_audio_funcs dce4_dp_funcs = {
@ -182,6 +187,7 @@ static struct radeon_audio_funcs dce6_hdmi_funcs = {
.write_latency_fields = dce6_afmt_write_latency_fields,
.set_dto = dce6_hdmi_audio_set_dto,
.update_acr = evergreen_hdmi_update_acr,
.set_vbi_packet = dce4_set_vbi_packet,
};
static struct radeon_audio_funcs dce6_dp_funcs = {
@ -556,3 +562,15 @@ void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
}
void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
{
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
if (!dig || !dig->afmt)
return;
if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
}

2
drivers/gpu/drm/radeon/radeon_audio.h
View file

@ -57,6 +57,7 @@ struct radeon_audio_funcs
struct radeon_crtc *crtc, unsigned int clock);
void (*update_acr)(struct drm_encoder *encoder, long offset,
const struct radeon_hdmi_acr *acr);
void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset);
};
int radeon_audio_init(struct radeon_device *rdev);
@ -79,5 +80,6 @@ void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock);
void radeon_update_avi_infoframe(struct drm_encoder *encoder, void *buffer,
size_t size);
void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock);
void radeon_audio_set_vbi_packet(struct drm_encoder *encoder);
#endif