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clk: mediatek: update missing clock data for MT7622 audsys

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Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Ryder Lee 2018-03-06 17:09:26 +08:00 committed by Stephen Boyd
parent 89cd7aec21
commit 936ceb12c5
2 changed files with 3 additions and 1 deletions
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1
drivers/clk/mediatek/clk-mt7622-aud.c
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@ -106,6 +106,7 @@ static const struct mtk_gate audio_clks[] = {
GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
/* AUDIO2 */
GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),

3
include/dt-bindings/clock/mt7622-clk.h
View file

@ -235,7 +235,8 @@
#define CLK_AUDIO_MEM_ASRC3 43
#define CLK_AUDIO_MEM_ASRC4 44
#define CLK_AUDIO_MEM_ASRC5 45
#define CLK_AUDIO_NR_CLK 46
#define CLK_AUDIO_AFE_CONN 46
#define CLK_AUDIO_NR_CLK 47
/* SSUSBSYS */