mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 02:39:48 +00:00
staging: r8712u: Merging Realtek's latest (v2.6.6). Tx aggregation.
Tx Aggregation (CONFIG_R8712_TX_AGGR, known as CONFIG_USB_TX_AGGR in the Realtek tarball) is now added. However, its tests have not been successful! The default in the Realtek tarball is to not build it -- and the Release Notes does not seem to list this as a feature. I have tested the driver with and without this feature; the former does not successfully associate when WPA2 is used. Signed-off-by: Ali Bahar <ali@internetDog.org> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
ee5b1aadfd
commit
93c55dda09
4 changed files with 266 additions and 2 deletions
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@ -16,4 +16,11 @@ config R8712_AP
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---help---
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This option allows the Realtek RTL8712 USB device to be an Access Point.
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config R8712_TX_AGGR
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bool "Realtek RTL8712U Transmit Aggregation code"
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depends on R8712U && BROKEN
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default N
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---help---
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This option provides transmit aggregation for the Realtek RTL8712 USB device.
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@ -260,6 +260,159 @@ void r8712_do_queue_select(struct _adapter *padapter,
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pattrib->qsel = qsel;
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}
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#ifdef CONFIG_R8712_TX_AGGR
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u8 r8712_construct_txaggr_cmd_desc(struct xmit_buf *pxmitbuf)
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{
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struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf;
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/* Fill up TxCmd Descriptor according as USB FW Tx Aaggregation info.*/
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/* dw0 */
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ptx_desc->txdw0 = cpu_to_le32(CMD_HDR_SZ&0xffff);
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ptx_desc->txdw0 |=
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cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);
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ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
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/* dw1 */
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ptx_desc->txdw1 |= cpu_to_le32((0x13<<QSEL_SHT)&0x00001f00);
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return _SUCCESS;
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}
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u8 r8712_construct_txaggr_cmd_hdr(struct xmit_buf *pxmitbuf)
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{
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struct xmit_frame *pxmitframe = (struct xmit_frame *)
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pxmitbuf->priv_data;
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struct _adapter *padapter = pxmitframe->padapter;
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struct cmd_priv *pcmdpriv = &(padapter->cmdpriv);
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struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *)
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(pxmitbuf->pbuf + TXDESC_SIZE);
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/* Fill up Cmd Header for USB FW Tx Aggregation.*/
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/* dw0 */
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pcmd_hdr->cmd_dw0 = cpu_to_le32((GEN_CMD_CODE(_AMSDU_TO_AMPDU) << 16) |
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(pcmdpriv->cmd_seq << 24));
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pcmdpriv->cmd_seq++;
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return _SUCCESS;
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}
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u8 r8712_append_mpdu_unit(struct xmit_buf *pxmitbuf,
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struct xmit_frame *pxmitframe)
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{
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struct _adapter *padapter = pxmitframe->padapter;
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struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf;
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int last_txcmdsz = 0;
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int padding_sz = 0;
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/* 802.3->802.11 convertor */
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r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
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/* free skb struct */
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r8712_xmit_complete(padapter, pxmitframe);
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if (pxmitframe->attrib.ether_type != 0x0806) {
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if ((pxmitframe->attrib.ether_type != 0x888e) &&
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(pxmitframe->attrib.dhcp_pkt != 1)) {
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r8712_issue_addbareq_cmd(padapter,
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pxmitframe->attrib.priority);
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}
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}
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pxmitframe->last[0] = 1;
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update_txdesc(pxmitframe, (uint *)(pxmitframe->buf_addr),
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pxmitframe->attrib.last_txcmdsz);
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/*padding zero */
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last_txcmdsz = pxmitframe->attrib.last_txcmdsz;
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padding_sz = (8 - (last_txcmdsz % 8));
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if ((last_txcmdsz % 8) != 0) {
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int i;
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for (i = 0; i < padding_sz; i++)
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*(pxmitframe->buf_addr+TXDESC_SIZE+last_txcmdsz+i) = 0;
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}
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/* Add the new mpdu's length */
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ptx_desc->txdw0 = cpu_to_le32((ptx_desc->txdw0&0xffff0000) |
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((ptx_desc->txdw0&0x0000ffff)+
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((TXDESC_SIZE+last_txcmdsz+padding_sz)&0x0000ffff)));
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return _SUCCESS;
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}
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u8 r8712_xmitframe_aggr_1st(struct xmit_buf *pxmitbuf,
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struct xmit_frame *pxmitframe)
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{
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/* linux complete context doesnt need to protect */
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pxmitframe->pxmitbuf = pxmitbuf;
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pxmitbuf->priv_data = pxmitframe;
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pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
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/* buffer addr assoc */
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pxmitframe->buf_addr = pxmitbuf->pbuf+TXDESC_SIZE+CMD_HDR_SZ;
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/*RTL8712_DMA_H2CCMD */
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r8712_construct_txaggr_cmd_desc(pxmitbuf);
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r8712_construct_txaggr_cmd_hdr(pxmitbuf);
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if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS)
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pxmitbuf->aggr_nr = 1;
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return _SUCCESS;
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}
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u16 r8712_xmitframe_aggr_next(struct xmit_buf *pxmitbuf,
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struct xmit_frame *pxmitframe)
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{
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pxmitframe->pxmitbuf = pxmitbuf;
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pxmitbuf->priv_data = pxmitframe;
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pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
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/* buffer addr assoc */
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pxmitframe->buf_addr = pxmitbuf->pbuf + TXDESC_SIZE +
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(((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff);
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if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS) {
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r8712_free_xmitframe_ex(&pxmitframe->padapter->xmitpriv,
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pxmitframe);
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pxmitbuf->aggr_nr++;
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}
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return TXDESC_SIZE +
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(((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff);
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}
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u8 r8712_dump_aggr_xframe(struct xmit_buf *pxmitbuf,
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struct xmit_frame *pxmitframe)
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{
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struct _adapter *padapter = pxmitframe->padapter;
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struct dvobj_priv *pdvobj = (struct dvobj_priv *) &padapter->dvobjpriv;
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struct tx_desc * ptxdesc = (struct tx_desc *)pxmitbuf->pbuf;
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struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *)
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(pxmitbuf->pbuf + TXDESC_SIZE);
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u16 total_length = (u16) (ptxdesc->txdw0 & 0xffff);
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/* use 1st xmitframe as media */
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xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf);
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pcmd_hdr->cmd_dw0 = cpu_to_le32(((total_length-CMD_HDR_SZ)&0x0000ffff)|
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(pcmd_hdr->cmd_dw0&0xffff0000));
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/* urb length in cmd_dw1 */
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pcmd_hdr->cmd_dw1 = cpu_to_le32((pxmitbuf->aggr_nr & 0xff)|
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((total_length+TXDESC_SIZE) << 16));
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pxmitframe->last[0] = 1;
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pxmitframe->bpending[0] = false;
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pxmitframe->mem_addr = pxmitbuf->pbuf;
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if ((pdvobj->ishighspeed && ((total_length+TXDESC_SIZE)%0x200) == 0) ||
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((!pdvobj->ishighspeed &&
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((total_length+TXDESC_SIZE)%0x40) == 0))) {
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ptxdesc->txdw0 |= cpu_to_le32
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(((TXDESC_SIZE+OFFSET_SZ+8)<<OFFSET_SHT)&0x00ff0000);
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/*32 bytes for TX Desc + 8 bytes pending*/
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} else {
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ptxdesc->txdw0 |= cpu_to_le32
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(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);
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/*default = 32 bytes for TX Desc*/
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}
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r8712_write_port(pxmitframe->padapter, RTL8712_DMA_H2CCMD,
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total_length+TXDESC_SIZE, (u8 *)pxmitframe);
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return _SUCCESS;
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}
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#endif
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static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz)
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{
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uint qsel;
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struct pkt_attrib *pattrib = &pxmitframe->attrib;
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struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
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struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
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#ifdef CONFIG_R8712_TX_AGGR
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struct cmd_priv *pcmdpriv = (struct cmd_priv *)&padapter->cmdpriv;
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#endif
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u8 blnSetTxDescOffset;
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sint bmcst = IS_MCAST(pattrib->ra);
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struct ht_priv *phtpriv = &pmlmepriv->htpriv;
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@ -303,8 +459,40 @@ static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz)
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if (pxmitframe->frame_tag == DATA_FRAMETAG) {
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/* offset 4 */
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ptxdesc->txdw1 |= cpu_to_le32((pattrib->mac_id)&0x1f);
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#ifdef CONFIG_R8712_TX_AGGR
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/* dirty workaround, need to check if it is aggr cmd. */
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if ((u8 *)pmem != (u8 *)pxmitframe->pxmitbuf->pbuf) {
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ptxdesc->txdw0 |= cpu_to_le32
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((0x3 << TYPE_SHT)&TYPE_MSK);
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qsel = (uint)(pattrib->qsel & 0x0000001f);
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if (qsel == 2)
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qsel = 0;
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ptxdesc->txdw1 |= cpu_to_le32
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((qsel << QSEL_SHT) & 0x00001f00);
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ptxdesc->txdw2 = cpu_to_le32
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((qsel << RTS_RC_SHT)&0x001f0000);
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ptxdesc->txdw6 |= cpu_to_le32
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((0x5 << RSVD6_SHT)&RSVD6_MSK);
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} else {
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ptxdesc->txdw0 |= cpu_to_le32
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((0x3 << TYPE_SHT)&TYPE_MSK);
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ptxdesc->txdw1 |= cpu_to_le32
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((0x13 << QSEL_SHT) & 0x00001f00);
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qsel = (uint)(pattrib->qsel & 0x0000001f);
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if (qsel == 2)
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qsel = 0;
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ptxdesc->txdw2 = cpu_to_le32
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((qsel << RTS_RC_SHT)&0x0001f000);
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ptxdesc->txdw7 |= cpu_to_le32
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(pcmdpriv->cmd_seq << 24);
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pcmdpriv->cmd_seq++;
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}
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pattrib->qsel = 0x13;
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#else
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qsel = (uint)(pattrib->qsel & 0x0000001f);
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ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
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#endif
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if (!pqospriv->qos_option)
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ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/*Non-QoS*/
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if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
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struct hw_xmit *phwxmits;
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sint hwentry;
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struct xmit_frame *pxmitframe = NULL;
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#ifdef CONFIG_R8712_TX_AGGR
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struct xmit_frame *p2ndxmitframe = NULL;
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#else
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int res = _SUCCESS, xcnt = 0;
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#endif
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phwxmits = pxmitpriv->hwxmits;
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hwentry = pxmitpriv->hwxmit_entry;
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pxmitbuf = r8712_alloc_xmitbuf(pxmitpriv);
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if (!pxmitbuf)
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return false;
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#ifdef CONFIG_R8712_TX_AGGR
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pxmitbuf->aggr_nr = 0;
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#endif
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}
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/* 1st frame dequeued */
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pxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits, hwentry);
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/* need to remember the 1st frame */
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if (pxmitframe != NULL) {
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#ifdef CONFIG_R8712_TX_AGGR
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/* 1. dequeue 2nd frame
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* 2. aggr if 2nd xframe is dequeued, else dump directly
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*/
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if (AGGR_NR_HIGH_BOUND > 1)
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p2ndxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits,
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hwentry);
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if (pxmitframe->frame_tag != DATA_FRAMETAG) {
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r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
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return false;
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}
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if (p2ndxmitframe != NULL)
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if (p2ndxmitframe->frame_tag != DATA_FRAMETAG) {
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r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
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return false;
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}
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r8712_xmitframe_aggr_1st(pxmitbuf, pxmitframe);
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if (p2ndxmitframe != NULL) {
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u16 total_length;
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total_length = r8712_xmitframe_aggr_next(
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pxmitbuf, p2ndxmitframe);
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do {
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p2ndxmitframe = dequeue_xframe_ex(
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pxmitpriv, phwxmits, hwentry);
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if (p2ndxmitframe != NULL)
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total_length =
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r8712_xmitframe_aggr_next(
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pxmitbuf,
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p2ndxmitframe);
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else
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break;
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} while (total_length <= 0x1800 &&
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pxmitbuf->aggr_nr <= AGGR_NR_HIGH_BOUND);
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}
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if (pxmitbuf->aggr_nr > 0)
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r8712_dump_aggr_xframe(pxmitbuf, pxmitframe);
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#else
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xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf);
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if (pxmitframe->frame_tag == DATA_FRAMETAG) {
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else
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r8712_free_xmitframe_ex(pxmitpriv, pxmitframe);
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xcnt++;
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#endif
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} else { /* pxmitframe == NULL && p2ndxmitframe == NULL */
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r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
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pxmitframe->mem_addr = mem_addr;
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pxmitframe->bpending[t] = false;
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ff_hwaddr = get_ff_hwaddr(pxmitframe);
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#ifdef CONFIG_R8712_TX_AGGR
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r8712_write_port(padapter, RTL8712_DMA_H2CCMD, w_sz,
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(unsigned char *)pxmitframe);
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#else
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r8712_write_port(padapter, ff_hwaddr, w_sz,
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(unsigned char *)pxmitframe);
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#endif
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mem_addr += w_sz;
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mem_addr = (u8 *)RND4(((addr_t)(mem_addr)));
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}
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@ -113,4 +113,11 @@ int r8712_xmitframe_complete(struct _adapter *padapter,
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void r8712_do_queue_select(struct _adapter *padapter,
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struct pkt_attrib *pattrib);
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#ifdef CONFIG_R8712_TX_AGGR
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u8 r8712_xmitframe_aggr_1st(struct xmit_buf *pxmitbuf,
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struct xmit_frame *pxmitframe);
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u8 r8712_dump_aggr_xframe(struct xmit_buf *pxmitbuf,
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struct xmit_frame *pxmitframe);
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#endif
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#endif
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@ -30,8 +30,19 @@
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#include "drv_types.h"
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#include "xmit_osdep.h"
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#define MAX_XMITBUF_SZ (2048)
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#define NR_XMITBUFF (4)
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#ifdef CONFIG_R8712_TX_AGGR
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#define MAX_XMITBUF_SZ (16384)
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#else
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#define MAX_XMITBUF_SZ (2048)
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#endif
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#define NR_XMITBUFF (4)
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#ifdef CONFIG_R8712_TX_AGGR
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#define AGGR_NR_HIGH_BOUND (4) /*(8) */
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#define AGGR_NR_LOW_BOUND (2)
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#endif
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#define XMITBUF_ALIGN_SZ 512
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#define TX_GUARD_BAND 5
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#define MAX_NUMBLKS (1)
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