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pwm: sun4i: Improve hardware read out
Implement .get_state instead of only reading the polarity at probe time. This allows to get the proper state, period and duty cycle. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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parent
c034a6fda0
commit
93e0dfb2c5
1 changed files with 46 additions and 19 deletions
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@ -44,6 +44,10 @@
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#define PWM_DTY_MASK GENMASK(15, 0)
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#define PWM_REG_PRD(reg) ((((reg) >> 16) & PWM_PRD_MASK) + 1)
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#define PWM_REG_DTY(reg) ((reg) & PWM_DTY_MASK)
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#define PWM_REG_PRESCAL(reg, chan) (((reg) >> ((chan) * PWMCH_OFFSET)) & PWM_PRESCAL_MASK)
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#define BIT_CH(bit, chan) ((bit) << ((chan) * PWMCH_OFFSET))
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static const u32 prescaler_table[] = {
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@ -96,6 +100,46 @@ static inline void sun4i_pwm_writel(struct sun4i_pwm_chip *chip,
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writel(val, chip->base + offset);
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}
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static void sun4i_pwm_get_state(struct pwm_chip *chip,
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struct pwm_device *pwm,
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struct pwm_state *state)
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{
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struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip);
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u64 clk_rate, tmp;
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u32 val;
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unsigned int prescaler;
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clk_rate = clk_get_rate(sun4i_pwm->clk);
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val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
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if ((val == PWM_PRESCAL_MASK) && sun4i_pwm->data->has_prescaler_bypass)
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prescaler = 1;
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else
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prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)];
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if (prescaler == 0)
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return;
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if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm))
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state->polarity = PWM_POLARITY_NORMAL;
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else
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state->polarity = PWM_POLARITY_INVERSED;
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if (val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm))
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state->enabled = true;
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else
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state->enabled = false;
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val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm));
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tmp = prescaler * NSEC_PER_SEC * PWM_REG_DTY(val);
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state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
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tmp = prescaler * NSEC_PER_SEC * PWM_REG_PRD(val);
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state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
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}
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static int sun4i_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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@ -257,6 +301,7 @@ static const struct pwm_ops sun4i_pwm_ops = {
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.set_polarity = sun4i_pwm_set_polarity,
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.enable = sun4i_pwm_enable,
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.disable = sun4i_pwm_disable,
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.get_state = sun4i_pwm_get_state,
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.owner = THIS_MODULE,
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};
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@ -316,8 +361,7 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
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{
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struct sun4i_pwm_chip *pwm;
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struct resource *res;
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u32 val;
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int i, ret;
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int ret;
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const struct of_device_id *match;
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match = of_match_device(sun4i_pwm_dt_ids, &pdev->dev);
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@ -353,24 +397,7 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, pwm);
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ret = clk_prepare_enable(pwm->clk);
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if (ret) {
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dev_err(&pdev->dev, "failed to enable PWM clock\n");
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goto clk_error;
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}
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val = sun4i_pwm_readl(pwm, PWM_CTRL_REG);
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for (i = 0; i < pwm->chip.npwm; i++)
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if (!(val & BIT_CH(PWM_ACT_STATE, i)))
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pwm_set_polarity(&pwm->chip.pwms[i],
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PWM_POLARITY_INVERSED);
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clk_disable_unprepare(pwm->clk);
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return 0;
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clk_error:
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pwmchip_remove(&pwm->chip);
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return ret;
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}
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static int sun4i_pwm_remove(struct platform_device *pdev)
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