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ARM: dts: imx6qdl: add uhs pinctrl state for usdhc3
This is needed for supporting ultra high speed cards like SD3.0 cards. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
parent
640a7f3f0f
commit
93e2ca0285
2 changed files with 34 additions and 1 deletions
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@ -54,6 +54,7 @@ pinctrl_hog: hoggrp {
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fsl,pins = <
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fsl,pins = <
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MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
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MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
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MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
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MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
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MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
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>;
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>;
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};
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};
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};
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};
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@ -74,8 +75,10 @@ &uart4 {
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};
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};
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&usdhc3 {
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3_1>;
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pinctrl-0 = <&pinctrl_usdhc3_1>;
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pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
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cd-gpios = <&gpio6 15 0>;
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cd-gpios = <&gpio6 15 0>;
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wp-gpios = <&gpio1 13 0>;
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wp-gpios = <&gpio1 13 0>;
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status = "okay";
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status = "okay";
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@ -1205,6 +1205,36 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
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>;
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>;
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};
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};
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pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { /* 100Mhz */
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
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MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
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MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
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MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
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MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
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>;
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};
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pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { /* 200Mhz */
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
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MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
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MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
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MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
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MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
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>;
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};
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pinctrl_usdhc3_2: usdhc3grp-2 {
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pinctrl_usdhc3_2: usdhc3grp-2 {
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fsl,pins = <
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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