mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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Blackfin: update anomaly lists to latest public info
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
parent
803103925b
commit
93f1742c63
7 changed files with 50 additions and 15 deletions
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@ -5,7 +5,7 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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*
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*
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* Copyright 2004-2010 Analog Devices Inc.
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* Copyright 2004-2011 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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*/
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@ -141,6 +141,7 @@
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000371 (0)
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#define ANOMALY_05000371 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000383 (0)
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#define ANOMALY_05000386 (0)
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#define ANOMALY_05000386 (0)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000400 (0)
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@ -155,6 +156,7 @@
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000475 (0)
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#define ANOMALY_05000475 (0)
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#define ANOMALY_05000480 (0)
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#define ANOMALY_05000485 (0)
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#define ANOMALY_05000485 (0)
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#endif
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#endif
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@ -5,14 +5,14 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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||||||
*
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*
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||||||
* Copyright 2004-2010 Analog Devices Inc.
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* Copyright 2004-2011 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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*/
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/* This file should be up to date with:
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/* This file should be up to date with:
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* - Revision E, 03/15/2010; ADSP-BF526 Blackfin Processor Anomaly List
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* - Revision E, 03/15/2010; ADSP-BF526 Blackfin Processor Anomaly List
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* - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List
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* - Revision H, 04/29/2010; ADSP-BF527 Blackfin Processor Anomaly List
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*/
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*/
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#ifndef _MACH_ANOMALY_H_
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#ifndef _MACH_ANOMALY_H_
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@ -220,6 +220,8 @@
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#define ANOMALY_05000483 (1)
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#define ANOMALY_05000483 (1)
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/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
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/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
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#define ANOMALY_05000485 (_ANOMALY_BF526_BF527(< 2, < 3))
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#define ANOMALY_05000485 (_ANOMALY_BF526_BF527(< 2, < 3))
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/* The CODEC Zero-Cross Detect Feature is not Functional */
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#define ANOMALY_05000487 (1)
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/* IFLUSH sucks at life */
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/* IFLUSH sucks at life */
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#define ANOMALY_05000491 (1)
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#define ANOMALY_05000491 (1)
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@ -268,11 +270,13 @@
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#define ANOMALY_05000323 (0)
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#define ANOMALY_05000323 (0)
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#define ANOMALY_05000362 (1)
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#define ANOMALY_05000362 (1)
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#define ANOMALY_05000363 (0)
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#define ANOMALY_05000363 (0)
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#define ANOMALY_05000383 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000402 (0)
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#define ANOMALY_05000402 (0)
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000480 (0)
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#endif
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#endif
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@ -5,13 +5,13 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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*
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*
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||||||
* Copyright 2004-2010 Analog Devices Inc.
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* Copyright 2004-2011 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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*/
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/* This file should be up to date with:
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/* This file should be up to date with:
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* - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
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* - Revision F, 05/25/2010; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
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*/
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*/
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#ifndef _MACH_ANOMALY_H_
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#ifndef _MACH_ANOMALY_H_
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@ -206,6 +206,10 @@
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#define ANOMALY_05000443 (1)
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#define ANOMALY_05000443 (1)
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/* False Hardware Error when RETI Points to Invalid Memory */
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/* False Hardware Error when RETI Points to Invalid Memory */
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#define ANOMALY_05000461 (1)
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#define ANOMALY_05000461 (1)
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/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
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#define ANOMALY_05000462 (1)
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/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */
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#define ANOMALY_05000471 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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#define ANOMALY_05000473 (1)
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/* Possible Lockup Condition whem Modifying PLL from External Memory */
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/* Possible Lockup Condition whem Modifying PLL from External Memory */
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@ -351,12 +355,14 @@
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#define ANOMALY_05000362 (1)
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#define ANOMALY_05000362 (1)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000383 (0)
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#define ANOMALY_05000386 (1)
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#define ANOMALY_05000386 (1)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000430 (0)
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#define ANOMALY_05000430 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000440 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000456 (0)
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#define ANOMALY_05000456 (0)
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@ -364,6 +370,7 @@
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000480 (0)
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#define ANOMALY_05000485 (0)
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#define ANOMALY_05000485 (0)
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#endif
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#endif
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@ -5,13 +5,13 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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*
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*
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* Copyright 2004-2010 Analog Devices Inc.
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* Copyright 2004-2011 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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*/
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/* This file should be up to date with:
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/* This file should be up to date with:
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* - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
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* - Revision E, 05/25/2010; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
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*/
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*/
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#ifndef _MACH_ANOMALY_H_
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#ifndef _MACH_ANOMALY_H_
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@ -160,12 +160,16 @@
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#define ANOMALY_05000443 (1)
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#define ANOMALY_05000443 (1)
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/* False Hardware Error when RETI Points to Invalid Memory */
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/* False Hardware Error when RETI Points to Invalid Memory */
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#define ANOMALY_05000461 (1)
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#define ANOMALY_05000461 (1)
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/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
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#define ANOMALY_05000462 (1)
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
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#define ANOMALY_05000473 (1)
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#define ANOMALY_05000473 (1)
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/* Possible Lockup Condition whem Modifying PLL from External Memory */
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/* Possible Lockup Condition whem Modifying PLL from External Memory */
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#define ANOMALY_05000475 (1)
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#define ANOMALY_05000475 (1)
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/* TESTSET Instruction Cannot Be Interrupted */
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/* TESTSET Instruction Cannot Be Interrupted */
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#define ANOMALY_05000477 (1)
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#define ANOMALY_05000477 (1)
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/* Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability */
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#define ANOMALY_05000480 (__SILICON_REVISION__ < 3)
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/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
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/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
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#define ANOMALY_05000481 (1)
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#define ANOMALY_05000481 (1)
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/* IFLUSH sucks at life */
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/* IFLUSH sucks at life */
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@ -204,6 +208,7 @@
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#define ANOMALY_05000363 (0)
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#define ANOMALY_05000363 (0)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000383 (0)
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#define ANOMALY_05000386 (1)
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#define ANOMALY_05000386 (1)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000430 (0)
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#define ANOMALY_05000430 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000440 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000456 (0)
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#define ANOMALY_05000456 (0)
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@ -5,14 +5,14 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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*
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*
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* Copyright 2004-2010 Analog Devices Inc.
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* Copyright 2004-2011 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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*/
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/* This file should be up to date with:
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/* This file should be up to date with:
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* - Revision H, 07/10/2009; ADSP-BF538/BF538F Blackfin Processor Anomaly List
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* - Revision I, 05/25/2010; ADSP-BF538/BF538F Blackfin Processor Anomaly List
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* - Revision M, 07/10/2009; ADSP-BF539/BF539F Blackfin Processor Anomaly List
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* - Revision N, 05/25/2010; ADSP-BF539/BF539F Blackfin Processor Anomaly List
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*/
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*/
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#ifndef _MACH_ANOMALY_H_
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#ifndef _MACH_ANOMALY_H_
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#define ANOMALY_05000363 (0)
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#define ANOMALY_05000363 (0)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000364 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000380 (0)
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#define ANOMALY_05000383 (0)
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#define ANOMALY_05000386 (1)
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#define ANOMALY_05000386 (1)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000389 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000400 (0)
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#define ANOMALY_05000430 (0)
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#define ANOMALY_05000430 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000440 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000447 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000448 (0)
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#define ANOMALY_05000456 (0)
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#define ANOMALY_05000456 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000465 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000467 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000474 (0)
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#define ANOMALY_05000480 (0)
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#define ANOMALY_05000485 (0)
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#define ANOMALY_05000485 (0)
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#endif
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#endif
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@ -5,13 +5,13 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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*
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*
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* Copyright 2004-2010 Analog Devices Inc.
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* Copyright 2004-2011 Analog Devices Inc.
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* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
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||||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
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*/
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*/
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/* This file should be up to date with:
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/* This file should be up to date with:
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* - Revision I, 07/23/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
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* - Revision J, 06/03/2010; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
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*/
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*/
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#ifndef _MACH_ANOMALY_H_
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#ifndef _MACH_ANOMALY_H_
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#define ANOMALY_05000481 (1)
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#define ANOMALY_05000481 (1)
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/* Possible USB Data Corruption When Multiple Endpoints Are Accessed by the Core */
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/* Possible USB Data Corruption When Multiple Endpoints Are Accessed by the Core */
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#define ANOMALY_05000483 (1)
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#define ANOMALY_05000483 (1)
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/* DDR Trim May Not Be Performed for Certain VLEV Values in OTP Page PBS00L */
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#define ANOMALY_05000484 (__SILICON_REVISION__ < 3)
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/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
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/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
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#define ANOMALY_05000485 (__SILICON_REVISION__ >= 2)
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#define ANOMALY_05000485 (__SILICON_REVISION__ >= 2)
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/* IFLUSH sucks at life */
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/* IFLUSH sucks at life */
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000412 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000432 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000435 (0)
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#define ANOMALY_05000440 (0)
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#define ANOMALY_05000475 (0)
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#define ANOMALY_05000475 (0)
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#define ANOMALY_05000480 (0)
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#endif
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#endif
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@ -5,13 +5,13 @@
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* and can be replaced with that version at any time
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* and can be replaced with that version at any time
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||||||
* DO NOT EDIT THIS FILE
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* DO NOT EDIT THIS FILE
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||||||
*
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*
|
||||||
* Copyright 2004-2010 Analog Devices Inc.
|
* Copyright 2004-2011 Analog Devices Inc.
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||||||
* Licensed under the ADI BSD license.
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* Licensed under the ADI BSD license.
|
||||||
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* This file should be up to date with:
|
/* This file should be up to date with:
|
||||||
* - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List
|
* - Revision R, 05/25/2010; ADSP-BF561 Blackfin Processor Anomaly List
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _MACH_ANOMALY_H_
|
#ifndef _MACH_ANOMALY_H_
|
||||||
|
@ -290,12 +290,18 @@
|
||||||
#define ANOMALY_05000428 (__SILICON_REVISION__ > 3)
|
#define ANOMALY_05000428 (__SILICON_REVISION__ > 3)
|
||||||
/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
|
/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
|
||||||
#define ANOMALY_05000443 (1)
|
#define ANOMALY_05000443 (1)
|
||||||
|
/* SCKELOW Feature Is Not Functional */
|
||||||
|
#define ANOMALY_05000458 (1)
|
||||||
/* False Hardware Error when RETI Points to Invalid Memory */
|
/* False Hardware Error when RETI Points to Invalid Memory */
|
||||||
#define ANOMALY_05000461 (1)
|
#define ANOMALY_05000461 (1)
|
||||||
|
/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
|
||||||
|
#define ANOMALY_05000462 (1)
|
||||||
|
/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */
|
||||||
|
#define ANOMALY_05000471 (1)
|
||||||
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
|
||||||
#define ANOMALY_05000473 (1)
|
#define ANOMALY_05000473 (1)
|
||||||
/* Possible Lockup Condition whem Modifying PLL from External Memory */
|
/* Possible Lockup Condition whem Modifying PLL from External Memory */
|
||||||
#define ANOMALY_05000475 (__SILICON_REVISION__ < 4)
|
#define ANOMALY_05000475 (1)
|
||||||
/* TESTSET Instruction Cannot Be Interrupted */
|
/* TESTSET Instruction Cannot Be Interrupted */
|
||||||
#define ANOMALY_05000477 (1)
|
#define ANOMALY_05000477 (1)
|
||||||
/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
|
/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
|
||||||
|
@ -314,12 +320,14 @@
|
||||||
#define ANOMALY_05000353 (1)
|
#define ANOMALY_05000353 (1)
|
||||||
#define ANOMALY_05000364 (0)
|
#define ANOMALY_05000364 (0)
|
||||||
#define ANOMALY_05000380 (0)
|
#define ANOMALY_05000380 (0)
|
||||||
|
#define ANOMALY_05000383 (0)
|
||||||
#define ANOMALY_05000386 (1)
|
#define ANOMALY_05000386 (1)
|
||||||
#define ANOMALY_05000389 (0)
|
#define ANOMALY_05000389 (0)
|
||||||
#define ANOMALY_05000400 (0)
|
#define ANOMALY_05000400 (0)
|
||||||
#define ANOMALY_05000430 (0)
|
#define ANOMALY_05000430 (0)
|
||||||
#define ANOMALY_05000432 (0)
|
#define ANOMALY_05000432 (0)
|
||||||
#define ANOMALY_05000435 (0)
|
#define ANOMALY_05000435 (0)
|
||||||
|
#define ANOMALY_05000440 (0)
|
||||||
#define ANOMALY_05000447 (0)
|
#define ANOMALY_05000447 (0)
|
||||||
#define ANOMALY_05000448 (0)
|
#define ANOMALY_05000448 (0)
|
||||||
#define ANOMALY_05000456 (0)
|
#define ANOMALY_05000456 (0)
|
||||||
|
@ -327,6 +335,7 @@
|
||||||
#define ANOMALY_05000465 (0)
|
#define ANOMALY_05000465 (0)
|
||||||
#define ANOMALY_05000467 (0)
|
#define ANOMALY_05000467 (0)
|
||||||
#define ANOMALY_05000474 (0)
|
#define ANOMALY_05000474 (0)
|
||||||
|
#define ANOMALY_05000480 (0)
|
||||||
#define ANOMALY_05000485 (0)
|
#define ANOMALY_05000485 (0)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue