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drm/i915: Split plane data_rate into data_rate+data_rate_y
Split the currently combined plane data_rate into the proper Y vs. CbCr components. This matches how we now track the plane dbuf allocations, and thus will make the dbuf bandwidth calculations actually produce the correct numbers for each dbuf slice. Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220303191207.27931-3-ville.syrjala@linux.intel.com
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7d4561722c
commit
943ed3cc02
5 changed files with 42 additions and 38 deletions
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@ -181,29 +181,16 @@ unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
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}
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unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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const struct intel_plane_state *plane_state,
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int color_plane)
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{
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const struct drm_framebuffer *fb = plane_state->hw.fb;
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unsigned int cpp;
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unsigned int pixel_rate;
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if (!plane_state->uapi.visible)
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return 0;
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pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state);
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cpp = fb->format->cpp[0];
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/*
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* Based on HSD#:1408715493
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* NV12 cpp == 4, P010 cpp == 8
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*
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* FIXME what is the logic behind this?
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*/
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if (fb->format->is_yuv && fb->format->num_planes > 1)
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cpp *= 4;
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return pixel_rate * cpp;
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return intel_plane_pixel_rate(crtc_state, plane_state) *
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fb->format->cpp[color_plane];
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}
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int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,
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@ -326,6 +313,7 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
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crtc_state->nv12_planes &= ~BIT(plane->id);
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crtc_state->c8_planes &= ~BIT(plane->id);
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crtc_state->data_rate[plane->id] = 0;
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crtc_state->data_rate_y[plane->id] = 0;
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crtc_state->min_cdclk[plane->id] = 0;
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plane_state->uapi.visible = false;
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@ -551,8 +539,16 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
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if (new_plane_state->uapi.visible || old_plane_state->uapi.visible)
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new_crtc_state->update_planes |= BIT(plane->id);
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new_crtc_state->data_rate[plane->id] =
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intel_plane_data_rate(new_crtc_state, new_plane_state);
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if (new_plane_state->uapi.visible &&
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intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) {
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new_crtc_state->data_rate_y[plane->id] =
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intel_plane_data_rate(new_crtc_state, new_plane_state, 0);
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new_crtc_state->data_rate[plane->id] =
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intel_plane_data_rate(new_crtc_state, new_plane_state, 1);
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} else if (new_plane_state->uapi.visible) {
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new_crtc_state->data_rate[plane->id] =
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intel_plane_data_rate(new_crtc_state, new_plane_state, 0);
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}
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return intel_plane_atomic_calc_changes(old_crtc_state, new_crtc_state,
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old_plane_state, new_plane_state);
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@ -25,7 +25,8 @@ unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state);
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unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state);
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const struct intel_plane_state *plane_state,
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int color_plane);
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void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
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const struct intel_plane_state *from_plane_state,
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struct intel_crtc *crtc);
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@ -578,6 +578,7 @@ static unsigned int intel_bw_crtc_num_active_planes(const struct intel_crtc_stat
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static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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struct drm_i915_private *i915 = to_i915(crtc->base.dev);
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unsigned int data_rate = 0;
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enum plane_id plane_id;
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@ -590,6 +591,9 @@ static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_
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continue;
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data_rate += crtc_state->data_rate[plane_id];
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if (DISPLAY_VER(i915) < 11)
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data_rate += crtc_state->data_rate_y[plane_id];
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}
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return data_rate;
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@ -690,28 +694,24 @@ static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state,
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for_each_plane_id_on_crtc(crtc, plane_id) {
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const struct skl_ddb_entry *ddb =
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&crtc_state->wm.skl.plane_ddb[plane_id];
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const struct skl_ddb_entry *ddb_y =
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&crtc_state->wm.skl.plane_ddb_y[plane_id];
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unsigned int data_rate = crtc_state->data_rate[plane_id];
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unsigned int dbuf_mask = 0;
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unsigned int dbuf_mask = skl_ddb_dbuf_slice_mask(i915, ddb);
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enum dbuf_slice slice;
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dbuf_mask |= skl_ddb_dbuf_slice_mask(i915, ddb);
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dbuf_mask |= skl_ddb_dbuf_slice_mask(i915, ddb_y);
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for_each_dbuf_slice_in_mask(i915, slice, dbuf_mask)
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crtc_bw->used_bw[slice] += data_rate;
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}
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if (DISPLAY_VER(i915) >= 11)
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return;
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for_each_plane_id_on_crtc(crtc, plane_id) {
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const struct skl_ddb_entry *ddb =
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&crtc_state->wm.skl.plane_ddb_y[plane_id];
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unsigned int data_rate = crtc_state->data_rate_y[plane_id];
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unsigned int dbuf_mask = skl_ddb_dbuf_slice_mask(i915, ddb);
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enum dbuf_slice slice;
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/*
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* FIXME: To calculate that more properly we probably
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* need to split per plane data_rate into data_rate_y
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* and data_rate_uv for multiplanar formats in order not
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* to get accounted those twice if they happen to reside
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* on different slices.
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* However for pre-icl this would work anyway because
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* we have only single slice and for icl+ uv plane has
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* non-zero data rate.
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* So in worst case those calculation are a bit
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* pessimistic, which shouldn't pose any significant
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* problem anyway.
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*/
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for_each_dbuf_slice_in_mask(i915, slice, dbuf_mask)
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crtc_bw->used_bw[slice] += data_rate;
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}
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@ -780,6 +780,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
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intel_set_plane_visible(crtc_state, plane_state, false);
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fixup_plane_bitmasks(crtc_state);
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crtc_state->data_rate[plane->id] = 0;
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crtc_state->data_rate_y[plane->id] = 0;
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crtc_state->min_cdclk[plane->id] = 0;
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if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
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@ -4813,6 +4814,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
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crtc_state->enabled_planes &= ~BIT(plane->id);
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crtc_state->active_planes &= ~BIT(plane->id);
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crtc_state->update_planes |= BIT(plane->id);
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crtc_state->data_rate[plane->id] = 0;
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}
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plane_state->planar_slave = false;
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@ -4857,6 +4859,8 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
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crtc_state->enabled_planes |= BIT(linked->id);
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crtc_state->active_planes |= BIT(linked->id);
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crtc_state->update_planes |= BIT(linked->id);
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crtc_state->data_rate[linked->id] =
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crtc_state->data_rate_y[plane->id];
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drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n",
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linked->base.name, plane->base.name);
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@ -1129,7 +1129,10 @@ struct intel_crtc_state {
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int min_cdclk[I915_MAX_PLANES];
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/* for packed/planar CbCr */
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u32 data_rate[I915_MAX_PLANES];
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/* for planar Y */
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u32 data_rate_y[I915_MAX_PLANES];
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/* FIXME unify with data_rate[] */
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u64 plane_data_rate[I915_MAX_PLANES];
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