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iommu/dart: Exclude MSI doorbell from PCIe device IOVA range 

The MSI doorbell on Apple HW can be any address in the low 4GB range.
However, the MSI write is matched by the PCIe block before hitting the
iommu. It must thus be excluded from the IOVA range that is assigned to any
PCIe device.

Link: https://lore.kernel.org/r/20210929163847.2807812-9-maz@kernel.org
Tested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Marc Zyngier 2021-09-29 17:38:41 +01:00 committed by Bjorn Helgaas
parent 476c41ed45
commit 946d619fa2
3 changed files with 35 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
drivers/iommu/apple-dart.c
View File

@ -721,6 +721,31 @@ static int apple_dart_def_domain_type(struct device *dev)
return 0;
}
#ifndef CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR
/* Keep things compiling when CONFIG_PCI_APPLE isn't selected */
#define CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR 0
#endif
#define DOORBELL_ADDR (CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR & PAGE_MASK)
static void apple_dart_get_resv_regions(struct device *dev,
struct list_head *head)
{
if (IS_ENABLED(CONFIG_PCIE_APPLE) && dev_is_pci(dev)) {
struct iommu_resv_region *region;
int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
region = iommu_alloc_resv_region(DOORBELL_ADDR,
PAGE_SIZE, prot,
IOMMU_RESV_MSI);
if (!region)
return;
list_add_tail(&region->list, head);
}
iommu_dma_get_resv_regions(dev, head);
}
static const struct iommu_ops apple_dart_iommu_ops = {
.domain_alloc = apple_dart_domain_alloc,
.domain_free = apple_dart_domain_free,
@ -737,6 +762,8 @@ static const struct iommu_ops apple_dart_iommu_ops = {
.device_group = apple_dart_device_group,
.of_xlate = apple_dart_of_xlate,
.def_domain_type = apple_dart_def_domain_type,
.get_resv_regions = apple_dart_get_resv_regions,
.put_resv_regions = generic_iommu_put_resv_regions,
.pgsize_bitmap = -1UL, /* Restricted during dart probe */
};

5
drivers/pci/controller/Kconfig
View File

@ -312,6 +312,11 @@ config PCIE_HISI_ERR
Say Y here if you want error handling support
for the PCIe controller's errors on HiSilicon HIP SoCs
config PCIE_APPLE_MSI_DOORBELL_ADDR
hex
default 0xfffff000
depends on PCIE_APPLE
config PCIE_APPLE
tristate "Apple PCIe controller"
depends on ARCH_APPLE || COMPILE_TEST

4
drivers/pci/controller/pcie-apple.c
View File

@ -120,8 +120,10 @@
* The doorbell address is set to 0xfffff000, which by convention
* matches what MacOS does, and it is possible to use any other
* address (in the bottom 4GB, as the base register is only 32bit).
* However, it has to be excluded from the IOVA range, and the DART
* driver has to know about it.
*/
#define DOORBELL_ADDR 0xfffff000
#define DOORBELL_ADDR CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR
struct apple_pcie {
struct mutex lock;